ICCAD A

137 papers

YearTitle / Authors
20082008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008
Sani R. Nassif, Jaijeet S. Roychowdhury
2008A capacitance solver for incremental variation-aware extraction.
Tarek A. El-Moselhy, Ibrahim M. Elfadel, Luca Daniel
2008A framework for predictive dynamic temperature management of microprocessor systems.
Omer Khan, Sandip Kundu
2008A highly efficient optimization algorithm for pixel manipulation in inverse lithography technique.
Jinyu Zhang, Wei Xiong, Yan Wang, Zhiping Yu, Min-Chun Tsai
2008A low-overhead fault tolerance scheme for TSV-based 3D network on chip links.
Igor Loi, Subhasish Mitra, Thomas H. Lee, Shinobu Fujita, Luca Benini
2008A new method to improve accuracy of leakage current estimation for transistors with non-rectangular gates due to sub-wavelength lithography effects.
Kuen-Yu Tsai, Meng-Fu You, Yi-Chang Lu, Philip C. W. Ng
2008A novel fixed-outline floorplanner with zero deadspace for hierarchical design.
Ou He, Sheqin Dong, Jinian Bian, Satoshi Goto, Chung-Kuan Cheng
2008A novel sequential circuit optimization with clock gating logic.
Yu-Min Kuo, Shih-Hung Weng, Shih-Chieh Chang
2008A polynomial time approximation scheme for timing constrained minimum cost layer assignment.
Shiyan Hu, Zhuo Li, Charles J. Alpert
2008A statistical approach for full-chip gate-oxide reliability analysis.
Kaviraj Chopra, Cheng Zhuo, David T. Blaauw, Dennis Sylvester
2008A succinct memory model for automated design debugging.
Brian Keng, Hratch Mangassarian, Andreas G. Veneris
2008A voltage-frequency island aware energy optimization framework for networks-on-chip.
Wooyoung Jang, Duo Ding, David Z. Pan
2008Accurate energy breakeven time estimation for run-time power gating.
Hao Xu, Wen-Ben Jone, Ranga Vemuri
2008Adjustment-based modeling for statistical static timing analysis with high dimension of variability.
Lin Xie, Azadeh Davoodi, Jun Zhang, Tai-Hsuan Wu
2008Advancing supercomputer performance through interconnection topology synthesis.
Yi Zhu, Michael B. Taylor, Scott B. Baden, Chung-Kuan Cheng
2008Algorithms for simultaneous consideration of multiple physical synthesis transforms for timing closure.
Huan Ren, Shantanu Dutt
2008Architecting parallel programs.
Joel R. Phillips, Kurt Keutzer, Michael Wrinn
2008Area-I/O flip-chip routing for chip-package co-design.
Jia-Wei Fang, Yao-Wen Chang
2008Automated abstraction by incremental refinement in interpolant-based model checking.
Gianpiero Cabodi, Paolo Camurati, Marco Murciano
2008Automated extraction of expert knowledge in analog topology selection and sizing.
Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert
2008BSG-Route: a length-matching router for general topology.
Tan Yan, Martin D. F. Wong
2008Boolean factoring and decomposition of logic networks.
Alan Mishchenko, Robert K. Brayton, Satrajit Chatterjee
2008Breaking the simulation barrier: SRAM evaluation through norm minimization.
Lara Dolecek, Masood Qazi, Devavrat Shah, Anantha P. Chandrakasan
2008CAD for displays!
Mary Lou Jepsen
2008Challenges at 45nm and beyond.
Dan Bailey, Eric Soenen, Puneet Gupta, Paul G. Villarrubia, Sang H. Dhong
2008Characterization and modeling of graphene field-effect devices.
Kenneth L. Shepard, Inanc Meric, Philip Kim
2008Clock buffer polarity assignment combined with clock tree generation for power/ground noise minimization.
Yesin Ryu, Taewhan Kim
2008Comprehensive procedure for fast and accurate coupled oscillator network simulation.
Prateek Bhansali, Shweta Srivastava, Xiaolue Lai, Jaijeet S. Roychowdhury
2008Constrained aggressor set selection for maximum coupling noise.
Debjit Sinha, Gregory Schaeffer, Soroush Abbaspour, Alex Rubin, Frank Borkam
2008Constraint graph-based macro placement for modern mixed-size circuit designs.
Hsin-Chen Chen, Yi-Lin Chuang, Yao-Wen Chang, Yung-Chung Chang
2008Context-sensitive static transistor-level IR analysis.
Weiqing Guo, Yu Zhong, Tom Burd
2008Correct-by-construction microarchitectural pipelining.
Timothy Kam, Michael Kishinevsky, Jordi Cortadella, Marc Galceran Oms
2008Decoupling capacitance allocation for timing with statistical noise model and timing analysis.
Takashi Enami, Masanori Hashimoto, Takashi Sato
2008Delay-optimal simultaneous technology mapping and placement with applications to timing optimization.
Yifang Liu, Rupesh S. Shelar, Jiang Hu
2008Design and optimization of a digital microfluidic biochip for protein crystallization.
Tao Xu, Krishnendu Chakrabarty, Vamsee K. Pamula
2008Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions.
Martin Strasser, Michael Eick, Helmut Gräb, Ulf Schlichtmann, Frank M. Johannes
2008Diastolic arrays: throughput-driven reconfigurable computing.
Myong Hyon Cho, Chih-Chi Cheng, Michel A. Kinsy, G. Edward Suh, Srinivas Devadas
2008Double patterning technology friendly detailed routing.
Minsik Cho, Yongchan Ban, David Z. Pan
2008Effective IR-drop reduction in at-speed scan testing using Distribution-Controlling X-Identification.
Kohei Miyase, Kenji Noda, Hideaki Ito, Kazumi Hatayama, Takashi Aikyo, Yuta Yamato, Hiroshi Furukawa, Xiaoqing Wen, Seiji Kajihara
2008Efficient and accurate eye diagram prediction for high speed signaling.
Rui Shi, Wenjian Yu, Yi Zhu, Chung-Kuan Cheng, Ernest S. Kuh
2008Efficient block-based parameterized timing analysis covering all potentially critical paths.
Khaled R. Heloue, Sari Onaissi, Farid N. Najm
2008Efficient online computation of core speeds to maximize the throughput of thermally constrained multi-core processors.
Ravishankar Rao, Sarma B. K. Vrudhula
2008Electrically driven optical proximity correction based on linear programming.
Shayak Banerjee, Praveen Elakkumanan, Lars Liebmann, Michael Orshansky
2008Embedded software verification: challenges and solutions.
Chao Wang, Malay K. Ganai, Shuvendu K. Lahiri, Daniel Kroening
2008Evaluation of voltage interpolation to address process variations.
Kevin Brownell, Gu-Yeon Wei, David M. Brooks
2008Exact basic geometric operations on arbitrary angle polygons using only fixed size integer coordinates.
Alexey Lvov, Ulrich Finkler
2008FBT: filled buffer technique to reduce code size for VLIW processors.
Talal Bonny, Jörg Henkel
2008FastRoute3.0: a fast and high quality global router based on virtual capacity.
Yanheng Zhang, Yue Xu, Chris Chu
2008Fault tolerant placement and defect reconfiguration for nano-FPGAs.
Amit Agarwal, Jason Cong, Brian Tagiku
2008Frequency-aware PPV: a robust phase macromodel for accurate oscillator noise analysis.
Xiaolue Lai
2008Game-theoretic timing analysis.
Sanjit A. Seshia, Alexander Rakhlin
2008Graphene nanoribbon FETs: technology exploration and CAD.
Kartik Mohanram, Jing Guo
2008Guaranteed stable projection-based model reduction for indefinite and unstable linear systems.
Bradley N. Bond, Luca Daniel
2008Guiding global placement with wire density.
Kalliopi Tsota, Cheng-Kok Koh, Venkataramanan Balakrishnan
2008Hardware protection and authentication through netlist level obfuscation.
Rajat Subhra Chakraborty, Swarup Bhunia
2008Hybrid CMOS-STTRAM non-volatile FPGA: design challenges and optimization approaches.
Somnath Paul, Saibal Mukhopadhyay, Swarup Bhunia
2008Importance sampled circuit learning ensembles for robust analog IC design.
Peng Gao, Trent McConaghy, Georges G. E. Gielen
2008Impulse sensitivity function analysis of periodic circuits.
Jaeha Kim, Brian S. Leibowitz, Metha Jeeradit
2008Incorporating logic exclusivity (LE) constraints in noise analysis using gain guided backtracking method.
Ruiming Li, An-Jui Shey, Michel Laudes
2008Integrated circuit design with NEM relays.
Fred Chen, Hei Kam, Dejan Markovic, Tsu-Jae King Liu, Vladimir Stojanovic, Elad Alon
2008Integrated code and data placement in two-dimensional mesh based chip multiprocessors.
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kandemir, Mustafa Karaköy, Mary Jane Irwin
2008Large-scale atomistic approach to random-dopant-induced characteristic variability in nanoscale CMOS digital and high-frequency integrated circuits.
Yiming Li, Chih-Hong Hwang, Ta-Ching Yeh, Tien-Yeh Li
2008Layout decomposition for double patterning lithography.
Andrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Yao
2008Lightweight secure PUFs.
Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potkonjak
2008Linear analysis of random process variability.
Victoria Wang, Dejan Markovic
2008Linear constraint graph for floorplan optimization with soft blocks.
Jia Wang, Hai Zhou
2008MAPS: multi-algorithm parallel circuit simulation.
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
2008MC-Sim: an efficient simulation tool for MPSoC designs.
Jason Cong, Karthik Gururaj, Guoling Han, Adam Kaplan, Mishali Naik, Glenn Reinman
2008MUTE-AES: a multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm.
Jude Angelo Ambrose, Sri Parameswaran, Aleksandar Ignjatovic
2008Minimizing the energy cost of throughput in a linear pipeline by opportunistic time borrowing.
Mohammad Ghasemazar, Massoud Pedram
2008Mixed-signal simulation challenges and solutions.
Henry Chang, William Walker, John G. Maneatis, John F. Croix
2008Model reduction via projection onto nonlinear manifolds, with applications to analog circuits and biochemical systems.
Chenjie Gu, Jaijeet S. Roychowdhury
2008Modeling and simulation for on-chip power grid networks by locally dominant Krylov subspace method.
Boyuan Yan, Sheldon X.-D. Tan, Gengsheng Chen, Lifeng Wu
2008Module locking in biochemical synthesis.
Brian Fett, Marc D. Riedel
2008More Moore: foolish, feasible, or fundamentally different?
Rob Aitken, Jerry Bautista, Wojciech Maly, Jan M. Rabaey
2008Multi-layer global routing considering via and wire capacities.
Chin-Hsiung Hsu, Huang-Yu Chen, Yao-Wen Chang
2008Multigrid on GPU: tackling power grid analysis on parallel SIMT platforms.
Zhuo Feng, Peng Li
2008NTHU-Route 2.0: a fast and stable global router.
Yen-Jung Chang, Yu-Ting Lee, Ting-Chi Wang
2008Nanolithography and CAD challenges for 32nm/22nm and beyond.
David Z. Pan, Stephen Renwick, Vivek Singh, Judy Huckabay
2008Network flow-based power optimization under timing constraints in MSV-driven floorplanning.
Qiang Ma, Evangeline F. Y. Young
2008Obstacle-avoiding rectilinear Steiner tree construction.
Liang Li, Evangeline F. Y. Young
2008On capture power-aware test data compression for scan-based testing.
Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu
2008On efficient Monte Carlo-based statistical static timing analysis of digital circuits.
Javid Jaffari, Mohab Anis
2008On the decreasing significance of large standard cells in technology mapping.
Jae-sun Seo, Igor L. Markov, Dennis Sylvester, David T. Blaauw
2008On the modeling of resistance in graphene nanoribbon (GNR) for future interconnect applications.
Tamer Ragheb, Yehia Massoud
2008On the numbers of variables to represent sparse logic functions.
Tsutomu Sasao
2008Optimization-based framework for simultaneous circuit-and-system design-space exploration: a high-speed link example.
Ranko Sredojevic, Vladimir Stojanovic
2008Overlay aware interconnect and timing variation modeling for double patterning technology.
Jae-Seok Yang, David Z. Pan
2008PaRS: fast and near-optimal grid-based cell sizing for library-based design.
Tai-Hsuan Wu, Azadeh Davoodi
2008Parameterized transient thermal behavioral modeling for chip multiprocessors.
Duo Li, Sheldon X.-D. Tan, Eduardo H. Pacheco, Murli Tirumala
2008Path-RO: a novel on-chip critical path delay measurement under process variations.
Xiaoxiao Wang, Mohammad Tehranipoor, Ramyanshu Datta
2008Performance estimation and slack matching for pipelined asynchronous architectures with choice.
Gennette Gill, Vishal Gupta, Montek Singh
2008Performance optimization of elastic systems using buffer resizing and buffer insertion.
Dmitry Bufistov, Jorge Júlvez, Jordi Cortadella
2008Physical models for electron transport in graphene nanoribbons and their junctions.
Azad Naeemi, James D. Meindl
2008Placement based multiplier rewiring for cell-based designs.
Fan Mo, Robert K. Brayton
2008Post-silicon timing characterization by compressed sensing.
Farinaz Koushanfar, Petros Boufounos, Davood Shamsi
2008Power supply noise aware workload assignment for multi-core systems.
Aida Todri, Malgorzata Marek-Sadowska, Joseph N. Kozhaya
2008Power supply signal calibration techniques for improving detection resolution to hardware Trojans.
Reza M. Rad, Xiaoxiao Wang, Mohammad Tehranipoor, Jim Plusquellic
2008Practical, fast Monte Carlo statistical static timing analysis: why and how.
Amith Singhee, Sonia Singhal, Rob A. Rutenbar
2008Proactive temperature balancing for low cost thermal management in MPSoCs.
Ayse Kivilcim Coskun, Tajana Simunic Rosing, Kenny C. Gross
2008Process variability-aware transient fault modeling and analysis.
Natasa Miskov-Zivanov, Kai-Chiang Wu, Diana Marculescu
2008Process variation aware system-level task allocation using stochastic ordering of delay distributions.
Love Singhal, Elaheh Bozorgzadeh
2008Pulse width allocation with clock skew scheduling for optimizing pulsed latch-based sequential circuits.
Hyein Lee, Seungwhun Paik, Youngsoo Shin
2008Pyramids: an efficient computational geometry-based approach for timing-driven placement.
Tao Luo, David A. Papa, Zhuo Li, Chin Ngai Sze, Charles J. Alpert, David Z. Pan
2008ROAdNoC: runtime observability for an adaptive network on chip architecture.
Mohammad Abdullah Al Faruque, Thomas Ebi, Jörg Henkel
2008Race analysis for SystemC using model checking.
Nicolas Blanc, Daniel Kroening
2008Reliable system design: models, metrics and design techniques.
Subhasish Mitra, Ravishankar K. Iyer, Kishor S. Trivedi, James W. Tschanz
2008Robust FPGA resynthesis based on fault-tolerant Boolean matching.
Yu Hu, Zhe Feng, Lei He, Rupak Majumdar
2008Robust reconfigurable filter design using analytic variability quantification techniques.
Arthur Nieuwoudt, Jamil Kawa, Yehia Massoud
2008Routing for chip-package-board co-design considering differential pairs.
Jia-Wei Fang, Kuan-Hsien Ho, Yao-Wen Chang
2008SPM management using Markov chain based data access prediction.
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kandemir, Ozcan Ozturk
2008SRAM dynamic stability: theory, variability and analysis.
Wei Dong, Peng Li, Garng M. Huang
2008STEEL: a technique for stress-enhanced standard cell library design.
Brian Cline, Vivek Joshi, Dennis Sylvester, David T. Blaauw
2008Scalable and scalably-verifiable sequential synthesis.
Alan Mishchenko, Michael L. Case, Robert K. Brayton, Stephen Jang
2008Silicon feedback to improve frequency of high-performance microprocessors: an overview.
Chandramouli V. Kashyap, Pouria Bastani, Kip Killpack, Chirayu S. Amin
2008Simultaneous control of power/ground current, wakeup time and transistor overhead in power gated circuits.
Yongho Lee, Deog-Kyoon Jeong, Taewhan Kim
2008Smoothed form of nonlinear phase macromodel for oscillators.
Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov, Brian J. Mulvaney, Kiran K. Gullapalli
2008Sparse implicit projection (SIP) for reduction of general many-terminal networks.
Zuochang Ye, Dmitry Vasilyev, Zhenhai Zhu, Joel R. Phillips
2008Statistical modeling of metal-gate work-function variability in emerging device technologies and implications for circuit design.
Hamed F. Dadgour, Vivek De, Kaustav Banerjee
2008Statistical path selection for at-speed test.
Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chandu Visweswariah
2008Synthesis from multi-cycle atomic actions as a solution to the timing closure problem.
Michal Karczmarek, Arvind
2008System-level power estimation using an on-chip bus performance monitoring unit.
Youngjin Cho, Younghyun Kim, Sangyoung Park, Naehyuck Chang
2008System-level thermal aware design of applications with uncertain execution time.
Sushu Zhang, Karam S. Chatha
2008Temperature aware task sequencing and voltage scaling.
Ramkumar Jayaseelan, Tulika Mitra
2008Temperature-aware test scheduling for multiprocessor systems-on-chip.
David R. Bild, Sanchit Misra, Thidapat Chantem, Prabhat Kumar, Robert P. Dick, Xiaobo Sharon Hu, Li Shang, Alok N. Choudhary
2008Texture filter memory: a power-efficient and scalable texture memory architecture for mobile graphics processors.
B. V. N. Silpa, Anjul Patney, Tushar Krishna, Preeti Ranjan Panda, G. S. Visweswaran
2008The analysis of cyclic circuits with Boolean satisfiability.
John D. Backes, Brian Fett, Marc D. Riedel
2008Thermal-aware floorplanning for task migration enabled active sub-threshold leakage reduction.
Hushrav Mogal, Kia Bazargan
2008Thermal-aware reliability analysis for platform FPGAs.
Prasanth Mangalagiri, Sungmin Bae, Krishnan Ramakrishnan, Yuan Xie, Vijaykrishnan Narayanan
2008ThermalScope: multi-scale thermal analysis for nanometer-scale integrated circuits.
Nicholas Allec, Zyad Hassan, Li Shang, Robert P. Dick, Ronggui Yang
2008To SAT or not to SAT: Ashenhurst decomposition in a large scale.
Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee
2008Transition-aware decoupling-capacitor allocation in power noise reduction.
Po-Yuan Chen, Che-Yu Liu, TingTing Hwang
2008Using test data to improve IC quality and yield.
Anne Gattiker
2008Verification of arithmetic datapaths using polynomial function models and congruence solving.
Neal Tew, Priyank Kalla, Namrata Shekhar, Sivaram Gopalakrishnan
2008Verifying external interrupts of embedded microprocessor in SoC with on-chip bus.
Fu-Ching Yang, Jing-Kun Zhong, Ing-Jer Huang
2008What can brain researchers learn from computer engineers and vice versa?
Dmitri "Mitya" Chklovskii
2008Yield-aware hierarchical optimization of large analog integrated circuits.
Guo Yu, Peng Li