| 2007 | 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007 Georges G. E. Gielen |
| 2007 | 3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits. Pingqiang Zhou, Yuchun Ma, Zhuoyuan Li, Robert P. Dick, Li Shang, Hai Zhou, Xianlong Hong, Qiang Zhou |
| 2007 | A design flow dedicated to multi-mode architectures for DSP applications. Cyrille Chavet, Caaliph Andriamisaina, Philippe Coussy, Emmanuel Casseau, Emmanuel Juin, Pascal Urard, Eric Martin |
| 2007 | A fast and high-capacity electromagnetic solution for highspeed IC design. Houle Gan, Dan Jiao |
| 2007 | A fast band-matching technique for interconnect inductance modeling. Hong Li, Jitesh Jain, Cheng-Kok Koh, Venkataramanan Balakrishnan |
| 2007 | A frequency-domain technique for statistical timing analysis of clock meshes. Ruilin Wang, Cheng-Kok Koh |
| 2007 | A general model for performance optimization of sequential systems. Dmitry Bufistov, Jordi Cortadella, Michael Kishinevsky, Sachin S. Sapatnekar |
| 2007 | A geometric approach for early power grid verification using current constraints. Imad A. Ferzli, Farid N. Najm, Lars Kruse |
| 2007 | A hybrid scheme for compacting test responses with unknown values. Mango Chia-Tso Chao, Kwang-Ting Cheng, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei |
| 2007 | A methodology for fast and accurate yield factor estimation during global routing. Subarna Sinha, Charles C. Chiang |
| 2007 | A methodology for timing model characterization for statistical static timing analysis. Zhuo Feng, Peng Li |
| 2007 | A nonlinear cell macromodel for digital applications. Chandramouli V. Kashyap, Chirayu S. Amin, Noel Menezes, Eli Chiprout |
| 2007 | A novel SoC design methodology combining adaptive software and reconfigurable hardware. Marco D. Santambrogio, Seda Ogrenci Memik, Vincenzo Rana, Umut A. Acar, Donatella Sciuto |
| 2007 | A novel intensity based optical proximity correction algorithm with speedup in lithography simulation. Peng Yu, David Z. Pan |
| 2007 | A novel synthesis algorithm for reversible circuits. Mehdi Saeedi, Mehdi Sedighi, Morteza Saheb Zamani |
| 2007 | A novel technique for incremental analysis of on-chip power distribution networks. Yuhong Fu, Rajendran Panda, Ben Reschke, Savithri Sundareswaran, Min Zhao |
| 2007 | A performance-driven QBF-based iterative logic array representation with applications to verification, debug and test. Hratch Mangassarian, Andreas G. Veneris, Sean Safarpour, Marco Benedetti, Duncan Exon Smith |
| 2007 | A robust finite-point based gate model considering process variations. Alexander V. Mitev, Dinesh Ganesan, Dheepan Shanmugasundaram, Yu Cao, Janet Meiling Wang |
| 2007 | A selective pattern-compression scheme for power and test-data reduction. Chia-Yi Lin, Hung-Ming Chen |
| 2007 | A self-adjusting clock tree architecture to cope with temperature variations. Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail |
| 2007 | A simultaneous bus orientation and bused pin flipping algorithm. Fan Mo, Robert K. Brayton |
| 2007 | Accurate detection for process-hotspots with vias and incomplete specification. Jingyu Xu, Subarna Sinha, Charles C. Chiang |
| 2007 | Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization. Xin Li, Brian Taylor, YuTsun Chien, Lawrence T. Pileggi |
| 2007 | An ILP algorithm for post-floorplanning voltage-island generation considering power-network planning. Wan-Ping Lee, Hung-Yi Liu, Yao-Wen Chang |
| 2007 | An efficient algorithm for statistical circuit optimization using Lagrangian relaxation. I-Jye Lin, Yao-Wen Chang |
| 2007 | An efficient algorithm for time separation of events in concurrent systems. Peggy B. McGee, Steven M. Nowick |
| 2007 | An efficient method for statistical circuit simulation. Frank Liu |
| 2007 | An efficient method to identify critical gates under circuit aging. Wenping Wang, Zile Wei, Shengqi Yang, Yu Cao |
| 2007 | An efficient wake-up schedule during power mode transition considering spurious glitches phenomenon. Yu-Ting Chen, Da-Cheng Juan, Ming-Chao Lee, Shih-Chieh Chang |
| 2007 | An incremental learning framework for estimating signal controllability in unit-level verification. Charles H.-P. Wen, Li-C. Wang, Jayanta Bhadra |
| 2007 | Analog placement with common centroid constraints. Qiang Ma, Evangeline F. Y. Young, Kong-Pang Pun |
| 2007 | Analysis and optimization of power-gated ICs with multiple power gating configurations. Aida Todri, Malgorzata Marek-Sadowska, Shih-Chieh Chang |
| 2007 | Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding. Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda, Jiang Hu |
| 2007 | Approximation algorithm for the temperature-aware scheduling problem. Sushu Zhang, Karam S. Chatha |
| 2007 | Archer: a history-driven global routing algorithm. Muhammet Mustafa Ozdal, Martin D. F. Wong |
| 2007 | Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques. Xiaoyao Liang, Kerem Turgay, David M. Brooks |
| 2007 | Automated refinement checking of concurrent systems. Sudipta Kundu, Sorin Lerner, Rajesh Gupta |
| 2007 | Automating post-silicon debugging and repair. Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
| 2007 | BioRoute: a network-flow based routing algorithm for digital microfluidic biochips. Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang |
| 2007 | Bounding L2 gain system error generated by approximations of the nonlinear vector field. Kin Cheong Sou, Alexandre Megretski, Luca Daniel |
| 2007 | BoxRouter 2.0: architecture and implementation of a hybrid and robust global router. Minsik Cho, Katrina Lu, Kun Yuan, David Z. Pan |
| 2007 | CacheCompress: a novel approach for test data compression with cache for IP embedded cores. Hao Fang, Chenguang Tong, Bo Yao, Xiaodi Song, Xu Cheng |
| 2007 | Can nano-photonic silicon circuits become an INTRA-chip interconnect technology? Eli Yablonovitch |
| 2007 | Checking equivalence of quantum circuits and states. George F. Viamontes, Igor L. Markov, John P. Hayes |
| 2007 | Clustering based pruning for statistical criticality computation under process variations. Hushrav Mogal, Haifeng Qian, Sachin S. Sapatnekar, Kia Bazargan |
| 2007 | Combinational and sequential mapping with priority cuts. Alan Mishchenko, Sungmin Cho, Satrajit Chatterjee, Robert K. Brayton |
| 2007 | Combining static and dynamic defect-tolerance techniques for nanoscale memory systems. Susmit Biswas, Gang Wang, Tzvetan S. Metodi, Ryan Kastner, Frederic T. Chong |
| 2007 | Compact modeling of variational waveforms. Vladimir Zolotov, Jinjun Xiong, Soroush Abbaspour, David J. Hathaway, Chandu Visweswariah |
| 2007 | Compatibility path based binding algorithm for interconnect reduction in high level synthesis. TaeMin Kim, Xun Liu |
| 2007 | Computation of minimal counterexamples by using black box techniques and symbolic methods. Tobias Nopper, Christoph Scholl, Bernd Becker |
| 2007 | Data locality enhancement for CMPs. Mahmut T. Kandemir |
| 2007 | Design methodology to trade off power, output quality and error resiliency: application to color interpolation filtering. Georgios Karakonstantis, Nilanjan Banerjee, Kaushik Roy, Chaitali Chakrabarti |
| 2007 | Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates. Yu Hu, Satyaki Das, Steven Trimberger, Lei He |
| 2007 | Device and architecture concurrent optimization for FPGA transient soft error rate. Yan Lin, Lei He |
| 2007 | Device-circuit co-optimization for mixed-mode circuit design via geometric programming. Jintae Kim, Ritesh Jhaveri, Jason Woo, Chih-Kong Ken Yang |
| 2007 | ECO timing optimization using spare cells. Yen-Pin Chen, Jia-Wei Fang, Yao-Wen Chang |
| 2007 | Early planning for clock skew scheduling during register binding. Min Ni, Seda Ogrenci Memik |
| 2007 | Efficient VCO phase macromodel generation considering statistical parametric variations. Wei Dong, Zhuo Feng, Peng Li |
| 2007 | Efficient computation of current flow in signal wires for reliability analysis. Kanak Agarwal, Frank Liu |
| 2007 | Efficient decoupling capacitance budgeting considering operation and process variations. Yiyu Shi, Jinjun Xiong, Chunchen Liu, Lei He |
| 2007 | Efficient multi-layer obstacle-avoiding rectilinear Steiner tree construction. Chung-Wei Lin, Shih-Lun Huang, Kai-Chi Hsu, Meng-Xiang Li, Yao-Wen Chang |
| 2007 | Efficient path delay test generation based on stuck-at test generation using checker circuitry. Tsuyoshi Iwagaki, Satoshi Ohtake, Mineo Kaneko, Hideo Fujiwara |
| 2007 | Efficient placement of distributed on-chip decoupling capacitors in nanoscale ICs. Mikhail Popovich, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin |
| 2007 | Engineering change using spare cells with constant insertion. Yu-Min Kuo, Ya-Ting Chang, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 2007 | Enhancing design robustness with reliability-aware resynthesis and logic simulation. Smita Krishnaswamy, Stephen Plaza, Igor L. Markov, John P. Hayes |
| 2007 | Equalized interconnects for on-chip networks: modeling and optimization framework. Byungsub Kim, Vladimir Stojanovic |
| 2007 | Estimation of delay test quality and its application to test generation. Seiji Kajihara, Shohei Morishima, Masahiro Yamamoto, Xiaoqing Wen, Masayasu Fukunaga, Kazumi Hatayama, Takashi Aikyo |
| 2007 | Estimation of statistical variation in temporal NBTI degradation and its impact on lifetime circuit performance. Kunhyuk Kang, Sang Phill Park, Kaushik Roy, Muhammad Ashraful Alam |
| 2007 | Exploiting STI stress for performance. Andrew B. Kahng, Puneet Sharma, Rasit Onur Topaloglu |
| 2007 | Exploiting hierarchy and structure to efficiently solve graph coloring as SAT. Miroslav N. Velev |
| 2007 | Exploiting symmetry in SAT-based Boolean matching for heterogeneous FPGA technology mapping. Yu Hu, Victor Shih, Rupak Majumdar, Lei He |
| 2007 | Extending systems-on-chip to the third dimension: performance, cost and technological tradeoffs. Roshan Weerasekera, Li-Rong Zheng, Dinesh Pamunuwa, Hannu Tenhunen |
| 2007 | Fast exact Toffoli network synthesis of reversible logic. Robert Wille, Daniel Große |
| 2007 | Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays. M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli |
| 2007 | Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors. Sivaram Gopalakrishnan, Priyank Kalla, M. Brandon Meredith, Florian Enescu |
| 2007 | Formal verification at higher levels of abstraction. Daniel Kroening, Sanjit A. Seshia |
| 2007 | Gate sizing by Lagrangian relaxation revisited. Jia Wang, Debasish Das, Hai Zhou |
| 2007 | High-performance routing at the nanometer scale. Jarrod A. Roy, Igor L. Markov |
| 2007 | Hybrid CEGAR: combining variable hiding and predicate abstraction. Chao Wang, Hyondeuk Kim, Aarti Gupta |
| 2007 | Impedance extraction for 3-D structures with multiple dielectrics using preconditioned boundary element method. Yang Yi, Peng Li, Vivek Sarin, Weiping Shi |
| 2007 | Including inductance in static timing analysis. Ahmed Shebaita, Dusan Petranovic, Yehea I. Ismail |
| 2007 | Increasing data-bandwidth to instruction-set extensions through register clustering. Kingshuk Karuri, Anupam Chattopadhyay, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr |
| 2007 | Incremental component implementation selection: enabling ECO in compositional system synthesis. Soheil Ghiasi |
| 2007 | Incremental learning approach and SAT model for Boolean matching with don't cares. Kuo-Hua Wang, Chung-Ming Chan |
| 2007 | Inductive equivalence checking under retiming and resynthesis. Jie-Hong Roland Jiang, Wei-Lun Hung |
| 2007 | IntSim: A CAD tool for optimization of multilevel interconnect networks. Deepak C. Sekar, Azad Naeemi, Reza Sarvari, Jeffrey A. Davis, James D. Meindl |
| 2007 | Low-overhead design technique for calibration of maximum frequency at multiple operating points. Somnath Paul, Sivasubramaniam Krishnamurthy, Hamid Mahmoodi, Swarup Bhunia |
| 2007 | MOSFET modeling for 45nm and beyond. Yu Cao, Colin C. McAndrew |
| 2007 | Mapping model with inter-array memory sharing for multidimensional signal processing. Ilie I. Luican, Hongwei Zhu, Florin Balasa |
| 2007 | Methodology for low power test pattern generation using activity threshold control logic. Srivaths Ravi, V. R. Devanathan, Rubin A. Parekhji |
| 2007 | Minimizing leakage power in sequential circuits by using mixed Jaehyun Kim, Youngsoo Shin |
| 2007 | Modeling, optimization and control of rotary traveling-wave oscillator. Cheng Zhuo, Huafeng Zhang, Rupak Samanta, Jiang Hu, Kangsheng Chen |
| 2007 | Module assignment for pin-limited designs under the stacked-Vdd paradigm. Yong Zhan, Tianpei Zhang, Sachin S. Sapatnekar |
| 2007 | Monte-Carlo driven stochastic optimization framework for handling fabrication variability. Vishal Khandelwal, Ankur Srivastava |
| 2007 | Multi-layer interconnect performance corners for variation-aware timing analysis. Frank Huebbers, Ali Dasdan, Yehea I. Ismail |
| 2007 | Novel wire density driven full-chip routing for CMP variation control. Huang-Yu Chen, Szu-Jui Chou, Sheng-Lung Wang, Yao-Wen Chang |
| 2007 | Operation chaining asynchronous pipelined circuits. Girish Venkataramani, Seth Copen Goldstein |
| 2007 | Optimal bus sequencing for escape routing in dense PCBs. Hui Kong, Tan Yan, Martin D. F. Wong, Muhammet Mustafa Ozdal |
| 2007 | Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design. Philip Brisk, Ajay Kumar Verma, Paolo Ienne |
| 2007 | Parallel domain decomposition for simulation of large-scale power grids. Kai Sun, Quming Zhou, Kartik Mohanram, Danny C. Sorensen |
| 2007 | Parameterized model order reduction via a two-directional Arnoldi process. Yung-Ta Li, Zhaojun Bai, Yangfeng Su, Xuan Zeng |
| 2007 | Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture. Chen Dong, Deming Chen, Sansiri Tanachutiwat, Wei Wang |
| 2007 | Practical method for obtaining a feasible integer solution in hierarchical layout optimization. Xiaoping Tang, Xin Yuan, Michael S. Gray |
| 2007 | Principle Hessian direction based parameter reduction with process variation. Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang |
| 2007 | Probabilistic decision diagrams for exact probabilistic analysis. Afshin Abdollahi |
| 2007 | Procrastination determination for periodic real-time tasks in leakage-aware dynamic voltage scaling systems. Jian-Jia Chen, Tei-Wei Kuo |
| 2007 | Remote activation of ICs for piracy prevention and digital right management. Yousra Alkabani, Farinaz Koushanfar, Miodrag Potkonjak |
| 2007 | Run-time adaptive on-chip communication scheme. Mohammad Abdullah Al Faruque, Thomas Ebi, Jörg Henkel |
| 2007 | Scalable exploration of functional dependency by interpolation and incremental SAT solving. Chih-Chun Lee, Jie-Hong Roland Jiang, Chung-Yang Huang, Alan Mishchenko |
| 2007 | Selective shielding: a crosstalk-free bus encoding technique. Madhu Mutyam |
| 2007 | Sensitivity analysis for oscillators. Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram |
| 2007 | Simultaneous input vector selection and dual threshold voltage assignment for static leakage minimization. Lin Yuan, Gang Qu |
| 2007 | Sizing and placement of charge recycling transistors in MTCMOS circuits. Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram |
| 2007 | Skew aware polarity assignment in clock tree. Po-Yuan Chen, Kuan-Hsien Ho, TingTing Hwang |
| 2007 | Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip. Zhonghai Lu, Axel Jantsch |
| 2007 | Soft-edge flip-flops for improved timing yield: design and optimization. Vivek Joshi, David T. Blaauw, Dennis Sylvester |
| 2007 | Sparse and passive reduction of massively coupled large multiport interconnects. Natalie Nakhla, Michel S. Nakhla, Ramachandra Achar |
| 2007 | Stabilizing schemes for piecewise-linear reduced order models via projection and weighting functions. Bradley N. Bond, Luca Daniel |
| 2007 | Statistical analysis of RF circuits using combined circuit simulator-full wave field solver approach. Arun V. Sathanur, Ritochit Chakraborty, Vikram Jandhyala |
| 2007 | Stimulus generation for constrained random simulation. Nathan Kitchen, Andreas Kuehlmann |
| 2007 | Stochastic extended Krylov subspace method for variational analysis of on-chip power grid networks. Ning Mi, Sheldon X.-D. Tan, Pu Liu, Jian Cui, Yici Cai, Xianlong Hong |
| 2007 | Strategies for improving the parametric yield and profits of 3D ICs. Cesare Ferri, Sherief Reda, R. Iris Bahar |
| 2007 | TIP-OPC: a new topological invariant paradigm for pixel based optical proximity correction. Peng Yu, David Z. Pan |
| 2007 | Temperature aware microprocessor floorplanning considering application dependent power load. Chunta Chu, Xinyi Zhang, Lei He, Tong Jing |
| 2007 | The FAST methodology for high-speed SoC/computer simulation. Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Patil, William H. Reinhart, Darrel Eric Johnson, Zheng Xu |
| 2007 | The coming of age of physical synthesis. Charles J. Alpert, Chris C. N. Chu, Paul G. Villarrubia |
| 2007 | The design and synthesis of a synchronous and distributed MAC protocol for wireless network-on-chip. Yi Wang, Dan Zhao |
| 2007 | The effect of process variation on device temperature in FinFET circuits. Jung Hwan Choi, Jayathi Murthy, Kaushik Roy |
| 2007 | Thermal-aware Steiner routing for 3D stacked ICs. Mohit Pathak, Sung Kyu Lim |
| 2007 | Timing budgeting under arbitrary process variations. Ruiming Chen, Hai Zhou |
| 2007 | Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig |
| 2007 | Timing optimization by restructuring long combinatorial paths. Jürgen Werber, Dieter Rautenbach, Christian Szegedy |
| 2007 | Timing variation-aware high-level synthesis. Jongyoon Jung, Taewhan Kim |
| 2007 | Unified adaptivity optimization of clock and logic signals. Shiyan Hu, Jiang Hu |
| 2007 | Untangling twisted nets for bus routing. Tan Yan, Martin D. F. Wong |
| 2007 | Using functional independence conditions to optimize the performance of latency-insensitive systems. Cheng-Hong Li, Luca P. Carloni |
| 2007 | Variable domain transformation for linear PAC analysis of mixed-signal systems. Jaeha Kim, Kevin D. Jones, Mark A. Horowitz |
| 2007 | Variation-aware performance verification using at-speed structural test and statistical timing. Vikram Iyengar, Jinjun Xiong, Subbayyan Venkatesan, Vladimir Zolotov, David E. Lackey, Peter A. Habitz, Chandu Visweswariah |
| 2007 | Variation-aware task allocation and scheduling for MPSoC. Feng Wang, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan |
| 2007 | Victim alignment in crosstalk aware timing analysis. Ravikishore Gandikota, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester, Murat R. Becer, Joao Geada |
| 2007 | Voltage island-driven floorplanning. Qiang Ma, Evangeline F. Y. Young |
| 2007 | Yield-aware analog integrated circuit optimization using geostatistics motivated performance modeling. Guo Yu, Peng Li |
| 2007 | Yield-driven near-threshold SRAM design. Gregory K. Chen, David T. Blaauw, Trevor N. Mudge, Dennis Sylvester, Nam Sung Kim |