ICCAD A

136 papers

YearTitle / Authors
20042004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004
2004A chip-level electrostatic discharge simulation strategy.
Haifeng Qian, Joseph N. Kozhaya, Sani R. Nassif, Sachin S. Sapatnekar
2004A circuit model for carbon nanotube interconnects: comparative study with Cu interconnects for scaled technologies.
Arijit Raychowdhury, Kaushik Roy
2004A flexibility aware budgeting for hierarchical flow timing closure.
Olivier Omedes, Michel Robert, Mohammed Ramdani
2004A general framework for probabilistic low-power design space exploration considering process variation.
Ashish Srivastava, Dennis Sylvester
2004A metal and via maskset programmable VLSI design methodology using PLAs.
Nikhil Jayakumar, Sunil P. Khatri
2004A new incremental placement algorithm and its application to congestion-aware divisor extraction.
Satrajit Chatterjee, Robert K. Brayton
2004A novel clock distribution and dynamic de-skewing methodology.
Arjun Kapoor, Nikhil Jayakumar, Sunil P. Khatri
2004A path-based methodology for post-silicon timing validation.
Leonard Lee, Li-C. Wang, T. M. Mak, Kwang-Ting Cheng
2004A power aware system level interconnect design methodology for latency-insensitive systems.
Vikas Chandra, Herman Schmit, Anthony Xu, Lawrence T. Pileggi
2004A provably good algorithm for high performance bus routing.
Muhammet Mustafa Ozdal, Martin D. F. Wong
2004A quantitative study and estimation models for extensible instructions in embedded processors.
Newton Cheung, Sri Parameswaran, Jörg Henkel
2004A robust cell-level crosstalk delay change analysis.
Igor Keller, Ken Tseng, Nishath K. Verghese
2004A soft error rate analysis (SERA) methodology.
Ming Zhang, Naresh R. Shanbhag
2004A stochastic integral equation method for modeling the rough surface effect on interconnect capacitance.
Zhenhai Zhu, Jacob K. White, Alper Demir
2004A thermal-driven floorplanning algorithm for 3D ICs.
Jason Cong, Jie Wei, Yan Zhang
2004A unified theory of timing budget management.
Soheil Ghiasi, Elaheh Bozorgzadeh, Siddharth Choudhuri, Majid Sarrafzadeh
2004A vectorless estimation of maximum instantaneous current for sequential circuits.
Cheng-Tao Hsieh, Jian-Cheng Lin, Shih-Chieh Chang
2004A yield improvement methodology using pre- and post-silicon statistical clock scheduling.
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja
2004Accurate estimation of global buffer delay within a floorplan.
Charles J. Alpert, Jiang Hu, Sachin S. Sapatnekar, Cliff C. N. Sze
2004Adaptive sampling and modeling of analog circuit performance parameters with pseudo-cubic splines.
Ranga Vemuri, Glenn Wolfe
2004An analytic placer for mixed-size placement and timing-driven placement.
Andrew B. Kahng, Qinke Wang
2004An efficient method for improving the quality of per-test fault diagnosis.
Chunsheng Liu
2004An integrated design flow for a via-configurable gate array.
Yajun Ran, Malgorzata Marek-Sadowska
2004Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing.
Guido Stehr, Helmut E. Graeb, Kurt Antreich
2004Analysis and evaluation of a hybrid interconnect structure for FPGAs.
Renqiu Huang, Ranga Vemuri
2004Analytical modeling of crosstalk noise waveforms using Weibull function.
Alireza Kasnavi, Joddy W. Wang, Mahmoud Shahram, Jindrich Zejda
2004Analyzing software influences on substrate noise: an ADC perspective.
Frank Ghenassia, Narayanan Vijaykrishnan, Mary Jane Irwin
2004Application-specific buffer space allocation for networks-on-chip router design.
Jingcao Hu, Radu Marculescu
2004Architectural-level synthesis of digital microfluidics-based biochips.
Fei Su, Krishnendu Chakrabarty
2004Asymptotic probability extraction for non-normal distributions of circuit performance.
Xin Li, Jiayong Le, Padmini Gopalakrishnan, Lawrence T. Pileggi
2004Automated oscillator macromodelling techniques for capturing amplitude variations and injection locking.
Xiaolue Lai, Jaijeet S. Roychowdhury
2004Automatic translation of behavioral testbench for fully accelerated simulation.
Young-Il Kim, Chong-Min Kyung
2004Backend CAD flows for "restrictive design rules".
Mark A. Lavin, Fook-Luen Heng, Gregory A. Northrop
2004Banked scratch-pad memory management for reducing leakage energy consumption.
Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, Ibrahim Kolcu
2004Checking consistency of C and Verilog using predicate abstraction and induction.
Daniel Kroening, Edmund M. Clarke
2004Clock schedule verification under process variations.
Ruiming Chen, Hai Zhou
2004Code partitioning for synthesis of embedded applications with phantom.
André C. Nácul, Tony Givargis
2004Computation of signal threshold crossing times directly from higher order moments.
Yehea I. Ismail, Chirayu S. Amin
2004Configuration bitstream compression for dynamically reconfigurable FPGAs.
Lei He, Tulika Mitra, Weng-Fai Wong
2004Cost-effective radiation hardening technique for combinational logic.
Quming Zhou, Kartik Mohanram
2004Custom-optimized multiplierless implementations of DSP algorithms.
Markus Püschel, Adam C. Zelinski, James C. Hoe
2004DAG-aware circuit compression for formal verification.
Per Bjesse, Arne Borälv
2004DAOmap: a depth-optimal area optimization mapping algorithm for FPGA designs.
Deming Chen, Jason Cong
2004Debugging sequential circuits using Boolean satisfiability.
Moayad Fahim Ali, Andreas G. Veneris, Alexander Smith, Sean Safarpour, Rolf Drechsler, Magdy S. Abadir
2004Delay noise pessimism reduction by logic correlations.
Alexey Glebov, Sergey Gavrilov, R. Soloviev, Vladimir Zolotov, Murat R. Becer, Chanhee Oh, Rajendran Panda
2004Design space exploration for a UMTS front-end exploiting analog platforms.
F. De Bernarclinis, S. Gambini, R. Vincis, Francesco Svelto
2004Design space exploration for aggressive test cost reduction in CircularScan architectures.
Baris Arslan, Alex Orailoglu
2004Design/process learning from electrical test.
Bernd Koenemann
2004Detection of multiple transitions in delay fault test of SPARC64 microprocessor.
Daisuke Maruyama, Akira Kanuma, Takashi Mochiyama, Hiroaki Komatsu, Yaroku Sugiyama, Noriyuki Ito
2004Diagnosis of small-signal parameters for broadband amplifiers through S-parameter measurements and sensitivity-guided evolutionary search.
Fang Liu, Sule Ozev, Martin A. Brooke
2004Dynamic range estimation for nonlinear systems.
Bin Wu, Jianwen Zhu, Farid N. Najm
2004Dynamic transition relation simplification for bounded property checking.
Andreas Kuehlmann
2004Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation.
Kihwan Choi, Wonbok Lee, Ramakrishna Soma, Massoud Pedram
2004DynamoSim: a trace-based dynamically compiled instruction set simulator.
Massimo Poncino, Jianwen Zhu
2004Efficient SAT-based unbounded symbolic model checking using circuit cofactoring.
Malay K. Ganai, Aarti Gupta, Pranav Ashar
2004Efficient computation of small abstraction refinements.
Bing Li, Fabio Somenzi
2004Efficient full-chip thermal modeling and analysis.
Peng Li, Lawrence T. Pileggi, Mehdi Asheghi, Rajit Chandra
2004Efficient harmonic balance simulation using multi-level frequency decomposition.
Peng Li, Lawrence T. Pileggi
2004Efficient statistical timing analysis through error budgeting.
Vishal Khandelwal, Azadeh Davoodi, Ankur Srivastava
2004Energy optimization for a two-device data flow chain.
Ravishankar Rao, Sarma B. K. Vrudhula
2004Engineering details of a stable force-directed placer.
Kristofer Vorwerk, Andrew A. Kennings, Anthony Vannelli
2004Exact and heuristic approaches to input vector control for leakage power reduction.
Feng Gao, John P. Hayes
2004Exploiting level sensitive latches in wire pipelining.
V. Seth, Min Zhao, Jiang Hu
2004FLUTE: fast lookup table based wirelength estimation technique.
Chris Chu
2004Factoring and eliminating common subexpressions in polynomial expressions.
Anup Hosangadi, Farzan Fallah, Ryan Kastner
2004Fast flip-chip power grid analysis via locality and grid shells.
Eli Chiprout
2004Fast simulation of VLSI interconnects.
Jitesh Jain, Cheng-Kok Koh, Venkataramanan Balakrishnan
2004Floorplan design for multi-million gate FPGAs.
Lei Cheng, Martin D. F. Wong
2004Formal derivation of optimal active shielding for low-power on-chip buses.
Maged Ghoneima, Yehea I. Ismail
2004Formal verification coverage: computing the coverage gap between temporal specifications.
Sayantan Das, Prasenjit Basu, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni
2004Frequency domain simulation of high-Q oscillators with homotopy methods.
Xiaochun Duan, Kartikeya Mayaram
2004Frugal linear network-based test decompression for drastic test cost reductions.
Wenjing Rao, Alex Orailoglu, George Su
2004Gate sizing for crosstalk reduction under timing constraints by Lagrangian relaxation.
Debjit Sinha, Hai Zhou
2004Guiding CNF-SAT search via efficient constraint partitioning.
Vijay Durairaj, Priyank Kalla
2004Hardware/software managed scratchpad memory for embedded system.
Andhi Janapsatya, Sri Parameswaran, Aleksandar Ignjatovic
2004Hermes: LUT FPGA technology mapping algorithm for area minimization with optimum depth.
Maxim Teslenko, Elena Dubrova
2004HiSIM: hierarchical interconnect-centric circuit simulator.
Tsung-Hao Chen, Jeng-Liang Tsai, Tanay Karnik
2004High-level synthesis using computation-unit integrated memories.
Chao Huang, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
2004High-level synthesis: an essential ingredient for designing complex ASICs.
Arvind, Rishiyur S. Nikhil, Daniel L. Rosenband, Nirav Dave
2004How to bridge the abstraction gap in system level modeling and design.
A. Bernstein, M. Burton, Frank Ghenassia
2004Hybrid techniques for electrostatic analysis of nanowires.
Gang Li, Narayan R. Aluru
2004Improved use of the carry-save representation for the synthesis of complex arithmetic circuits.
Ajay Kumar Verma, Paolo Ienne
2004Improving soft-error tolerance of FPGA configuration bits.
Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin
2004Incremental deductive & inductive reasoning for SAT-based bounded model checking.
Liang Zhang, Mukul R. Prasad, Michael S. Hsiao
2004Interconnect lifetime prediction under dynamic stress for reliability-aware design.
Zhijian Lu, Wei Huang, John C. Lach, Mircea R. Stan, Kevin Skadron
2004Interval-valued reduced order statistical interconnect modeling.
James D. Ma, Rob A. Rutenbar
2004Leakage control through fine-grained placement and sizing of sleep transistors.
Vishal Khandelwal, Ankur Srivastava
2004Logical effort based technology mapping.
Shrirang K. Karandikar, Sachin S. Sapatnekar
2004Low-power programmable routing circuitry for FPGAs.
Jason Helge Anderson, Farid N. Najm
2004M-trie: an efficient approach to on-chip logic minimization.
Seraj Ahmad, Rabi N. Mahapatra
2004Minimizing the number of test configurations for FPGAs.
Erik Chmelar
2004Modeling unbuffered latches for timing analysis.
Chirayu S. Amin, Florentin Dartu, Yehea I. Ismail
2004Multilevel expansion-based VLSI placement with blockages.
Bo Hu, Malgorzata Marek-Sadowska
2004On breakable cyclic definitions.
Jie-Hong Roland Jiang, Alan Mishchenko, Robert K. Brayton
2004On interactions between routing and detailed placement.
Devang Jariwala, John Lillis
2004On per-test fault diagnosis using the X-fault model.
Xiaoqing Wen, Tokiharu Miyoshi, Seiji Kajihara, Laung-Terng Wang, Kewal K. Saluja, Kozo Kinoshita
2004Optimal wire retiming without binary search.
Chuan Lin, Hai Zhou
2004Optimizing mode transition sequences in idle intervals for component-level and system-level energy minimization.
Jinfeng Liu, Pai H. Chou
2004Physical placement driven by sequential timing analysis.
Aaron P. Hurst, Philip Chong, Andreas Kuehlmann
2004Power estimation for cycle-accurate functional descriptions of hardware.
Lin Zhong, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
2004Process and environmental variation impacts on ASIC timing.
Paul S. Zuchowski, Peter A. Habitz, J. D. Hayes, J. H. Oppold
2004Reducing cache misses by application-specific re-configurable indexing.
Kimish Patel, Enrico Macii, Luca Benini, Massimo Poncino
2004Robust analog/RF circuit design with projection-based posynomial modeling.
Xin Li, Padmini Gopalakrishnan, Yang Xu, Lawrence T. Pileggi
2004Routability-driven placement and white space allocation.
Chen Li, Min Xie, Cheng-Kok Koh, Jason Cong, Patrick H. Madden
2004SAPOR: second-order Arnoldi method for passive order reduction of RCS circuits.
Yangfeng Su, Jian Wang, Xuan Zeng, Zhaojun Bai, Charles C. Chiang, Dian Zhou
2004SILENT: serialized low energy transmission coding for on-chip interconnection networks.
Kangmin Lee, Se-Joong Lee, Hoi-Jun Yoo
2004SPIN-TEST: automatic test pattern generation for speed-independent circuits.
Feng Shi, Yiorgos Makris
2004SPRIM: structure-preserving reduced-order interconnect macromodeling.
Roland W. Freund
2004Simultaneous communication and processor voltage scaling for dynamic and leakage energy reduction in time-constrained systems.
Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
2004Simultaneous design and placement of multiplexed chemical processing systems on microchips.
Anton J. Pfeiffer, Tamal Mukherjee, Steinar Hauan
2004Simultaneous escape routing and layer assignment for dense PCBs.
Muhammet Mustafa Ozdal, Martin D. F. Wong
2004Simultaneous short-path and long-path timing optimization for FPGAs.
Ryan Fung, Vaughn Betz, William Chow
2004Soft self-synchronising codes for self-calibrating communication.
Frederic Worm, Paolo Ienne, Patrick Thiran
2004Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals.
Peter Feldmann, Frank Liu
2004Static statistical timing analysis for latch-based pipeline designs.
Rob A. Rutenbar, Li-C. Wang, Kwang-Ting Cheng, Sandip Kundu
2004Statistical design and optimization of SRAM cell for yield enhancement.
Saibal Mukhopadhyay, Hamid Mahmoodi-Meimand, Kaushik Roy
2004Stochastic analysis of interconnect performance in the presence of process variations.
Janet Meiling Wang, Praveen Ghanta, Sarma B. K. Vrudhula
2004Techniques for improving the accuracy of geometric-programming based analog circuit design optimization.
Jintae Kim, Jaeseo Lee, Lieven Vandenberghe
2004Temporal floorplanning using the T-tree formulation.
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang
2004The care and feeding of your statistical static timer.
Sani R. Nassif, Duane S. Boning, Nagib Hakim
2004The effects of energy management on reliability in real-time embedded systems.
Dakai Zhu, Rami G. Melhem, Daniel Mossé
2004The impact of device parameter variations on the frequency and performance of VLSI chips.
S. B. Samaan
2004Theoretical framework for compositional sequential hardware equivalence verification in presence of design constraints.
Zurab Khasidashvili, Marcelo Skaba, Daher Kaiss, Ziyad Hanna
2004Timing analysis considering spatial power/ground level variation.
Masanori Hashimoto, Junji Yamaguchi, Hidetoshi Onodera
2004Timing macro-modeling of IP blocks with crosstalk.
Ruiming Chen, Hai Zhou
2004Towards formal verification of analog designs.
Smriti Gupta, Bruce H. Krogh, Rob A. Rutenbar
2004True crosstalk aware incremental placement with noise map.
Haoxing Ren, David Zhigang Pan, Paul Villarrubia
2004Unification of partitioning, placement and floorplanning.
Saurabh N. Adya, S. Chaturvedi, Jarrod A. Roy, David A. Papa, Igor L. Markov
2004Variability in sub-100nm SRAM designs.
Raymond A. Heald, Ping Wang
2004Variability inspired implementation selection problem.
Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava
2004Variational interconnect analysis via PMTBR.
Joel R. Phillips
2004Vdd programmability to reduce FPGA interconnect power.
Fei Li, Yan Lin, Lei He
2004Verifying properties of hardware and software by predicate abstraction and model checking.
Randal E. Bryant, Sriram K. Rajamani
2004Voltage-drop-constrained optimization of power distribution network based on reliable maximum current estimates.
Nestoras E. Evmorfopoulos, Dimitris P. Karampatzakis, Georgios I. Stamoulis
2004Wire-length prediction using statistical techniques.
Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwal, Ankur Srivastava, Miodrag Potkonjak