ICCAD A

137 papers

YearTitle / Authors
20032003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003
2003A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits.
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeon, Adrian M. Ionescu
2003A Fast Crosstalk- and Performance-Driven Multilevel Routing System.
Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen, D. T. Lee
2003A Framework for Constrained Functional Verification.
Jun Yuan, Carl Pixley, Adnan Aziz, Ken Albin
2003A Framework for Designing Reusable Analog Circuits.
Dean Liu, Stefanos Sidiropoulos, Mark Horowitz
2003A Game Theoretic Approach to Dynamic Energy Minimization in Wireless Transceivers.
Ali Iranli, Hanif Fatemi, Massoud Pedram
2003A General S-Domain Hierarchical Network Reduction Algorithm.
Sheldon X.-D. Tan
2003A Generalized Method for Computing Oscillator Phase Noise Spectra.
Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen
2003A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits.
Rahul M. Rao, Frank Liu, Jeffrey L. Burns, Richard B. Brown
2003A High-level Interconnect Power Model for Design Space Exploration.
Pallav Gupta, Lin Zhong, Niraj K. Jha
2003A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits.
Peng Li, Xin Li, Yang Xu, Lawrence T. Pileggi
2003A Methodology for the Computation of an Upper Bound on Nose Current Spectrum of CMOS Switching Activity.
Alessandra Nardi, Haibo Zeng, Joshua L. Garrett, Luca Daniel, Alberto L. Sangiovanni-Vincentelli
2003A Min-Cost Flow Based Detailed Router for FPGAs.
Seokjin Lee, Yongseok Cheon, Martin D. F. Wong
2003A New Surface Integral Formulation For Wideband Impedance Extraction of 3-D Structures.
Ben Song, Zhenhai Zhu, John D. Rockway, Jacob K. White
2003A Novel Geometric Algorithm for Fast Wire-Optimized Floorplanning.
Peter G. Sassone, Sung Kyu Lim
2003A Probabilistic Approach to Buffer Insertion.
Vishal Khandelwal, Azadeh Davoodi, Akash Nanavati, Ankur Srivastava
2003A Probabilistic-Based Design Methodology for Nanoscale Computation.
R. Iris Bahar, Joseph L. Mundy, Jie Chen
2003A Scalable Application-Specific Processor Synthesis Methodology.
Fei Sun, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
2003A Statistical Approach to Estimate the Dynamic Non-Linearity Parameters of Pipeline ADCs.
Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei
2003A Statistical Gate-Delay Model Considering Intra-Gate Variability.
Ken-ichi Okada, Kento Yamaoka, Hidetoshi Onodera
2003A Sum-over-Paths Impulse-Response Moment-Extraction Algorithm for IC-Interconnect Networks: Verification, Coupled RC Lines.
Yannick L. Le Coz, Dhivya Krishna, Dusan M. Petranovic, William M. Loh, Peter Bendix
2003A Theory of Non-Deterministic Networks.
Alan Mishchenko, Robert K. Brayton
2003A Trade-off Oriented Placement Tool.
Huaiyu Xu, Maogang Wang, Bo-Kyung Choi, Majid Sarrafzadeh
2003ATPG for Noise-Induced Switch Failures in Domino Logic.
Rahul Kundu, R. D. (Shawn) Blanton
2003AU: Timing Analysis Under Uncertainty.
Sarvesh Bhardwaj, Sarma B. K. Vrudhula, David T. Blaauw
2003Achieving Design Closure Through Delay Relaxation Parameter.
Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Choi, Majid Sarrafzadeh
2003Adapative Error Protection for Energy Efficiency.
Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2003Adjustable Width Linear Combinational Scan Vector Decompression.
C. V. Krishna, Nur A. Touba
2003Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module Level.
Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Hsien-Hsin S. Lee
2003Amplification of Ultrawideband Signals.
Won Namgoong, Jongrit Lerdworatawee
2003An Algorithmic Approach for Generic Parallel Adders.
Jianhua Liu, Shuo Zhou, Haikun Zhu, Chung-Kuan Cheng
2003An Enhanced Multilevel Algorithm for Circuit Placement.
Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shinnerl, Kenton Sze
2003Analog Macromodeling using Kernel Methods.
Joel R. Phillips, João Afonso, Arlindo L. Oliveira, Luís Miguel Silveira
2003Analytic Modeling of Interconnects for Deep Sub-Micron Circuits.
Dinesh Pamunuwa, Shauki Elassaad, Hannu Tenhunen
2003Analytical Bound for Unwanted Clock Skew due to Wire Width Variation.
Anand Rajaram, Bing Lu, Wei Guo, Rabi N. Mahapatra, Jiang Hu
2003Approaching the Maximum Energy Saving on Embedded Systems with Multiple Voltages.
Shaoxiong Hua, Gang Qu
2003Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication.
Jason Cong, Yiping Fan, Guoling Han, Xun Yang, Zhiru Zhang
2003Array Composition and Decomposition for Optimizing Embedded Applications.
Guilin Chen, Mahmut T. Kandemir, A. Nadgir, Ugur Sezer
2003Binding, Allocation and Floorplanning in Low Power High-Level Synthesis.
Ansgar Stammermann, Domenik Helms, Milan Schulte, Arne Schulz, Wolfgang Nebel
2003Block-based Static Timing Analysis with Uncertainty.
Anirudh Devgan, Chandramouli V. Kashyap
2003Branch Merge Reduction of RLCM Networks.
Bernard N. Sheehan
2003Bus-Driven Floorplanning.
Hua Xiang, Xiaoping Tang, Martin D. F. Wong
2003CAMA: A Multi-Valued Satisfiability Solver.
Cong Liu, Andreas Kuehlmann, Matthew W. Moskewicz
2003Cache Optimization For Embedded Processor Cores: An Analytical Approach.
Arijit Ghosh, Tony Givargis
2003Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics.
Jiayong Le, Lawrence T. Pileggi, Anirudh Devgan
2003Clock Period Minimization of Non-Zero Clock Skew Circuits.
Shih-Hsu Huang, Yow-Tyng Nieh
2003Clock Scheduling and Clocktree Construction for High Performance ASICS.
Stephan Held, Bernhard Korte, Jens Maßberg, Matthias Ringe, Jens Vygen
2003Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design.
Junhyung Um, Taewhan Kim
2003Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems.
Le Yan, Jiong Luo, Niraj K. Jha
2003Communication-Aware Task Scheduling and Voltage Selection for Total Systems Energy Minimization.
Girish Varatkar, Radu Marculescu
2003Compiler-Based Register Name Adjustment for Low-Power Embedded Processors.
Peter Petrov, Alex Orailoglu
2003Design and CAD Challenges in sub-90nm CMOS Technologies.
Kerry Bernstein, Ching-Te Chuang, Rajiv V. Joshi, Ruchir Puri
2003Dynamic Data-bit Memory Built-In Self- Repair.
Michael Nicolaidis, Nadir Achouri, Slimane Boutobza
2003Dynamic Fault-Tolerance and Metrics for Battery Powered, Failure-Prone Systems.
Phillip Stanley-Marbell, Diana Marculescu
2003Dynamic Platform Management for Configurable Platform-Based System-on-Chips.
Krishna Sekar, Kanishka Lahiri, Sujit Dey
2003Efficient Generation of Monitor Circuits for GSTE Assertion Graphs.
Alan J. Hu, Jeremy Casas, Jin Yang
2003Efficient Iterative Time Preconditioners for Harmonic Balance RF Circuit Simulation.
Fabrice Veersé
2003Efficient Thermal Placement of Standard Cells in 3D ICs using a Force Directed Approach.
Brent Goplen, Sachin S. Sapatnekar
2003Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits.
Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda
2003Energy Optimization of Distributed Embedded Processors by Combined Data Compression and Functional Partitioning.
Jinfeng Liu, Pai H. Chou
2003Energy-Aware Fault Tolerance in Fixed-Priority Real-Time Embedded Systems.
Ying Zhang, Krishnendu Chakrabarty, Vishnu Swaminathan
2003Equivalent Waveform Propagation for Static Timing Analysis.
Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera
2003Evaluation of Placement Techniques for DNA Probe Array Layout.
Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu Xu, Alexander Zelikovsky
2003FAME: A Fault-Pattern Based Memory Failure Analysis Framework.
Kuo-Liang Cheng, Chih-Wea Wang, Jih-Nung Lee, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu
2003FROSTY: A Fast Hierarchy Extractor for Industrial CMOS Circuits.
Lei Yang, Chuanjin Richard Shi
2003Fast Cycle-accurate Behavioral Simulation for Pipelined Processors Using Early Pipeline Evaluation.
In-Cheol Park, Se-Hyeon Kang, Yongseok Yi
2003Fast, Accurate Static Analysis for Fixed-Point Finite-Precision Effects in DSP Designs.
Claire Fang Fang, Rob A. Rutenbar, Tsuhan Chen
2003Fault-Tolerant Techniques for Ambient Intelligent Distributed Systems.
Diana Marculescu, Nicholas H. Zamora, Phillip Stanley-Marbell, Radu Marculescu
2003Formal Methods for Dynamic Power Management.
Rajesh K. Gupta, Sandy Irani, Sandeep K. Shukla
2003Fractional Cut: Improved Recursive Bisection Placement.
Ameya R. Agnihotri, Mehmet Can Yildiz, Ateen Khatkhate, Ajita Mathur, Satoshi Ono, Patrick H. Madden
2003Fredkin/Toffoli Templates for Reversible Logic Synthesis.
Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller
2003Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion.
Weiping Liao, Lei He
2003Generalized Network Flow Techniques for Dynamic Voltage Scaling in Hard Real-Time Systems.
Vishnu Swaminathan, Krishnendu Chakrabarty
2003Generator-based Verification.
Yunshan Zhu, James H. Kukula
2003Gradual Relaxation Techniques with Applications to Behavioral Synthesis.
Zhiru Zhang, Yiping Fan, Miodrag Potkonjak, Jason Cong
2003Hardware Scheduling for Dynamic Adaptability using External Profiling and Hardware Threading.
Brian Swahn, Soha Hassoun
2003Hardware/Software Co-testing of Embedded Memories in Complex SOCs.
Bai Hong Fang, Qiang Xu, Nicola Nicolici
2003IDAP: A Tool for High Level Power Estimation of Custom Array Structures.
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt, Magdy S. Abadir
2003ILP Models for the Synthesis of Asynchronous Control Circuits.
Josep Carmona, Jordi Cortadella
2003INSIDE: INstruction Selection/Identification & Design Exploration for Extensible Processors.
Newton Cheung, Sri Parameswaran, Jörg Henkel
2003Improving Ariadneýs Bundle by Following Multiple Threads in Abstraction Refinement.
Chao Wang, Bing Li, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi
2003Incremental Placement for Timing Optimization.
Wonjoon Choi, Kia Bazargan
2003Initial Sizing of Analog Integrated Circuits by Centering Within Topology-Given Implicit Specification.
Guido Stehr, Michael Pronath, Frank Schenkel, Helmut E. Graeb, Kurt Antreich
2003Iterative Abstraction using SAT-based BMC with Proof Analysis.
Aarti Gupta, Malay K. Ganai, Zijiang Yang, Pranav Ashar
2003LRU-SEQ: A Novel Replacement Policy for Transition Energy Reduction in Instruction Caches.
Praveen Kalla, Xiaobo Sharon Hu, Jörg Henkel
2003Large-Scale Circuit Placement: Gap and Promise.
Jason Cong, Tim Kong, Joseph R. Shinnerl, Min Xie, Xin Yuan
2003Layout-Aware Scan Chain Synthesis for Improved Path Delay Fault Coverage.
Puneet Gupta, Andrew B. Kahng, Ion I. Mandoiu, Puneet Sharma
2003Leakage Power Optimization Techniques for Ultra Deep Sub-Micron Multi-Level Caches.
Nam Sung Kim, David T. Blaauw, Trevor N. Mudge
2003Length-Matching Routing for High-Speed Printed Circuit Boards.
Muhammet Mustafa Ozdal, Martin D. F. Wong
2003Manufacturing-Aware Physical Design.
Puneet Gupta, Andrew B. Kahng
2003Minimum-Area Sequential Budgeting for FPGA.
Chao-Yang Yeh, Malgorzata Marek-Sadowska
2003Mixed Signal DFT: A Concise Overview.
Bozena Kaminska, Karim Arabi
2003Modeling of Ballistic Carbon Nanotube Field Effect Transistors for Efficient Circuit Simulation.
Arijit Raychowdhury, Saibal Mukhopadhyay, Kaushik Roy
2003Moment-Based Power Estimation in Very Deep Submicron Technologies.
Alberto García Ortiz, Lukusa D. Kabulepa, Tudor Murgan, Manfred Glesner
2003Multi-Domain Clock Skew Scheduling.
Kaushik Ravindran, Andreas Kuehlmann, Ellen Sentovich
2003Multi-Million Gate FPGA Physical Design Challenges.
Maogang Wang, Abhishek Ranjan, Salil Raje
2003Multi.Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization.
Navaratnasothie Selvakkumaran, George Karypis
2003Noise Analysis for Optical Fiber Communication Systems.
Alper Demir
2003On Application of Output Masking to Undetectable Faults in Synchronous Sequential Circuits with Design-for-Testability Logic.
Irith Pomeranz, Sudhakar M. Reddy
2003On Compacting Test Response Data Containing Unknown Values.
Chen Wang, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski, Jerzy Tyszer
2003On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis.
Saurabh N. Adya, Igor L. Markov, Paul Villarrubia
2003On the Interaction Between Power-Aware FPGA CAD Algorithms.
Julien Lamoureux, Steven J. E. Wilton
2003Optimality and Stability Study of Timing-Driven Placement Algorithms.
Jason Cong, Michail Romesis, Min Xie
2003Partial Core Encryption for Performance-Efficient Test of SOCs.
Ozgur Sinanoglu, Alex Orailoglu
2003Passive Synthesis of Compact Frequency-Dependent Interconnect Models via Quadrature Spectral Rules.
Traianos V. Yioultsis, Anne Woo, Andreas C. Cangellaris
2003Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis.
Abhishek Singh, Jitin Tharian, Jim Plusquellic
2003Performance Efficiency of Context-Flow System-on-Chip Platform.
Rami Beidas, Jianwen Zhu
2003Performance Optimization of Latency Insensitive Systems Through Buffer Queue Sizing of Communication Channels.
Ruibing Lu, Cheng-Kok Koh
2003Physical And Reduced-Order Dynamic Analysis of MEMS.
S. K. De, Narayan R. Aluru
2003Placement Method Targeting Predictability Robustness and Performance.
Cristinel Ababei, Kia Bazargan
2003Power-Optimal Simultaneous Buffer Insertion/Sizing and Wire Sizing.
Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng
2003RTL Power Optimization with Gate-Level Accuracy.
Qi Wang, Sumit Roy
2003Retiming for Wire Pipelining in System-On-Chip.
Chuan Lin, Hai Zhou
2003Retiming with Interconnect and Gate Delay.
Chris C. N. Chu, Evangeline F. Y. Young, Dennis K. Y. Tong, Sampath Dechu
2003SAMBA-Bus: A High Performance Bus Architecture for System-on-Chips.
Ruibing Lu, Cheng-Kok Koh
2003SATORI - A Fast Sequential SAT Engine for Circuits.
Madhu K. Iyer, Ganapathy Parthasarathy, Kwang-Ting Cheng
2003SILCA: Fast-Yet-Accurate Time-Domain Simulation of VLSI Circuits with Strong Parasitic Coupling Effects.
Zhao Li, Chuanjin Richard Shi
2003SOI Transistor Model for Fast Transient Simulation.
D. Nadezhin, Sergey Gavrilov, Alexey Glebov, Y. Egorov, Vladimir Zolotov, David T. Blaauw, Rajendran Panda, Murat R. Becer, Alexandre Ardelea, A. Patel
2003Simultaneous Analytic Area and Power Optimization for Repeater Insertion.
Giuseppe S. Garcea, N. P. van der Meijs, Ralph H. J. M. Otten
2003Stable Multiway Circuit Partitioning for ECO.
Yongseok Cheon, Seokjin Lee, Martin D. F. Wong
2003Static Verification of Test Vectors for IR Drop Failure.
Aman Kokrady, C. P. Ravikumar
2003Statistical Clock Skew Analysis Considering Intra-Die Process Variations.
Aseem Agarwal, David T. Blaauw, Vladimir Zolotov
2003Statistical Timing Analysis Considering Spatial Correlations using a Single Pert-Like Traversal.
Hongliang Chang, Sachin S. Sapatnekar
2003Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations.
Aseem Agarwal, David T. Blaauw, Vladimir Zolotov
2003Statistical Verification of Power Grids Considering Process-Induced Leakage Current Variations.
Imad A. Ferzli, Farid N. Najm
2003SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation.
Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Chen
2003Switch-Factor Based Loop RLC Modeling for Efficient Timing Analysis.
Yu Cao, Xiaodong Yang, Xuejue Huang, Dennis Sylvester
2003Synthesis of Heterogeneous Distributed Architectures for Memory-Intensive Applications.
Chao Huang, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
2003System Level Design and Verification Using a Synchronous Language.
Gérard Berry, Michael Kishinevsky, Satnam Singh
2003Systematic Design for Power Minimization of Pipelined Analog-to-Digital Converters.
Reza Lotfi, Mohammad Taherzadeh-Sani, M. Yaser Azizi, Omid Shoaei
2003TAM Optimization for Mixed-Signal SOCs using Analog Test Wrappers.
Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty
2003The Compositional Far Side of Image Computation.
Chao Wang, Gary D. Hachtel, Fabio Somenzi
2003The Y-Architecture for On-Chip Interconnect: Analysis and Methodology.
Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Ion I. Mandoiu, Qinke Wang, Bo Yao
2003Timing Analysis in Presence of Power Supply and Ground Voltage Variations.
Rubil Ahmadi, Farid N. Najm
2003Using a Distributed Rectangle Bin-Packing Approach for Core-based SoC Test Scheduling with Power Constraints.
Yu Xia, Malgorzata Chrzanowska-Jeske, Benyi Wang, Marcin Jeske
2003Vectorless Analysis of Supply Noise Induced Delay Variation.
Sanjay Pant, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
2003Weibull Based Analytical Waveform Model.
Chirayu S. Amin, Florentin Dartu, Yehea I. Ismail