| 2001 | A Convex Programming Approach to Positive Real Rational Approximation. Carlos P. Coelho, Joel R. Phillips, Luís Miguel Silveira |
| 2001 | A Force-Directed Maze Router. Fan Mo, Abdallah Tabbara, Robert K. Brayton |
| 2001 | A Layout-Aware Synthesis Methodology for RF Circuits. Peter J. Vancorenland, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen |
| 2001 | A Methodology for the Design of Application Specific Instruction Set Processors (ASIP) using the Machine Description Language LISA. Andreas Hoffmann, Oliver Schliebusch, Achim Nohl, Gunnar Braun, Oliver Wahlen, Heinrich Meyr |
| 2001 | A New Algorithm for Routing Tree Construction with Buffer Insertion and Wire Sizing under Obstacle Constraints. Xiaoping Tang, Ruiqi Tian, Hua Xiang, D. F. Wong |
| 2001 | A Probabilistic Constructive Approach to Optimization Problems. Jennifer L. Wong, Farinaz Koushanfar, Seapahn Meguerdichian, Miodrag Potkonjak |
| 2001 | A Router for Symmetrical FPGAs Based on Exact Routing Density Evaluation. Nak-Woong Eum, Taewhan Kim, Chong-Min Kyung |
| 2001 | A Search-Based Bump-and-Refit Approach to Incremental Routing for ECO Applications in FPGAs. Vinay Verma, Shantanu Dutt |
| 2001 | A Simulation-Based Method for the Verification of Shared Memory in Multiprocessor Systems. Scott A. Taylor, Carl Ramey, Craig Barner, David Asher |
| 2001 | A Super-Scheduler for Embedded Reconfigurable Systems. Seda Ogrenci Memik, Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh |
| 2001 | A Symbolic Simulation-Based Methodology for Generating Black-Box Timing Models of Custom Macrocells. Clayton B. McDonald, Randal E. Bryant |
| 2001 | A System for Synthesizing Optimized FPGA Hardware from MATLAB. Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee |
| 2001 | A Trajectory Piecewise-Linear Approach to Model Order Reduction and Fast Simulation of Nonlinear Circuits and Micromachined Devices. Michal Rewienski, Jacob White |
| 2001 | ASF: A Practical Simulation-Based Methodology for the Synthesis of Custom Analog Circuits. Michael Krasnicki, Rodney Phelps, James R. Hellums, Mark McClung, Rob A. Rutenbar, L. Richard Carley |
| 2001 | Accurate CMOS Bridge Fault Modeling with Neural Network-Based VHDL Saboteurs. Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon |
| 2001 | Addressing the Timing Closure Problem by Integrating Logic Optimization and Placement. Wilsin Gosti, Sunil P. Khatri, Alberto L. Sangiovanni-Vincentelli |
| 2001 | Algorithm Level Re-Computing - A Register Transfer Level Concurrent Error Detection Technique. Kaijie Wu, Ramesh Karri |
| 2001 | An Algorithm for Simultaneous Pin Assignment and Routing. Hua Xiang, Xiaoping Tang, D. F. Wong |
| 2001 | An Analytical High-Level Battery Model for Use in Energy Management of Portable Electronic Systems. Daler N. Rakhmatov, Sarma B. K. Vrudhula |
| 2001 | An Assembly-Level Execution-Time Model for Pipelined Architectures. Giovanni Beltrame, Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto, Vito Trianni |
| 2001 | An Integrated Data Path Optimization for Low Power Based on Network Flow Method. Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu |
| 2001 | Analysis of Substrate Thermal Gradient Effects on Optimal Buffer Insertion. Amir H. Ajami, Kaustav Banerjee, Massoud Pedram |
| 2001 | Application-Driven Processor Design Exploration for Power-Performance Trade-off Analysis. Diana Marculescu, Anoop Iyer |
| 2001 | Area Minimization of Power Distribution Network Using Efficient Nonlinear Programming Techniques. Xiaohai Wu, Xianlong Hong, Yici Cai, Chung-Kuan Cheng, Jun Gu, Wayne Wei-Ming Dai |
| 2001 | Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-Configurable Encoding. Subash Chandar G., Mahesh Mehendale, R. Govindarajan |
| 2001 | Automatic Hierarchical Design: Fantasy or Reality? (Panel). Rob A. Rutenbar, Olivier Coudert, Patrick Groeneveld, Jürgen Koehl, Scott Peterson, Vivek Raghavan, Naresh Soni |
| 2001 | BOOM - A Heuristic Boolean Minimizer. Jan Hlavicka, Petr Fiser |
| 2001 | Behavior-to-Placed RTL Synthesis with Performance-Driven Placement. Daehong Kim, Jinyong Jung, Sunghyun Lee, Jinhwan Jeon, Kiyoung Choi |
| 2001 | Behavioral Modeling of Analog Circuits by Wavelet Collocation Method. Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling |
| 2001 | Bus Encoding to Prevent Crosstalk Delay. Bret M. Victor, Kurt Keutzer |
| 2001 | CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors. Cagdas Akturan, Margarida F. Jacome |
| 2001 | CASh: A Novel "Clock as Shield" Design Methodology for Noise Immune Precharge-Evaluate Logic. Yonghee Im, Kaushik Roy |
| 2001 | Challenges in Power-Ground Integrity. Shen Lin, Norman Chang |
| 2001 | Color Permutation: An Iterative Algorithm for Memory Packing. Jianwen Zhu, Edward S. Rogers Sr. |
| 2001 | Compact Modeling and SPICE-Based Simulation for Electrothermal Analysis of Multilevel ULSI Interconnects. TingYen Chiang, Kaustav Banerjee, Krishna Saraswat |
| 2001 | Compatible Observability Don't Cares Revisited. Robert K. Brayton |
| 2001 | Congestion Aware Layout Driven Logic Synthesis. Thomas Kutzschebauch, Leon Stok |
| 2001 | Congestion Reduction During Placement Based on Integer Programming. Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh |
| 2001 | Constraint Satisfaction for Relative Location Assignment and Scheduling. Carlos A. Alba Pinto, Bart Mesman, Jochen A. G. Jess |
| 2001 | Coupled Analysis of Electromigration Reliability and Performance in ULSI Signal Nets. Kaustav Banerjee, Amit Mehrotra |
| 2001 | Crosstalk Fault Detection by Dynamic Idd. Xiaoyun Sun, Seonki Kim, Bapiraju Vinnakota |
| 2001 | Direct Transistor-Level Layout for Digital Blocks. Prakash Gopalakrishnan, Rob A. Rutenbar |
| 2001 | Efficient Canonical Form for Boolean Matching of Complex Functions in Large Libraries. Jovanka Ciric, Carl Sechen |
| 2001 | Efficient Conflict Driven Learning in Boolean Satisfiability Solver. Lintao Zhang, Conor F. Madigan, Matthew W. Moskewicz, Sharad Malik |
| 2001 | Efficient Performance Estimation for General Real-Time Task Systems. Hongchao (Stephanie) Liu, Xiaobo Sharon Hu |
| 2001 | Embedded Tutorial: CAD Solutions and Outstanding Challenges for Mixed-Signal and RF IC Design. Domine Leenaerts, Rob A. Rutenbar, Georges G. E. Gielen |
| 2001 | Energy Efficient Real-Time Scheduling. Amit Sinha, Anantha P. Chandrakasan |
| 2001 | False-Noise Analysis using Logic Implications. Alexey Glebov, Sergey Gavrilov, David T. Blaauw, Supamas Sirichotiyakul, Chanhee Oh, Vladimir Zolotov |
| 2001 | Fast 3-D Inductance Extraction in Lossy Multi-Layer Substrate. Minqing Liu, Tiejun Yu, Wayne Wei-Ming Dai |
| 2001 | Faster SAT and Smaller BDDs via Common Function Structure. Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah |
| 2001 | Formulae and Applications of Interconnect Estimation Considering Shield Insertion and Net Ordering. James D. Z. Ma, Lei He |
| 2001 | Highly Accurate Fast Methods for Extraction and Sparsification of Substrate Coupling Based on Low-Rank Approximation. Joe Kanapka, Jacob K. White |
| 2001 | Hybrid Structured Clock Network Construction. Haihua Su, Sachin S. Sapatnekar |
| 2001 | I-CoPES: Fast Instruction Code Placement for Embedded Systems to Improve Performance and Energy Efficiency. Sri Parameswaran, Jörg Henkel |
| 2001 | IC Power Distribution Challenges. Sudhakar Bobba, Tyler Thorp, Kathirgamar Aingaran, Dean Liu |
| 2001 | Improving Memory Energy Using Access Pattern Classification. Mahmut T. Kandemir, Ugur Sezer, Victor Delaluz |
| 2001 | Improving the Robustness of a Surface Integral Formulation for Wideband Impendance Extraction of 3D Structures. Zhenhai Zhu, Jingfang Huang, Ben Song, Jacob K. White |
| 2001 | Induction-Based Gate-Level Verification of Multipliers. Ying-Tsai Chang, Kwang-Ting Cheng |
| 2001 | Instruction Generation for Hybrid Reconfigurable Systems. Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh |
| 2001 | Integral Design Representations for Embedded Systems. Lothar Thiele |
| 2001 | Interconnect Resource-Aware Placement for Hierarchical FPGAs. Amit Singh, Ganapathy Parthasarathy, Malgorzata Marek-Sadowska |
| 2001 | Local Search for Final Placement in VLSI Design. Oluf Faroe, David Pisinger, Martin Zachariasen |
| 2001 | Low Power System Scheduling and Synthesis. Niraj K. Jha |
| 2001 | Min-Area Retiming on Dynamic Circuit Structures. Jason Baumgartner, Andreas Kuehlmann |
| 2001 | Minimum-Buffered Routing of Non-Critical Nets for Slew Rate and Reliability Control. Charles J. Alpert, Andrew B. Kahng, Bao Liu, Ion I. Mandoiu, Alexander Zelikovsky |
| 2001 | Model Reduction of Variable-Geometry Interconnects using Variational Spectrally-Weighted Balanced Truncation. Payam Heydari, Massoud Pedram |
| 2001 | Multigrid-Like Technique for Power Grid Analysis. Joseph N. Kozhaya, Sani R. Nassif, Farid N. Najm |
| 2001 | Multilevel Approach to Full-Chip Gridless Routing. Jason Cong, Jie Fang, Yan Zhang VI |
| 2001 | NetBench: A Benchmarking Suite for Network Processors. Gokhan Memik, William H. Mangione-Smith, Wendong Hu |
| 2001 | Non-linear Quantification Scheduling in Image Computation. Pankaj Chauhan, Edmund M. Clarke, Somesh Jha, James H. Kukula, Thomas R. Shiple, Helmut Veith, Dong Wang |
| 2001 | On Identifying Don't Care Inputs of Test Patterns for Combinational Circuits. Seiji Kajihara, Kohei Miyase |
| 2001 | On the Optimization Power of Redundancy Addition and Removal Techniques for Sequential Circuits. Enrique San Millán, Luis Entrena, José Alberto Espejo |
| 2001 | On the Signal Bounding Problem in Timing Analysis. Jin-Fuw Lee, Daniel L. Ostapko, Jeffery Soreff, C. K. Wong |
| 2001 | Optimisation Problems for Dynamic Concurrent Task-Based Systems. Diederik Verkest, Peng Yang, Chun Wong, Paul Marchal |
| 2001 | Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs. Aarti Gupta, Zijiang Yang, Pranav Ashar, Lintao Zhang, Sharad Malik |
| 2001 | Placement Driven Retiming with a Coupled Edge Timing Model. Ingmar Neumann, Wolfgang Kunz |
| 2001 | Power Grid Transient Simulation in Linear Time Based on Transmission-Line-Modeling Alternating-Direction-Implicit Method. Yu-Min Lee, Charlie Chung-Ping Chen |
| 2001 | Power-Delay Modeling of Dynamic CMOS Gates for Circuit Optimization. José Luis Rosselló, Jaume Segura |
| 2001 | Practical Considerations in RLCK Crosstalk Analysis for Digital Integrated Circuits. Steven C. Chan, Kenneth L. Shepard |
| 2001 | Predicting the Performance of Synchronous Discrete Event Simulation Systems. Jinsheng Xu, Moon-Jung Chung |
| 2001 | Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2001, San Jose, CA, USA, November 4-8, 2001 Rolf Ernst |
| 2001 | REDI: An Efficient Fault Oriented Procedure to Identify Redundant Faults in Combinational Logic Circuits. Chen Wang, Irith Pomeranz, Sudhakar M. Reddy |
| 2001 | Recursive Bipartitioning of BDDs for Performance Driven Synthesis of Pass Transistor Logic Circuits. Rupesh S. Shelar, Sachin S. Sapatnekar |
| 2001 | Sequential SPFDs. Subarnarekha Sinha, Andreas Kuehlmann, Robert K. Brayton |
| 2001 | Simulation Approaches for Strongly Coupled Interconnect Systems. Joel R. Phillips, Luís Miguel Silveira |
| 2001 | Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing. Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
| 2001 | Single-Pass Redundancy Addition and Removal. Chih-Wei Jim Chang, Malgorzata Marek-Sadowska |
| 2001 | Software-Assisted Cache Replacement Mechanisms for Embedded Systems. Prabhat Jain, Srinivas Devadas, Daniel W. Engels, Larry Rudolph |
| 2001 | Solution of Parallel Language Equations for Logic Synthesis. Nina Yevtushenko, Tiziano Villa, Robert K. Brayton, Alexandre Petrenko, Alberto L. Sangiovanni-Vincentelli |
| 2001 | Stars in VCC: Complementing Simulation with Worst-Case Analysis. Felice Balarin |
| 2001 | Static Scheduling of Multi-Domain Memories For Functional Verification. Murali Kudlugi, Charles Selvidge, Russell Tessier |
| 2001 | Symbolic Algebra and Timing Driven Data-flow Synthesis. Armita Peymandoust, Giovanni De Micheli |
| 2001 | System Level Design with Spade: an M-JPEG Case Study. Paul Lieverse, Todor P. Stefanov, Pieter van der Wolf, Ed F. Deprettere |
| 2001 | System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-Chip. Tony Givargis, Frank Vahid, Jörg Henkel |
| 2001 | System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels. Radu Marculescu, Amit Nandi, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli |
| 2001 | Techniques for Including Dielectrics when Extracting Passive Low-Order Models of High Speed Interconnect. Luca Daniel, Alberto L. Sangiovanni-Vincentelli, Jacob K. White |
| 2001 | The Design and Optimization of SOC Test Solutions. Erik Larsson, Zebo Peng, Gunnar Carlsson |
| 2001 | The Sizing Rules Method for Analog Integrated Circuit Design. Helmut E. Graeb, Stephan Zizala, Josef Eckmüller, Kurt Antreich |
| 2001 | Transient Power Management Through High Level Synthesis. Vijay Raghunathan, Srivaths Ravi, Anand Raghunathan, Ganesh Lakshminarayana |
| 2001 | Verification of Integer Multipliers on the Arithmetic Bit Level. Dominik Stoffel, Wolfgang Kunz |
| 2001 | What is the Limit of Energy Saving by Dynamic Voltage Scaling? Gang Qu |
| 2001 | Will Nanotechnology Change the Way We Design and Verify Systems? (Panel). Andreas Kuehlmann, Robert W. Dutton, Paul D. Franzon, Seth Copen Goldstein, Philip Luekes, Eric Parker, Thomas N. Theis |