| 1999 | A bipartition-codec architecture to reduce power in pipelined circuits. Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-Jong Chen, Xian-Jun Huang |
| 1999 | A clustering- and probability-based approach for time-multiplexed FPGA partitioning. Mango Chia-Tso Chao, Guang-Ming Wu, Iris Hui-Ru Jiang, Yao-Wen Chang |
| 1999 | A framework for testing core-based systems-on-a-chip. Srivaths Ravi, Ganesh Lakshminarayana, Niraj K. Jha |
| 1999 | A graph theoretic optimal algorithm for schedule compression in time-multiplexed FPGA partitioning. Huiqun Liu, D. F. Wong |
| 1999 | A methodology for correct-by-construction latency insensitive design. Luca P. Carloni, Kenneth L. McMillan, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli |
| 1999 | A new heuristic for rectilinear Steiner trees. Ion I. Mandoiu, Vijay V. Vazirani, Joseph L. Ganley |
| 1999 | A novel design methodology for high performance and low power digital filters. Khurram Muhammad, Kaushik Roy |
| 1999 | A scalable substrate noise coupling model for mixed-signal ICs. Anil Samavedam, Kartikeya Mayaram, Terri S. Fiez |
| 1999 | A wide frequency range surface integral formulation for 3-D RLC extraction. Junfeng Wang, Johannes Tausch, Jacob K. White |
| 1999 | AKORD: transistor level and mixed transistor/gate level placement tool for digital data paths. Tatjana Serdar, Carl Sechen |
| 1999 | Advances in transistor timing, simulation, and optimization (tutorial abstract). Jacob White, Jacob Avidan, Ibrahim Abe M. Elfadel, D. F. Wong |
| 1999 | An approach for improving the levels of compaction achieved by vector omission. Irith Pomeranz, Sudhakar M. Reddy |
| 1999 | An efficient method for hot-spot identification in ULSI circuits. Yi-Kan Cheng, Sung-Mo Kang |
| 1999 | An implicit connection graph maze routing algorithm for ECO routing. Jason Cong, Jie Fang, Kei-Yong Khoo |
| 1999 | An integrated algorithm for combined placement and libraryless technology mapping. Yanbin Jiang, Sachin S. Sapatnekar |
| 1999 | Analytical approach to custom datapath design. Serkan Askar, Maciej J. Ciesielski |
| 1999 | Analytical macromodeling for high-level power estimation. Giuseppe Bernacchia, Marios C. Papaefthymiou |
| 1999 | Attractor-repeller approach for global placement. Hussein Etawil, Shawki Areibi, Anthony Vannelli |
| 1999 | Bit-level arithmetic optimization for carry-save additions. Kei-Yong Khoo, Zhan Yu, Alan N. Willson Jr. |
| 1999 | Body-voltage estimation in digital PD-SOI circuits and its application to static timing analysis. Kenneth L. Shepard, Dae-Jin Kim |
| 1999 | Buffer block planning for interconnect-driven floorplanning. Jason Cong, Tianming Kong, David Zhigang Pan |
| 1999 | Cell replication and redundancy elimination during placement for cycle time optimization. Ingmar Neumann, Dominik Stoffel, Hendrik Hartje, Wolfgang Kunz |
| 1999 | Clock skew scheduling for improved reliability via quadratic programming. Ivan S. Kourtev, Eby G. Friedman |
| 1999 | Co-synthesis of heterogeneous multiprocessor systems using arbitrated communication. David L. Rhodes, Wayne H. Wolf |
| 1999 | Concurrent D-algorithm on reconfigurable hardware. Fatih Kocan, Daniel G. Saab |
| 1999 | Concurrent logic restructuring and placement for timing closure. Jinan Lou, Wei Chen, Massoud Pedram |
| 1999 | Copy detection for intellectual property protection of VLSI designs. Andrew B. Kahng, Darko Kirovski, Stefanus Mantik, Miodrag Potkonjak, Jennifer L. Wong |
| 1999 | Copyright protection of designs based on multi source IPs. Edoardo Charbon, Ilhami Torunoglu |
| 1999 | Cycle time and slack optimization for VLSI-chips. Christoph Albrecht, Bernhard Korte, Jürgen Schietke, Jens Vygen |
| 1999 | Deep submicron defect detection with the energy consumption ratio. Bapiraju Vinnakota |
| 1999 | Design and optimization of LC oscillators. Maria del Mar Hershenson, Ali Hajimiri, Sunderarajan S. Mohan, Stephen P. Boyd, Thomas H. Lee |
| 1999 | Design of a set-top box system on a chip (abstract). Nikil D. Dutt, Eric M. Foster |
| 1999 | Direct synthesis of timed asynchronous circuits. Sung Tae Jung, Chris J. Myers |
| 1999 | Distributed simulation of VLSI systems via lookahead-free self-adaptive optimistic and conservative synchronization. Dragos Lungeanu, Chuanjin Richard Shi |
| 1999 | Dynamic power management using adaptive learning tree. Eui-Young Chung, Luca Benini, Giovanni De Micheli |
| 1999 | Efficient diagnosis of path delay faults in digital logic circuits. Pankaj Pant, Abhijit Chatterjee |
| 1999 | Efficient incremental rerouting for fault reconfiguration in field programmable gate arrays. Shantanu Dutt, Vimalvel Shanmugavel, Steven Trimberger |
| 1999 | Efficient manipulation algorithms for linearly transformed BDDs. Wolfgang Günther, Rolf Drechsler |
| 1999 | Efficient model reduction of interconnect via approximate system gramians. Jing-Rebecca Li, Jacob K. White |
| 1999 | Electromagnetic parasitic extraction via a multipole method with hierarchical refinement. Michael W. Beattie, Lawrence T. Pileggi |
| 1999 | Embedded Java: techniques and applications (tutorial abstract). Reinaldo A. Bergamaschi, Brian M. Barry, John Duimovich |
| 1999 | Factoring logic functions using graph partitioning. Martin Charles Golumbic, Aviad Mintz |
| 1999 | Fast performance analysis of bus-based system-on-chip communication architectures. Kanishka Lahiri, Anand Raghunathan, Sujit Dey |
| 1999 | Fault modeling and simulation for crosstalk in system-on-chip interconnects. Michael Cuviello, Sujit Dey, Xiaoliang Bai, Yi Zhao |
| 1999 | Formal specification and verification of a dataflow processor array. Thomas A. Henzinger, Xiaojun Liu, Shaz Qadeer, Sriram K. Rajamani |
| 1999 | Formal verification meets simulation (tutorial abstract). Ellen Sentovich, David L. Dill, Serdar Tasiran |
| 1999 | Formulation of static circuit optimization with reduced size, degeneracy and redundancy by timing graph manipulation. Chandramouli Visweswariah, Andrew R. Conn |
| 1999 | FunState - an internal design representation for codesign. Lothar Thiele, Karsten Strehl, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich |
| 1999 | Function inlining under code size constraints for embedded processors. Rainer Leupers, Peter Marwedel |
| 1999 | Function unit specialization through code analysis. Daniel Benyamin, William H. Mangione-Smith |
| 1999 | Functional timing optimization. Alexander Saldanha |
| 1999 | Implication graph based domino logic synthesis. Ki-Wook Kim, C. L. Liu, Sung-Mo Kang |
| 1999 | Implicit enumeration of strongly connected components. Aiguo Xie, Peter A. Beerel |
| 1999 | Improved interconnect sharing by identity operation insertion. Dirk Herrmann, Rolf Ernst |
| 1999 | Improving coverage analysis and test generation for large designs. Jules P. Bergmann, Mark Horowitz |
| 1999 | Integrated floorplanning and interconnect planning. Hung-Ming Chen, Hai Zhou, Fung Yu Young, D. F. Wong, Hannah Honghua Yang, Naveed A. Sherwani |
| 1999 | Interconnect parasitic extraction in the digital IC design methodology. Mattan Kamon, Steve McCormick, Ken Sheperd |
| 1999 | Interconnect scaling implications for CAD. Ron Ho, Ken Mai, Hema Kapadia, Mark Horowitz |
| 1999 | Interface and cache power exploration for core-based embedded system design. Tony Givargis, Jörg Henkel, Frank Vahid |
| 1999 | Is wire tapering worthwhile? Charles J. Alpert, Anirudh Devgan, Stephen T. Quay |
| 1999 | JMTP: an architecture for exploiting concurrency in embedded Java applications with real-time considerations. Rachid Helaihel, Kunle Olukotun |
| 1999 | LEOPARD: a Logical Effort-based fanout OPtimizer for ARea and Delay. Peyman Rezvani, Amir H. Ajami, Massoud Pedram, Hamid Savoj |
| 1999 | Lazy group sifting for efficient symbolic state traversal of FSMs. Hiroyuki Higuchi, Fabio Somenzi |
| 1999 | Least fixpoint approximations for reachability analysis. In-Ho Moon, James H. Kukula, Thomas R. Shiple, Fabio Somenzi |
| 1999 | Localized watermarking: methodology and application to operation scheduling. Darko Kirovski, Miodrag Potkonjak |
| 1999 | Lower bound on latency for VLIW ASIP datapaths. Margarida F. Jacome, Gustavo de Veciana |
| 1999 | Marsh: min-area retiming with setup and hold constraints. Vijay Sundararajan, Sachin S. Sapatnekar, Keshab K. Parhi |
| 1999 | Memory bank customization and assignment in behavioral synthesis. Preeti Ranjan Panda |
| 1999 | Memory binding for performance optimization of control-flow intensive behaviors. Kamal S. Khouri, Ganesh Lakshminarayana, Niraj K. Jha |
| 1999 | Model reduction for DC solution of large nonlinear circuits. Emad Gad, Michel S. Nakhla |
| 1999 | Modeling and simulation of the interference due to digital switching in mixed-signal ICs. Alper Demir, Peter Feldmann |
| 1999 | Modeling design constraints and biasing in simulation using BDDs. Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz |
| 1999 | New methods for speeding up computation of Newton updates in harmonic balance. Mark M. Gourary, Sergey L. Ulyanov, Michael M. Zharov, Sergey G. Rusakov |
| 1999 | Noise analysis of non-autonomous radio frequency circuits. Amit Mehrotra, Alberto L. Sangiovanni-Vincentelli |
| 1999 | OPTIMISTA: state minimization of asynchronous FSMs for optimum output logic. Robert M. Fuhrer, Steven M. Nowick |
| 1999 | On the global fanout optimization problem. Rajeev Murgai |
| 1999 | On the rapid prototyping and design of a wireless communication system on a chip (abstract). Nikil D. Dutt, Brian Kelley |
| 1999 | Optimal P/N width ratio selection for standard cell libraries. David S. Kung, Ruchir Puri |
| 1999 | Optimal allocation of carry-save-adders in arithmetic optimization. Junhyung Um, Taewhan Kim, C. L. Liu |
| 1999 | Optimum loading dispersion for high-speed tree-type decision circuitry. Jie-Hong Roland Jiang, Iris Hui-Ru Jiang |
| 1999 | Parameterized RTL power models for combinational soft macros. Alessandro Bogliolo, Roberto Corgnati, Enrico Macii, Massimo Poncino |
| 1999 | Partial BIST insertion to eliminate data correlation. Qiushuang Zhang, Ian G. Harris |
| 1999 | Path toward future CAD environments for MEMS (tutorial abstract). Jacob K. White, Gary K. Fedder, Tamal Mukherjee |
| 1999 | Performance optimization under rise and fall parameters. Rajeev Murgai |
| 1999 | Performance optimization using separator sets. Yutaka Tamiya |
| 1999 | Power minimization using system-level partitioning of applications with quality of service requirements. Gang Qu, Miodrag Potkonjak |
| 1999 | Practical considerations for passive reduction of RLC circuits. Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi |
| 1999 | Probabilistic state space search. Andreas Kuehlmann, Kenneth L. McMillan, Robert K. Brayton |
| 1999 | Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999 Jacob K. White, Ellen Sentovich |
| 1999 | Provably good algorithm for low power consumption with dual supply voltages. Chunhong Chen, Majid Sarrafzadeh |
| 1999 | RLC interconnect delay estimation via moments of amplitude and phase response. Xiaodong Yang, Walter H. Ku, Chung-Kuan Cheng |
| 1999 | Realizable reduction for RC interconnect circuits. Anirudh Devgan, Peter R. O'Brien |
| 1999 | Regularity extraction via clan-based structural circuit decomposition. Soha Hassoun, Carolyn McCreary |
| 1999 | Repeater insertion in tree structured inductive interconnect. Yehea I. Ismail, Eby G. Friedman, José Luis Neves |
| 1999 | Robust optimization based backtrace method for analog circuits. Alfred V. Gomes, Abhijit Chatterjee |
| 1999 | SAT based ATPG using fast justification and propagation in the implication graph. Paul Tafertshofer, Andreas Ganz |
| 1999 | SOI technology and tools (abstract). Sani R. Nassif, Tuyen V. Nguyen |
| 1999 | Symbolic functional and timing verification of transistor-level circuits. Clayton B. McDonald, Randal E. Bryant |
| 1999 | Synchronous equivalence for embedded systems: a tool for design exploration. Harry Hsieh, Felice Balarin |
| 1999 | Synthesis for multiple input wires replacement of a gate for wiring consideration. Shih-Chieh Chang, Jung-Cheng Chuang, Zhong-Zhen Wu |
| 1999 | Synthesis of asynchronous control circuits with automatically generated relative timing assumptions. Jordi Cortadella, Michael Kishinevsky, Steven M. Burns, Ken S. Stevens |
| 1999 | System level design and debug of high-performance embedded media systems (tutorial). Rolf Ernst, Kees A. Vissers, Pieter van der Wolf, Gert-Jan van Rootselaar |
| 1999 | TICER: realizable reduction of extracted RC circuits. Bernard N. Sheehan |
| 1999 | Techniques for improving the efficiency of sequential circuit test generation. Xijiang Lin, Irith Pomeranz, Sudhakar M. Reddy |
| 1999 | Test scheduling for core-based systems. Krishnendu Chakrabarty |
| 1999 | The Chebyshev expansion based passive model for distributed interconnect networks. Janet Meiling Wang, Ernest S. Kuh, Qingjian Yu |
| 1999 | The associative-skew clock routing problem. Yu Chen, Andrew B. Kahng, Gang Qu, Alexander Zelikovsky |
| 1999 | Throughput optimization of general non-linear computations. Inki Hong, Miodrag Potkonjak, Lisa M. Guerra |
| 1999 | Timing-driven partitioning for two-phase domino and mixed static/domino implementations. Min Zhao, Sachin S. Sapatnekar |
| 1999 | Timing-safe false path removal for combinational modules. Yuji Kukimoto, Robert K. Brayton |
| 1999 | Towards true crosstalk noise analysis. Pinhong Chen, Kurt Keutzer |
| 1999 | Transient sensitivity computation for transistor level analysis and tuning. Tuyen V. Nguyen, Peter O'Brien, David W. Winston |
| 1999 | Validation and test generation for oscillatory noise in VLSI interconnects. Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer |
| 1999 | Virtual screening: a step towards a sparse partial inductance matrix. A. J. Dammers, N. P. van der Meijs |
| 1999 | What is the cost of delay insensitivity? Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev |
| 1999 | Worst-case analysis of discrete systems. Felice Balarin |