| 1998 | A fast, accurate, and non-statistical method for fault coverage estimation. Michael S. Hsiao |
| 1998 | A general approach for regularity extraction in datapath circuits. Amit Chowdhary, Sudhakar Kale, Phani K. Saripella, Naresh Sehgal, Rajesh K. Gupta |
| 1998 | A graph-partitioning-based approach for multi-layer constrained via minimization. Yih-Chih Chou, Youn-Long Lin |
| 1998 | A linear optimal test generation algorithm for interconnect testing. Chauchin Su |
| 1998 | A new algorithm for the reduction of incompletely specified finite state machines. Jorge M. Pena, Arlindo L. Oliveira |
| 1998 | A performance-driven layer assignment algorithm for multiple interconnect trees. Prashant Saxena, C. L. Liu |
| 1998 | A quantitative approach to development and validation of synthetic benchmarks for behavioral synthesis. Chunho Lee, Miodrag Potkonjak |
| 1998 | A simultaneous routing tree construction and fanout optimization algorithm. Amir H. Salek, Jinan Lou, Massoud Pedram |
| 1998 | Accurate calculation of bit-level transition activity using word-level statistics and entropy function. Efstathios D. Kyriakis-Bitzaros, Spiridon Nikolaidis, Anna Tatsaki |
| 1998 | Adaptive variable reordering for symbolic model checking. Gila Kamhi, Limor Fix |
| 1998 | An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits. Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen |
| 1998 | Analysis of emerging core-based design lifecycle. Kayhan Küçükçakar |
| 1998 | Analysis of watermarking techniques for graph coloring problem. Gang Qu, Miodrag Potkonjak |
| 1998 | Approximate reachability don't cares for CTL model checking. In-Ho Moon, Jae-Young Jang, Gary D. Hachtel, Fabio Somenzi, Jun Yuan, Carl Pixley |
| 1998 | Arbitrary rectilinear block packing based on sequence pair. Maggie Zhiwei Kang, Wayne Wei-Ming Dai |
| 1998 | Architecture driven circuit partitioning. Chau-Shen Chen, TingTing Hwang, C. L. Liu |
| 1998 | Asymptotically efficient retiming under setup and hold constraints. Marios C. Papaefthymiou |
| 1998 | CMOS analog circuit stack generation with matching constraints. Ravindranath Naiknaware, Terri S. Fiez |
| 1998 | CONCERT: a concurrent transient fault simulator for nonlinear analog circuits. Junwei Hou, Abhijit Chatterjee |
| 1998 | CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems. Robert P. Dick, Niraj K. Jha |
| 1998 | Communication synthesis for distributed embedded systems. Ross B. Ortega, Gaetano Borriello |
| 1998 | Control generation for embedded systems based on composition of modal processes. Pai H. Chou, Ken Hines, Kurt Partridge, Gaetano Borriello |
| 1998 | Core integration: overview and challenges. Enno Wein |
| 1998 | Delay-oriented technology mapping for heterogeneous FPGAs with bounded resources. Jason Cong, Songjie Xu |
| 1998 | Design of experiments in BDD variable ordering: lessons learned. Justin E. Harlow III, Franc Brglez |
| 1998 | Determination of worst-case aggressor alignment for delay calculation. Paul D. Gross, Ravishankar Arunachalam, Karthik Rajagopal, Lawrence T. Pileggi |
| 1998 | Domino logic synthesis using complex static gates. Tyler Thorp, Gin Yee, Carl Sechen |
| 1998 | Dynamic fault collapsing and diagnostic test pattern generation for sequential circuits. Vamsi Boppana, W. Kent Fuchs |
| 1998 | Dynamic power management of electronic systems. Luca Benini, Alessandro Bogliolo, Giovanni De Micheli |
| 1998 | Efficient analog circuit synthesis with simultaneous yield and robustness optimization. Geert Debyser, Georges G. E. Gielen |
| 1998 | Efficient encoding for exact symbolic automata-based scheduling. Steve Haynal, Forrest Brewer |
| 1998 | Efficient equivalence checking of multi-phase designs using retiming. Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee |
| 1998 | Efficient transient electrothermal simulation of CMOS VLSI circuits under electrical overstress. Tong Li, Ching-Han Tsai, Sung-Mo Kang |
| 1998 | Embedded memories in system design - from technology to systems architecture. Soren Hein, Vijay Nagasamy, Bernhard Rohfleisch, Christoforos E. Kozyrakis, Nikil D. Dutt, Francky Catthoor |
| 1998 | Energy-efficiency in presence of deep submicron noise. Rajamohana Hegde, Naresh R. Shanbhag |
| 1998 | Estimating noise in RF systems. Jaijeet S. Roychowdhury, Alper Demir |
| 1998 | Estimation of power sensitivity in sequential circuits with power macromodeling application. Zhanping Chen, Kaushik Roy, Edwin K. P. Chong |
| 1998 | Fanout optimization under a submicron transistor-level delay model. Pasquale Cocchini, Massoud Pedram, Gianluca Piccinini, Maurizio Zamboni |
| 1998 | Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation. Chung-Ping Chen, Chris C. N. Chu, D. F. Wong |
| 1998 | Finding all simple disjunctive decompositions using irredundant sum-of-products forms. Shin-ichi Minato, Giovanni De Micheli |
| 1998 | Formal verification of pipeline control using controlled token nets and abstract interpretation. Pei-Hsin Ho, Adrian J. Isles, Timothy Kam |
| 1998 | Full-chip verification of UDSM designs. Resve A. Saleh, David Overhauser, Sandy Taylor |
| 1998 | Functional debugging of systems-on-chip. Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra |
| 1998 | GPCAD: a tool for CMOS op-amp synthesis. Maria del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee |
| 1998 | Gate-size selection for standard cell libraries. Frederik Beeftink, Prabhakar Kudva, David S. Kung, Leon Stok |
| 1998 | Getting to the bottom of deep submicron. Dennis Sylvester, Kurt Keutzer |
| 1998 | Graph matching-based algorithms for FPGA segmentation design. Yao-Wen Chang, Jai-Ming Lin, D. F. Wong |
| 1998 | Hardware/software co-synthesis with memory hierarchies. Yanbing Li, Wayne H. Wolf |
| 1998 | High-level design validation and test. Sujit Dey, Jacob A. Abraham, Yervant Zorian |
| 1998 | High-level variable selection for partial-scan implementation. Frank F. Hsu, Janak H. Patel |
| 1998 | High-order Nyström schemes for efficient 3-D capacitance extraction. Sharad Kapur, David E. Long |
| 1998 | How will CAD handle billion-transistor systems? (panel). Robert C. Aitken, Jason Cong, Randy Harr, Kenneth L. Shepard, Wayne H. Wolf |
| 1998 | Implementation and use of SPFDs in optimizing Boolean networks. Subarnarekha Sinha, Robert K. Brayton |
| 1998 | Improving the computational performance of ILP-based problems. M. Narasimhan, J. Ramanujam |
| 1998 | Integrating floorplanning in data-transfer based high-level synthesis. Shantanu Tarafdar, Miriam Leeser, Zixin Yin |
| 1998 | Integrating logic retiming and register placement. Tzu-Chieh Tien, Hsiao-Pin Su, Yu-Wen Tsay, Yih-Chih Chou, Youn-Long Lin |
| 1998 | Intellectual property protection by watermarking combinational logic synthesis solutions. Darko Kirovski, Yean-Yow Hwang, Miodrag Potkonjak, Jason Cong |
| 1998 | Interconnect in high speed designs: problems, methodologies and tools. Phillip J. Restle, Joel R. Phillips, Ibrahim M. Elfadel |
| 1998 | Interface synthesis: a vertical slice from digital logic to software components. Gaetano Borriello, Luciano Lavagno, Ross B. Ortega |
| 1998 | Lazy transition systems: application to timing optimization of asynchronous circuits. Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev |
| 1998 | Model reduction of time-varying linear systems using approximate multipoint Krylov-subspace projectors. Joel R. Phillips |
| 1998 | Multipoint moment matching model for multiport distributed interconnect networks. Qingjian Yu, Janet Meiling Wang, Ernest S. Kuh |
| 1998 | Multiway partitioning with pairwise movement. Jason Cong, Sung Kyu Lim |
| 1998 | Network flow based circuit partitioning for time-multiplexed FPGAs. Huiqun Liu, D. F. Wong |
| 1998 | Node sampling: a robust RTL power modeling approach. Alessandro Bogliolo, Luca Benini |
| 1998 | Noise considerations in circuit optimization. Andrew R. Conn, Ruud A. Haring, Chandramouli Visweswariah |
| 1998 | On accelerating pattern matching for technology mapping. Yusuke Matsunaga |
| 1998 | On multilevel circuit partitioning. Sverre Wichlund |
| 1998 | On primitive fault test generation in non-scan sequential circuits. Ramesh C. Tekumalla, Premachandran R. Menon |
| 1998 | On the optimization power of retiming and resynthesis transformations. Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton |
| 1998 | On-line scheduling of hard real-time tasks on variable voltage processor. Inki Hong, Miodrag Potkonjak, Mani B. Srivastava |
| 1998 | Optimal 2-D cell layout with integrated transistor folding. Avaneendra Gupta, John P. Hayes |
| 1998 | Period assignment in multidimensional periodic scheduling. Wim F. J. Verhaegh, Emile H. L. Aarts, Paul C. N. van Gorp |
| 1998 | Phase noise in oscillators: DAEs and colored noise sources. Alper Demir |
| 1998 | Polynomial methods for component matching and verification. James Smith, Giovanni De Micheli |
| 1998 | Power invariant vector sequence compaction. Ali Pinar, C. L. Liu |
| 1998 | PowerDrive: a fast, canonical POWER estimator for DRIVing synthEsis. Sumit Roy, Harm Arts, Prithviraj Banerjee |
| 1998 | Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1998, San Jose, CA, USA, November 8-12, 1998 Hiroto Yasuura |
| 1998 | Proposal of a timing model for CMOS logic gates driving a CRC load. Akio Hirata, Hidetoshi Onodera, Keikichi Tamaru |
| 1998 | Real-time operating systems for embedded computing. Serge Hustin, Miodrag Potkonjak, Eric Verhulst, Wayne H. Wolf |
| 1998 | Reduced-order modelling of linear time-varying systems. Jaijeet S. Roychowdhury |
| 1998 | Reencoding for cycle-time minimization under fixed encoding length. Balakrishnan Iyer, Maciej J. Ciesielski |
| 1998 | Removal of memory access bottlenecks for scheduling control-flow intensive behavioral descriptions. Srivaths Ravi, Ganesh Lakshminarayana, Niraj K. Jha |
| 1998 | Representation of process mode correlation for scheduling. Dirk Ziegenbein, Kai Richter, Rolf Ernst, Jürgen Teich, Lothar Thiele |
| 1998 | Robust latch mapping for combinational equivalence checking. Jerry R. Burch, Vigyan Singhal |
| 1998 | Sampling schemes for computing OBDD variable orderings. Jawahar Jain, William Adams, Masahiro Fujita |
| 1998 | Shaping a VLSI wire to minimize delay using transmission line model. Youxin Gao, D. F. Wong |
| 1998 | Signature hiding techniques for FPGA intellectual property protection. John C. Lach, William H. Mangione-Smith, Miodrag Potkonjak |
| 1998 | Simulation of coupling capacitances using matrix partitioning. Tuyen V. Nguyen, Anirudh Devgan, Ali Sadigh |
| 1998 | Simulation of high-Q oscillators. Mark M. Gourary, Sergey L. Ulyanov, Michael M. Zharov, Sergey G. Rusakov |
| 1998 | Slicing floorplans with pre-placed modules. Fung Yu Young, D. F. Wong |
| 1998 | SpC: synthesis of pointers in C: application of pointer analysis to the behavioral synthesis from C. Luc Séméria, Giovanni De Micheli |
| 1998 | Static compaction using overlapped restoration and segment pruning. Surendra Bommu, Srimat T. Chakradhar, Kiran B. Doreswamy |
| 1998 | Static power optimization of deep submicron CMOS circuits for dual VT technology. Qi Wang, Sarma B. K. Vrudhula |
| 1998 | Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. Fabrizio Ferrandi, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi, Fabio Somenzi |
| 1998 | Symbolic model checking of process networks using interval diagram techniques. Karsten Strehl, Lothar Thiele |
| 1998 | Synthesis of BIST hardware for performance testing of MCM interconnections. Rajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian |
| 1998 | Synthesis of application specific instructions for embedded DSP software. Hoon Choi, Seung Ho Hwang, Chong-Min Kyung, In-Cheol Park |
| 1998 | Techniques for energy minimization of communication pipelines. Gang Qu, Miodrag Potkonjak |
| 1998 | Technology mapping for domino logic. Min Zhao, Sachin S. Sapatnekar |
| 1998 | Test set compaction algorithms for combinational circuits. Ilker Hamzaoglu, Janak H. Patel |
| 1998 | Testability analysis and multi-frequency ATPG for analog circuits and systems. Sam D. Huynh, Seongwon Kim, Mani Soma, Jinyan Zhang |
| 1998 | The channeled-BSG: a universal floorplan for simultaneous place/route with IC applications. Shigetoshi Nakatake, Keishi Sakanushi, Yoji Kajitani, Masahiro Kawakita |
| 1998 | The design of a cache-friendly BDD library. David E. Long |
| 1998 | The multi-BSG: stochastic approach to an optimum packing of convex-rectilinear blocks. Keishi Sakanushi, Shigetoshi Nakatake, Yoji Kajitani |
| 1998 | Tight integration of combinational verification methods. Jerry R. Burch, Vigyan Singhal |
| 1998 | Transforming control-flow intensive designs to facilitate power management. Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha, Sujit Dey |
| 1998 | Using a single input to support multiple scan chains. Kuen-Jong Lee, Jih-Jeen Chen, Cheng-Hua Huang |
| 1998 | Using precomputation in architecture and logic resynthesis. Soha Hassoun, Carl Ebeling |
| 1998 | Verification by approximate forward and backward reachability. Shankar G. Govindaraju, David L. Dill |
| 1998 | Verification of RTL generated from scheduled behavior in a high-level synthesis flow. Pranav Ashar, Subhrajit Bhattacharya, Anand Raghunathan, Akira Mukaiyama |
| 1998 | Waiting false path analysis of sequential logic circuits for performance optimization. Kazuhiro Nakamura, Kazuyoshi Takagi, Shinji Kimura, Katsumasa Watanabe |
| 1998 | Wireplanning in logic synthesis. Wilsin Gosti, Amit Narayan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1998 | Word-level decision diagrams, WLCDs and division. Christoph Scholl, Bernd Becker, Thomas M. Weis |
| 1998 | h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response. Tao Lin, Emrah Acar, Lawrence T. Pileggi |