| 1997 | A SAT-based implication engine for efficient ATPG, equivalence checking, and optimization of netlists. Paul Tafertshofer, Andreas Ganz, Manfred Henftling |
| 1997 | A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps. Francky Leyn, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
| 1997 | A block rational Arnoldi algorithm for multipoint passive model-order reduction of multiport RLC networks. Ibrahim M. Elfadel, David D. Ling |
| 1997 | A deductive technique for diagnosis of bridging faults. Srikanth Venkataraman, W. Kent Fuchs |
| 1997 | A fast and robust exact algorithm for face embedding. Evguenii I. Goldberg, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1997 | A hierarchical decomposition methodology for multistage clock circuits. Gary Ellis, Lawrence T. Pileggi, Rob A. Rutenbar |
| 1997 | A new approach to simultaneous buffer insertion and wire sizing. Chris C. N. Chu, D. F. Wong |
| 1997 | A new high-order absolutely-stable explicit numerical integration algorithm for the time-domain simulation of nonlinear circuits. J. Richard Griffith, Michel S. Nakhla |
| 1997 | A power modeling and characterization method for macrocells using structure information. Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou |
| 1997 | A predictive system shutdown method for energy saving of event-driven computation. Chi-Hong Hwang, Allen C.-H. Wu |
| 1997 | A quantitative approach to functional debugging. Darko Kirovski, Miodrag Potkonjak |
| 1997 | A signature based approach to regularity extraction. Srinivasa Rao Arikati, Ravi Varadarajan |
| 1997 | A test synthesis technique using redundant register transfers. Christos A. Papachristou, Mikhail Baklashov |
| 1997 | Accurate power estimation for large sequential circuits. Joseph N. Kozhaya, Farid N. Najm |
| 1997 | Achievable bounds on signal transition activity. Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj |
| 1997 | Adaptive methods for netlist partitioning. Wray L. Buntine, Lixin Su, A. Richard Newton, Andrew Mayer |
| 1997 | An efficient statistical analysis methodology and its application to high-density DRAMs. Sang-Hoon Lee, Chang-Hoon Choi, Jeong-Taek Kong, Wong-Seong Lee, Jei-Hwan Yoo |
| 1997 | An exact gate decomposition algorithm for low-power technology mapping. Hai Zhou, D. F. Wong |
| 1997 | An exact solution to simultaneous technology mapping and linear placement problem. Jinan Lou, Amir H. Salek, Massoud Pedram |
| 1997 | An output encoding problem and a solution technique. Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey |
| 1997 | Application-driven synthesis of core-based systems. Darko Kirovski, Chunho Lee, Miodrag Potkonjak, William H. Mangione-Smith |
| 1997 | Approximate algorithms for time separation of events. Supratik Chakraborty, David L. Dill |
| 1997 | Approximate timing analysis of combinational circuits under the XBD0 model. Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, Robert K. Brayton |
| 1997 | BIST TPG for faults in system backplanes. Chen-Huan Chiang, Sandeep K. Gupta |
| 1997 | Built-in test generation for synchronous sequential circuits. Irith Pomeranz, Sudhakar M. Reddy |
| 1997 | COSMOS: a continuous optimization approach for maximum power estimation of CMOS circuits. Chuan-Yu Wang, Kaushik Roy |
| 1997 | Circuit noise evaluation by Padé approximation based model-reduction techniques. Peter Feldmann, Roland W. Freund |
| 1997 | Circuit optimization via adjoint Lagrangians. Andrew R. Conn, Ruud A. Haring, Chandramouli Visweswariah, Chai Wah Wu |
| 1997 | Clock-tree routing realizing a clock-schedule for semi-synchronous circuits. Atsushi Takahashi, Kazunori Inoue, Yoji Kajitani |
| 1997 | Critical technologies and methodologies for systems-on-chips (tutorial). Wayne Wei-Ming Dai, Howard L. Kalter, Rob Roy, Wayne H. Wolf |
| 1997 | DSP address optimization using a minimum cost circulation technique. Catherine H. Gebotys |
| 1997 | Decomposition and technology mapping of speed-independent circuits using Boolean relations. Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Enric Pastor, Alexandre Yakovlev |
| 1997 | Decomposition of timed decision tables and its use in presynthesis optimizations. Jian Li, Rajesh K. Gupta |
| 1997 | Delay bounded buffered tree construction for timing driven floorplanning. Maggie Zhiwei Kang, Wayne Wei-Ming Dai, Tom Dillinger, David P. LaPotin |
| 1997 | Design technology for building wireless systems (tutorial). Rajesh K. Gupta, Mani B. Srivastava |
| 1997 | EDA and the network. Mark D. Spiller, A. Richard Newton |
| 1997 | Effects of delay models on peak power estimation of VLSI sequential circuits. Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | Efficient circuit partitioning to extend cycle simulation beyond synchronous circuits. Charles J. DeVane |
| 1997 | Efficient coupled noise estimation for on-chip interconnects. Anirudh Devgan |
| 1997 | Embedded program timing analysis based on path clustering and architecture classification. Rolf Ernst, Wei Ye |
| 1997 | Exploiting off-chip memory access modes in high-level synthesis. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau |
| 1997 | Fast field solver-programs for thermal and electrostatic analysis of microsystem elements. Vladimír Székely, Márta Rencz |
| 1997 | Fast identification of untestable delay faults using implications. Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal |
| 1997 | Fast power estimation for deterministic input streams. Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi |
| 1997 | FastPep: a fast parasitic extraction program for complex three-dimensional geometries. Mattan Kamon, Nuno Alexandre Marques, Jacob K. White |
| 1997 | Fault simulation of interconnect opens in digital CMOS circuits. Haluk Konuk |
| 1997 | Forward model checking techniques oriented to buggy designs. Hiroaki Iwashita, Tsuneo Nakata |
| 1997 | Functional simulation using binary decision diagrams. Christoph Scholl, Rolf Drechsler, Bernd Becker |
| 1997 | GOLDENGATE: a fast and accurate bridging fault simulator under a hybrid logic/IDDQ testing environment. Tzuhao Chen, Ibrahim N. Hajj |
| 1997 | Generalized matching from theory to application. Patrick Vuillod, Luca Benini, Giovanni De Micheli |
| 1997 | Generalized resource sharing. Salil Raje, Reinaldo A. Bergamaschi |
| 1997 | Global harmony: coupled noise analysis for full-chip RC interconnect networks. Kenneth L. Shepard, Vinod Narayanan, Peter C. Elmendorf, Gutuan Zheng |
| 1997 | Global interconnect sizing and spacing with consideration of coupling capacitance. Jason Cong, Lei He, Cheng-Kok Koh, David Zhigang Pan |
| 1997 | Hardware/software partitioning for multi-function systems. Asawaree Kalavade, P. A. Subrahmanyam |
| 1997 | Hierarchical partitioning for field-programmable systems. Vi Chi Chan, David Lewis |
| 1997 | High-level area and power estimation for VLSI circuits. Mahadevamurty Nemani, Farid N. Najm |
| 1997 | High-level scheduling model and control synthesis for a broad range of design applications. Chih-Tung Chen, Kayhan Küçükçakar |
| 1997 | Hybrid spectral/iterative partitioning. Jason Y. Zien, Pak K. Chan, Martine D. F. Schlag |
| 1997 | IES3: a fast integral equation solver for efficient 3-dimensional extraction. Sharad Kapur, David E. Long |
| 1997 | Interconnect design for deep submicron ICs. Jason Cong, David Zhigang Pan, Lei He, Cheng-Kok Koh, Kei-Yong Khoo |
| 1997 | Interconnect layout optimization under higher-order RLC model. Jason Cong, Cheng-Kok Koh |
| 1997 | Java as a specification language for hardware-software systems. Rachid Helaihel, Kunle Olukotun |
| 1997 | Large scale circuit partitioning with loose/stable net removal and signal flow based clustering. Jason Cong, Honching Peter Li, Sung Kyu Lim, Toshiyuki Shibuya, Dongmin Xu |
| 1997 | Library-less synthesis for static CMOS combinational logic circuits. Sergey Gavrilov, Alexey Glebov, Satyamurthy Pullela, S. C. Moore, Abhijit Dharchoudhury, Rajendran Panda, Gopalakrishnan Vijayan, David T. Blaauw |
| 1997 | Logic synthesis for large pass transistor circuits. Premal Buch, Amit Narayan, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli |
| 1997 | Low power logic synthesis for XOR based circuits. Unni Narayanan, C. L. Liu |
| 1997 | MOGAC: a multiobjective genetic algorithm for the co-synthesis of hardware-software embedded systems. Robert P. Dick, Niraj K. Jha |
| 1997 | Maximum independent sets on transitive graphs and their applications in testing and CAD. Dimitrios Kagaris, Spyros Tragoudas |
| 1997 | Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems. Kyosun Kim, Ramesh Karri, Miodrag Potkonjak |
| 1997 | Minimum area retiming with equivalent initial states. Naresh Maheshwari, Sachin S. Sapatnekar |
| 1997 | Modeling and synthesis of behavior, control and dataflow (tutorial). Raul Camposano, Andrew Seawright, Joseph Buck |
| 1997 | Multipoint Padé approximation using a rational block Lanczos algorithm. Tuyen V. Nguyen, Jing Li |
| 1997 | NRG: global and detailed placement. Majid Sarrafzadeh, Maogang Wang |
| 1997 | Negative thinking by incremental problem solving: application to unate covering. Evguenii I. Goldberg, Luca P. Carloni, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1997 | OPTIMIST: state minimization for optimal 2-level logic implementation. Robert M. Fuhrer, Steven M. Nowick |
| 1997 | Optimal shape function for a bi-directional wire under Elmore delay model. Youxin Gao, D. F. Wong |
| 1997 | Optimal wire and transistor sizing for circuits with non-tree topology. Lieven Vandenberghe, Stephen P. Boyd, Abbas El Gamal |
| 1997 | Optimization techniques for high-performance digital circuits. Chandramouli Visweswariah |
| 1997 | Optimizing computations in a transposed direct form realization of floating-point LTI-FIR systems. Naushik Sankarayya, Kaushik Roy, Debashis Bhattacharya |
| 1997 | PHDD: an efficient graph representation for floating point circuit verification. Yirng-An Chen, Randal E. Bryant |
| 1997 | PRIMA: passive reduced-order interconnect macromodeling algorithm. Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi |
| 1997 | Partial scan delay fault testing of asynchronous circuits. Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Saldanha, Alexander Taubin |
| 1997 | Partitioning around roadblocks: tackling constraints with intermediate relaxations. Shantanu Dutt, Halim Theny |
| 1997 | Performance analysis of a system of communicating processes. Sujit Dey, Surendra Bommu |
| 1997 | Post-route optimization for improved yield using a rubber-band wiring model. Jeffrey Z. Su, Wayne Wei-Ming Dai |
| 1997 | Power optimization using divide-and-conquer techniques for minimization of the number of operations. Inki Hong, Miodrag Potkonjak, Ramesh Karri |
| 1997 | Power sensitivity - a new method to estimate power dissipation considering uncertain specifications of primary inputs. Zhanping Chen, Kaushik Roy, Tan-Li Chou |
| 1997 | Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997 Ralph H. J. M. Otten, Hiroto Yasuura |
| 1997 | Reachability analysis using partitioned-ROBDDs. Amit Narayan, Adrian J. Isles, Jawahar Jain, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1997 | Real time analysis and priority scheduler generation for hardware-software systems with a synthesized run-time system. Vincent John Mooney III, Giovanni De Micheli |
| 1997 | Record & play: a structural fixed point iteration for sequential circuit verification. Dominik Stoffel, Wolfgang Kunz |
| 1997 | Replication for logic bipartitioning. Morgan Enos, Scott Hauck, Majid Sarrafzadeh |
| 1997 | Resource sharing in hierarchical synthesis. Oliver Bringmann, Wolfgang Rosenstiel |
| 1997 | Scheduling and binding bounds for RT-level symbolic execution. Chuck Monahan, Forrest Brewer |
| 1997 | Sequential optimisation without state space exploration. Amit Mehrotra, Shaz Qadeer, Vigyan Singhal, Robert K. Brayton, Adnan Aziz, Alberto L. Sangiovanni-Vincentelli |
| 1997 | Simulated quenching: a new placement method for module generation. Shinji Sato |
| 1997 | Simulation methods for RF integrated circuits. Kenneth S. Kundert |
| 1997 | Speeding up technology-independent timing optimization by network partitioning. Rajat Aggarwal, Rajeev Murgai, Masahiro Fujita |
| 1997 | State transformation in event driven explicit simulation. Tuyen V. Nguyen, Anirudh Devgan |
| 1997 | Symbolic analysis of large analog circuits with determinant decision diagrams. Chuanjin Richard Shi, Xiang-Dong Tan |
| 1997 | Test and diagnosis of fault logic blocks in FPGAs. Sying-Jyan Wang, Tsi-Ming Tsai |
| 1997 | Test generation for comprehensive testing of linear analog circuits using transient response sampling. Pramodchandran N. Variyam, Abhijit Chatterjee |
| 1997 | Test generation for primitive path delay faults in combinational circuits. Ramesh C. Tekumalla, Premachandran R. Menon |
| 1997 | The disjunctive decomposition of logic functions. Valeria Bertacco, Maurizio Damiani |
| 1997 | Timing analysis and optimization: from devices to systems (tutorial). Anirudh Devgan, Leon Stok, Sandip Kundu |
| 1997 | Timing analysis based on primitive path delay fault identification. Mukund Sivaraman, Andrzej J. Strojwas |
| 1997 | Trace driven logic synthesis - application to power minimization. Luca P. Carloni, Patrick C. McGeer, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli |
| 1997 | Transform domain techniques for efficient extraction of substrate parasitics. Ranjit Gharpurey, Srinath Hosur |
| 1997 | Transformational partitioning for co-design of multiprocessor systems. Gilberto Fernandes Marchioro, Jean-Marc Daveau, Ahmed Amine Jerraya |
| 1997 | Verifying correct pipeline implementation for microprocessors. Jeremy R. Levitt, Kunle Olukotun |
| 1997 | Verifying hardware in its software context. Robert P. Kurshan, Vladimir Levin, Marius Minea, Doron A. Peled, Hüsnü Yenigün |
| 1997 | Wavesched: a novel scheduling technique for control-flow intensive behavioral descriptions. Ganesh Lakshminarayana, Kamal S. Khouri, Niraj K. Jha |