| 1991 | 1991 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1993, Santa Clara, CA, USA, November 11-14, 1991. Digest of Technical Papers |
| 1991 | A Behavioral Representation for Nyquist Rate A/D Converters. Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli, Georges G. E. Gielen, Paul R. Gray |
| 1991 | A Cell-Replicating Approach to Minicut-Based Circuit Partitioning. Chuck Kring, A. Richard Newton |
| 1991 | A Channel Router for Single Layer Customization Technology. Yachyang Sun, Sai-keung Dong, Shinji Sato, C. L. Liu |
| 1991 | A Convex Optimization Approach to Transistor Sizing for CMOS Circuits. Sachin S. Sapatnekar, Vasant B. Rao, Pravin M. Vaidya |
| 1991 | A Fault Oriented Partial Scan Design Approach. Vivek Chickermane, Janak H. Patel |
| 1991 | A Flexible Scheme for State Assignment Based on Characteristics of the FSM. Biswadip Mitra, Preeti Ranjan Panda, Parimal Pal Chaudhuri |
| 1991 | A Floorplanning Algorithm Using Rectangular Voronoi Diagram and Force-Directed Block Shaping. Sang-Gil Choi, Chong-Min Kyung |
| 1991 | A Hierarchical Methodology to Improve Channel Routing by Pin Permutation. Cliff Yungchin Hou, C. Y. Roger Chen |
| 1991 | A Modified Envelope-Following Approach to Clocked Analog Circuit Simulation. Luís Miguel Silveira, Jacob White, Steven B. Leeb |
| 1991 | A New Approach to Solving False Path Problem in Timing Analysis. Shiang-Tang Huang, Tai-Ming Parng, Jyuo-Min Shyu |
| 1991 | A New Linear Placement Algorithm for Cell Generation. Edgar Auer, Werner L. Schiele, Georg Sigl |
| 1991 | A New Model for Over-The-Cell Channel Routing with Three Layers. Masayuki Terai, Kazuhiro Takahashi, Kazuo Nakajima, Koji Sato |
| 1991 | A New Performance Driven Placement Algorithm. Tong Gao, Pravo M. Vaidya, C. L. Liu |
| 1991 | A New Test Generation Method for Sequential Circuits. Dong-Ho Lee, Sudhakar M. Reddy |
| 1991 | A Parallel Steiner Heuristic for Wirelength Estimation of Large Net Populations. Rajeev Jayaraman, Rob A. Rutenbar |
| 1991 | A Scheduling Algorithm for Conditional Resource Sharing. Taewhan Kim, Jane W.-S. Liu, C. L. Liu |
| 1991 | A Signal-Driven Discrete Relaxation Technique for Architectural Level Test Generation. Jaushin Lee, Janak H. Patel |
| 1991 | A Stimulus/Response System Based on Hierarchical Timing Diagrams. Karim Khordoc, Mario Dufresne, Eduard Cerny |
| 1991 | A Switch-Level Matrix Approach to Transistor-Level Fault Simulation. Terry Lee, Ibrahim N. Hajj |
| 1991 | A Systematic Approach for Designing Testable VLSI Circuits. Sen-Pin Lin, Charles Njinda, Melvin A. Breuer |
| 1991 | Algorithms for Three-Layer Over-The-Cell Channel Routing. Nancy D. Holmes, Naveed A. Sherwani, Majid Sarrafzadeh |
| 1991 | An ATPG-Based Approach to Sequential Logic Optimization. Kwang-Ting Cheng |
| 1991 | An Accelerated Steady-State Method for Networks with Internally Controlled Switches. David Bedrosian, Jirí Vlach |
| 1991 | An Algorithm for Component Selection in Performance Optimized Scheduling. Loganath Ramachandran, Daniel Gajski |
| 1991 | An Automatic Finite State Machine Synthesis Using Temporal Logic Decomposition. Keisuke Bekki, Tohru Nagai, Nobuhiro Hamada, Tsuguo Shimizu, Noriharu Hiratsuka, Kazumasa Shima |
| 1991 | An Impulse-Response Based Linear Time-Complexity Algorithm for Lossy Interconnect Simulation. Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson |
| 1991 | Application of Boolean Unification to Combinational Logic Synthesis. Masahiro Fujita, Yutaka Tamiya, Yuji Kukimoto, Kuang-Chien Chen |
| 1991 | Automatic Detection of MOS Synchronizers for Timing Verification. Joel Grodstein, Nick Rethman, Rahul Razdan, Gabriel P. Bischoff |
| 1991 | Automatic Synthesis of Locally-Clocked Asynchronous State Machines. Steven M. Nowick, David L. Dill |
| 1991 | Automatic Synthesis of Time-Stationary Controllers for Pipelined Data Paths. James J. Kim, Fadi J. Kurdahi, Nohbyung Park |
| 1991 | Automating Analog Circuit Design using Constrained Optimization Techniques. Prabir C. Maulik, L. Richard Carley |
| 1991 | BETA: Behavioral Testability Analysis. Chung-Hsing Chen, Chienwen Wu, Daniel G. Saab |
| 1991 | BISTSYN - A Built-In Self-Test Synthesizer. Chien-In Henry Chen |
| 1991 | Bipolar Timing Modeling Including Interconnects Based on Parametric Correction. Andrew T. Yang, Yu-Hsu Chang |
| 1991 | Built-In Self-Test for Multi-Port RAMs. Vladimir Castro Alves, Michael Nicolaidis, P. Lestrat, Bernard Courtois |
| 1991 | Calculating Resetability and Reset Sequences. Carl Pixley, Gary Beihl |
| 1991 | Circuit Comparison by Hierarchical Pattern Matching. Georg Pelz, Uli Roettcher |
| 1991 | Circuit Optimization Driven by Worst-Case Distances. Kurt Antreich, Helmut E. Graeb |
| 1991 | Circuit Performance Variability Reduction: Principles, Problems, and Practical Solutions. M. A. Styblinski, J. C. Zhang |
| 1991 | Clustering Techniques for Register Optimization During Scheduling Preprocessing. Francis Depuydt, Gert Goossens, Hugo De Man |
| 1991 | Comparison of Random Test Vector Generation Strategies. Warren H. Debany Jr., Carlos R. P. Hartmann, Pramod K. Varshney, Kishan G. Mehrotra |
| 1991 | Compiling Multi-Dimensional Data Streams into Distributed DSP ASIC Memory. Jan Vanhoof, Ivo Bolsens, Hugo De Man |
| 1991 | Conjugate Direction Waveform Methods for Transient Two-Dimensional Simulation for MOS Devices. Andrew Lumsdaine, Mark W. Reichelt, Jacob K. White |
| 1991 | Converting Combinational Circuits into Pipelined Data Paths. Andreas Münzner, Günter Hemme |
| 1991 | DIATEST: A Fast Diagnostic Test Pattern Generator for Combinational Circuits. Torsten Grüning, Udo Mahlstedt, Hartmut Koopmeiners |
| 1991 | Data Framework for VLSI Design. Amir Milo, Smadar Nehab |
| 1991 | Delay Computation in Combinational Logic Circuits: Theory and Algorithms. Srinivas Devadas, Kurt Keutzer, Sharad Malik |
| 1991 | Delay Optimization of Combinational Logic Circuits By Clustering and Partial Collapsing. Hervé J. Touati, Hamid Savoj, Robert K. Brayton |
| 1991 | Delay and Crosstalk Simulation of High-Speed VLSI Interconnects with Nonlinear Terminations. Dong H. Xie, Michel S. Nakhla |
| 1991 | Design for Easily Applying Test Vectors to Improve Delay Fault Coverage. Edwin Hsing-Mean Sha, Liang-Fang Chao |
| 1991 | Don't Care Sequences and the Optimization of Interacting Finite State Machines. June-Kyung Rho, Gary D. Hachtel, Fabio Somenzi |
| 1991 | Efficient Microcode Arrangement and Controller Synthesis for Application Specific Integrated Circuits. Shi-Zheng Lin, Cheng-Tsung Hwang, Yu-Chin Hsu |
| 1991 | Encoding Multiple Outputs for Improved Column Compaction. David Binger, David Knapp |
| 1991 | Estimating Essential Design Characteristics to Support Project Planning for ASIC Design Management. Klaus D. Müller-Glaser, K. Kirsch, Karl Neusinger |
| 1991 | Evaluating RC-Interconnect Using Moment-Matching Approximations. Nanda Gopal, Dean P. Neikirk, Lawrence T. Pillage |
| 1991 | Exact Zero Skew. Ren-Song Tsay |
| 1991 | Extended BDD's: Trading off Canonicity for Structure in Verification Algorithms. Seh-Woong Jeong, Bernard Plessier, Gary D. Hachtel, Fabio Somenzi |
| 1991 | Extracting Local Don't Cares for Network Optimization. Hamid Savoj, Robert K. Brayton, Hervé J. Touati |
| 1991 | Extraction of Gate Level Models from Transistor Circuits by Four-Valued Symbolic Analysis. Randal E. Bryant |
| 1991 | FPD - An Environment for Exact Timing Analysis. João P. Marques Silva, Karem A. Sakallah, Luís M. Vidigal |
| 1991 | Fast Spectral Methods for Ratio Cut Partitioning and Clustering. Lars W. Hagen, Andrew B. Kahng |
| 1991 | Fault Simulation for Multiple Faults Using Shared BDD Representation of Fault Sets. Noriyuki Takahashi, Nagisa Ishiura, Shuzo Yajima |
| 1991 | Finite State Machine Decomposition by Transition Pairing. James H. Kukula, Srinivas Devadas |
| 1991 | Flexible Block-Multiplier Generation. H. M. A. M. Arts, Jos T. J. van Eijndhoven, Leon Stok |
| 1991 | HIVE: An Efficient Interconnect Capacitance Extractor to Support Submicron Multilevel Interconnect Designs. Keh-Jeng Chang, Soo-Young Oh, Ken Lee |
| 1991 | Heuristic Minimazation of Multiple-Valued Relations. Yosinori Watanabe, Robert K. Brayton |
| 1991 | Hierarchical Analyzer for VLSI Power Supply Networks Based on a New Reduction Method. Takeshi Yoshitome |
| 1991 | Improved Logic Synthesis Algorithms for Table Look Up Architectures. Rajeev Murgai, Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1991 | Improved Methods for IC Yield and Quality Optimization Using Surface Integrals. Peter Feldmann, Stephen W. Director |
| 1991 | Increasing Fault Coverage for Synchronous Sequential Circuits by the Multiple Observation Time Test Strategy. Irith Pomeranz, Sudhakar M. Reddy, Lakshmi N. Reddy |
| 1991 | Knowledge-Based Debugging of ASICs: Real Case Study and Performance Analysis. M. Marzouki, F. L. Vargas |
| 1991 | LSAT-An Algorithm for the Synthesis of Two Level Threshold Gate Networks. Arlindo L. Oliveira, Alberto L. Sangiovanni-Vincentelli |
| 1991 | Layout Driven Logic Restructuring/Decomposition. Massoud Pedram, Narasimha B. Bhat |
| 1991 | Layout-Area Models for High-Level Synthesis. Allen C.-H. Wu, Viraphol Chaiyakul, Daniel Gajski |
| 1991 | Methods for Reducing Events in Sequential Circuit Fault Simulation. Elizabeth M. Rudnick, Thomas M. Niermann, Janak H. Patel |
| 1991 | Minimazation of Binary Decision Diagrams Based on Exchanges of Variables. Nagisa Ishiura, Hiroshi Sawada, Shuzo Yajima |
| 1991 | Minimizing Channel Density by Shifting Blocks and Terminals. Yang Cai, D. F. Wong |
| 1991 | Multi-Level Logic Minimization Based on Minimal Support and its Application to the Minimization of Look-Up Table Type FPGAs. Masahiro Fujita, Yusuke Matsunaga |
| 1991 | New Simulation Methods for MOS VLSI Timing and Reliability. Yung-Ho Shih, Yusuf Leblebici, Sung-Mo Kang |
| 1991 | Observability Relations and Observability Don't Cares. Hamid Savoj, Robert K. Brayton |
| 1991 | Obtaining Functionally Equivalent Simulations using VHDL and a Time-Shift Transformation. Frank Vahid, Daniel Gajski |
| 1991 | On Clustering for Minimum Delay/Area. Rajeev Murgai, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1991 | On Topological Via Minimization and Routing. Moazzem Hossain, Naveed A. Sherwani |
| 1991 | Optimal Module Implementation and Its Application to Transistor Placement. T. W. Her, D. F. Wong |
| 1991 | Optimizing Resource Utilization Using Transformations. Miodrag Potkonjak, Jan M. Rabaey |
| 1991 | Ordering Storage Elements in a Single Scan Chain. Rajesh Gupta, Melvin A. Breuer |
| 1991 | PARIS: A Parallel Pattern Fault Simulator for Synchronous Sequential Circuits. Nikolaus Gouders, Reinhard Kaibel |
| 1991 | PROTON: A Parallel Detailed Router on an MIMD Parallel Machine. Tsukasa Yamauchi, Akio Ishizuka, Toshiyuki Nakata, Nobuyuki Nishiguchi, Nobuhiko Koike |
| 1991 | Path Sensitization in Critical Path Problem. Hsi-Chuan Chen, David Hung-Chang Du |
| 1991 | Performance Directed Synthesis for Table Look Up Programmable Gate Arrays. Rajeev Murgai, Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1991 | Performance Enhancement through the Generalized Bypass Transform. Patrick C. McGeer, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli, Sartaj Sahni |
| 1991 | Post-Processor for Data Path Synthesis Using Multiport Memories. Imtiaz Ahmad, C. Y. Roger Chen |
| 1991 | Probabilistic Design Verification. Jawahar Jain, James R. Bitner, Donald S. Fussell, Jacob A. Abraham |
| 1991 | RITUAL: Performance Driven Placement Algorithm for Small Cell ICs. Arvind Srinivasan, Kamal Chaudhary, Ernest S. Kuh |
| 1991 | Rapid-Prototyping of Hardware and Software in a Unified Framework. Mani B. Srivastava, Robert W. Brodersen |
| 1991 | Retarded Models for PC Board Interconnects - Or How the Speed of Light Affects your SPICE Circuit Simulation. Hansruedi Heeb, Albert E. Ruehli |
| 1991 | SADE: A Graphical Tool for VHDL-Based System Analysis. Jukka Lahti, Matti Sipola, Jorma Kivelä |
| 1991 | SLIM: A System for ASIC Library Management. Mahesh Mehendale, P. Murugavel, M. Poornima |
| 1991 | Scheduling in Programmable Video Signal Processors. Gerben Essink, Emile H. L. Aarts, R. van Dongen, Piet J. van Gerwen, Jan H. M. Korst, Kees A. Vissers |
| 1991 | State Assignment Based on the Reduced Dependency Theory and Recent Experimental Results. Christopher Duff, Gabriele Saucier |
| 1991 | Static Timing Analysis Using Interval Constraints. Ronald B. Stewart, Jacques Benkoski |
| 1991 | Switchbox Steiner Tree Problem in Presence of Obstacles. S. Miriyala, Jahangir A. Hashmi, Naveed A. Sherwani |
| 1991 | Synthesis for Testability Techniques for Asynchronous Circuits. Kurt Keutzer, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli |
| 1991 | Synthesis of Hazard-Free Asynchronous Circuits from Graphical Specifications. Cho W. Moon, Paul R. Stephan, Robert K. Brayton |
| 1991 | Synthesis of Optimal 1-Hot Coded On-Chip Controllers for BIST Hardware. Debaditya Mukherjee, Charles Njinda, Melvin A. Breuer |
| 1991 | System Specification and Synthesis with the SpecCharts Language. Sanjiv Narayan, Frank Vahid, Daniel Gajski |
| 1991 | Techniques for Simultaneous Placement and Routing of Custom Analog Cells in KOAN/ANAGRAM II. John M. Cohn, David J. Garrod, Rob A. Rutenbar, L. Richard Carley |
| 1991 | Technology Mapping on Lookup Table-Based FPGAs for Performance. Robert J. Francis, Jonathan Rose, Zvonko G. Vranesic |
| 1991 | Test Generation for Synchronous Sequential Circuits Based on Fault Extraction. Irith Pomeranz, Sudhakar M. Reddy |
| 1991 | The Calculation of Signal Stable Ranges in Combinational Circuits. Li-Ren Liu, Hsi-Chuan Chen, David Hung-Chang Du |
| 1991 | The Configuration Management for Version Control in an Object-Oriented VHDL Design Environment. Moon-Jung Chung, Sangchul Kim |
| 1991 | The Crossing Distribution Problem. Malgorzata Marek-Sadowska, Majid Sarrafzadeh |
| 1991 | The Effects of False Paths in High-Level Synthesis. Reinaldo A. Bergamaschi |
| 1991 | The Hercules CAD Task Management System. Jay B. Brockman, Stephen W. Director |
| 1991 | The Impedance Fault Model and Design for Robust Impedance Fault Testability. Mark D. Sloan, William A. Rogers, Srihari Shoroff |
| 1991 | Timing Analysis and Delay-Fault Test Generation using Path-Recursive Functions. Patrick C. McGeer, Alexander Saldanha, Paul R. Stephan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1991 | Timing-Driven Partial Scan. Jing-Yang Jou, Kwang-Ting Cheng |
| 1991 | Timing-Oriented Routers for PCB Layout Design of High-Performance Computers. Yutaka Sekiyama, Yasuyuki Fujihara, Terumine Hayashi, Mitsuho Seki, Jiro Kusuhara, Kazuhiko Iijima, Masahiro Takakura, Koji Fukatani |
| 1991 | Track Assignment in the Pathway Datapath Layout Assembler. Amnon Baron Cohen, Michael Shechory |
| 1991 | Transient Sensitivity Computation for Waveform Relaxation Based Timing Simulation. Chun-Jung Chen, Jyuo-Min Shyu, Wu-Shiung Feng |
| 1991 | Transient Three-Dimensional Mixed-Level Circuit and Device Simulation: Algorithms and Applications. Kartikeya Mayaram, Ping Yang, Jue-Hsien Chern |
| 1991 | Two-Dimensional Layout Synthesis for Large-Scale CMOS Circuits. Katsunori Tani, Kyoichi Izumi, Masahiko Kashimura, Tsuneo Matsuda, Takashi Fujii |
| 1991 | Variable Ordering and Selection for FSM Traversal. Seon-Woong Jeong, Bernard Plessier, Gary D. Hachtel, Fabio Somenzi |
| 1991 | Verification of Relations Between Synchronous Machines. Filip Van Aelten, Jonathan Allen, Srinivas Devadas |
| 1991 | Wafer Packing for Full Mask Exposure Fabrication. Ching-Ting Wu, Andrew Lim, David Hung-Chang Du |
| 1991 | iMACSIM: A Program for Multi-Level Analog Circuit Simulation. Jaidip Singh, Resve A. Saleh |