HPCA A*

56 papers

YearTitle / Authors
20172017 IEEE International Symposium on High Performance Computer Architecture, HPCA 2017, Austin, TX, USA, February 4-8, 2017
2017A Split Cache Hierarchy for Enabling Data-Oriented Optimizations.
Andreas Sembrant, Erik Hagersten, David Black-Schaffer
2017ATOM: Atomic Durability in Non-volatile Memory through Hardware Logging.
Arpit Joshi, Vijay Nagarajan, Stratis Viglas, Marcelo Cintra
2017Application-Specific Performance-Aware Energy Optimization on Android Mobile Devices.
Karthik Rao, Jun Wang, Sudhakar Yalamanchili, Yorai Wardi, Handong Ye
2017Architecting an Energy-Efficient DRAM System for GPUs.
Niladrish Chatterjee, Mike O'Connor, Donghyuk Lee, Daniel R. Johnson, Stephen W. Keckler, Minsoo Rhu, William J. Dally
2017BRAVO: Balanced Reliability-Aware Voltage Optimization.
Karthik Swaminathan, Nandhini Chandramoorthy, Chen-Yong Cher, Ramon Bertran, Alper Buyuktosunoglu, Pradip Bose
2017Balancing Performance and Lifetime of MLC PCM by Using a Region Retention Monitor.
Mingzhe Zhang, Lunkai Zhang, Lei Jiang, Zhiyong Liu, Frederic T. Chong
2017Boomerang: A Metadata-Free Architecture for Control Flow Delivery.
Rakesh Kumar, Cheng-Chieh Huang, Boris Grot, Vijay Nagarajan
2017Camouflage: Memory Traffic Shaping to Mitigate Timing Attacks.
Yanqi Zhou, Sameer Wagh, Prateek Mittal, David Wentzlaff
2017Cold Boot Attacks are Still Hot: Security Analysis of Memory Scramblers in Modern Processors.
Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Reetuparna Das, Todd M. Austin
2017Compute Caches.
Shaizeen Aga, Supreet Jeloka, Arun Subramaniyan, Satish Narayanasamy, David T. Blaauw, Reetuparna Das
2017Controlled Kernel Launch for Dynamic Parallelism in GPUs.
Xulong Tang, Ashutosh Pattnaik, Huaipan Jiang, Onur Kayiran, Adwait Jog, Sreepathi Pai, Mohamed Assem Ibrahim, Mahmut T. Kandemir, Chita R. Das
2017Cooper: Task Colocation with Cooperative Games.
Qiuyun Llull, Songchun Fan, Seyed Majid Zahedi, Benjamin C. Lee
2017Cooperative Path-ORAM for Effective Memory Bandwidth Sharing in Server Settings.
Rujia Wang, Youtao Zhang, Jun Yang
2017Defect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices.
Sang-uhn Cha, Seongil O, Hyunsung Shin, Sangjoon Hwang, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Gyo-Young Jin, Young Hoon Son, Hyunyoon Cho, Jung Ho Ahn, Nam Sung Kim
2017Design and Analysis of an APU for Exascale Computing.
Thiruvengadam Vijayaraghavan, Yasuko Eckert, Gabriel H. Loh, Michael J. Schulte, Mike Ignatowski, Bradford M. Beckmann, William C. Brantley, Joseph L. Greathouse, Wei Huang, Arun Karunanithi, Onur Kayiran, Mitesh R. Meswani, Indrani Paul, Matthew Poremba, Steven Raasch, Steven K. Reinhardt, Greg Sadowski, Vilas Sridharan
2017Design and Evaluation of AWGR-Based Photonic NoC Architectures for 2.5D Integrated High Performance Computing Systems.
Paolo Grani, Roberto Proietti, Venkatesh Akella, S. J. Ben Yoo
2017Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links.
Sebastian Werner, Javier Navaridas, Mikel Luján
2017Dynamic GPGPU Power Management Using Adaptive Model Predictive Control.
Abhinandan Majumdar, Leonardo Piga, Indrani Paul, Joseph L. Greathouse, Wei Huang, David H. Albonesi
2017Efficient Sequential Consistency in GPUs via Relativistic Cache Coherence.
Xiaowei Ren, Mieszko Lis
2017Enabling Effective Module-Oblivious Power Gating for Embedded Processors.
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, John Sartori
2017Exploring Hyperdimensional Associative Memory.
Mohsen Imani, Abbas Rahimi, Deqian Kong, Tajana Rosing, Jan M. Rabaey
2017Fast Decentralized Power Capping for Server Clusters.
Reza Azimi, Masoud Badiei, Xin Zhan, Na Li, Sherief Reda
2017Fast and Accurate Exploration of Multi-level Caches Using Hierarchical Reuse Distance.
Rafael K. V. Maeda, Qiong Cai, Jiang Xu, Zhe Wang, Zhongyuan Tian
2017FlexFlow: A Flexible Dataflow Accelerator Architecture for Convolutional Neural Networks.
Wenyan Lu, Guihai Yan, Jiajun Li, Shijun Gong, Yinhe Han, Xiaowei Li
2017G-Scalar: Cost-Effective Generalized Scalar Execution Architecture for Power-Efficient GPUs.
Zhenhong Liu, Syed Zohaib Gilani, Murali Annavaram, Nam Sung Kim
2017GraphPIM: Enabling Instruction-Level PIM Offloading in Graph Computing Frameworks.
Lifeng Nai, Ramyad Hadidi, Jaewoong Sim, Hyojong Kim, Pranith Kumar, Hyesoon Kim
2017High-Bandwidth Low-Latency Approximate Interconnection Networks.
Daichi Fujiki, Kiyo Ishii, Ikki Fujiwara, Hiroki Matsutani, Hideharu Amano, Henri Casanova, Michihiro Koibuchi
2017Hipster: Hybrid Task Manager for Latency-Critical Cloud Workloads.
Rajiv Nishtala, Paul M. Carpenter, Vinicius Petrucci, Xavier Martorell
2017KAML: A Flexible, High-Performance Key-Value SSD.
Yanqin Jin, Hung-Wei Tseng, Yannis Papakonstantinou, Steven Swanson
2017Maximizing Cache Performance Under Uncertainty.
Nathan Beckmann, Daniel Sánchez
2017MemPod: A Clustered Architecture for Efficient and Scalable Migration in Flat Address Space Multi-level Memories.
Andreas Prodromou, Mitesh R. Meswani, Nuwan Jayasena, Gabriel H. Loh, Dean M. Tullsen
2017NCAP: Network-Driven, Packet Context-Aware Power Management for Client-Server Architecture.
Mohammad Alian, Ahmed H. M. O. Abulila, Lokesh Jindal, Daehoon Kim, Nam Sung Kim
2017Near-Ideal Networks-on-Chip for Servers.
Pejman Lotfi-Kamran, Mehdi Modarressi, Hamid Sarbazi-Azad
2017Near-Optimal Access Partitioning for Memory Hierarchies with Multiple Heterogeneous Bandwidth Sources.
Jayesh Gaur, Mainak Chaudhuri, Pradeep Ramachandran, Sreenivas Subramoney
2017Needle: Leveraging Program Analysis to Analyze and Extract Accelerators from Whole Programs.
Snehasish Kumar, Nick Sumner, Vijayalakshmi Srinivasan, Steve Margerm, Arrvindh Shriraman
2017PABST: Proportionally Allocated Bandwidth at the Source and Target.
Derek R. Hower, Harold W. Cain, Carl A. Waldspurger
2017Partial Row Activation for Low-Power DRAM System.
Yebin Lee, Hyeonggyu Kim, Seokin Hong, Soontae Kim
2017Pilot Register File: Energy Efficient Partitioned Register File for GPUs.
Mohammad Abdel-Majeed, Alireza Shafaei, Hyeran Jeon, Massoud Pedram, Murali Annavaram
2017PipeLayer: A Pipelined ReRAM-Based Accelerator for Deep Learning.
Linghao Song, Xuehai Qian, Hai Li, Yiran Chen
2017Processing-in-Memory Enabled Graphics Processors for 3D Rendering.
Chenhao Xie, Shuaiwen Leon Song, Jing Wang, Weigong Zhang, Xin Fu
2017Radiation-Induced Error Criticality in Modern HPC Parallel Accelerators.
Daniel Alfonso Gonçalves de Oliveira, Laércio Lima Pilla, Mauricio Hanzich, Vinicius Fratin, Fernando Fernandes, Caio B. Lunardi, José María Cela, Philippe Olivier Alexandre Navaux, Luigi Carro, Paolo Rech
2017Random Folded Clos Topologies for Datacenter Networks.
Cristobal Camarero, Carmen Martínez, Ramón Beivide
2017Reliability-Aware Scheduling on Heterogeneous Multicore Processors.
Ajeya Naithani, Stijn Eyerman, Lieven Eeckhout
2017SILC-FM: Subblocked InterLeaved Cache-Like Flat Memory Organization.
Jee Ho Ryoo, Mitesh R. Meswani, Andreas Prodromou, Lizy K. John
2017SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures.
Yuhwan Ro, Hyunyoon Cho, Eojin Lee, Daejin Jung, Young Hoon Son, Jung Ho Ahn, Jae W. Lee
2017SWAP: Effective Fine-Grain Management of Shared Last-Level Caches with Minimum Hardware Support.
Xiaodong Wang, Shuang Chen, Jeff Setter, José F. Martínez
2017Secure Dynamic Memory Scheduling Against Timing Channel Attacks.
Yao Wang, Benjamin Wu, G. Edward Suh
2017SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies.
Hasan Hassan, Nandita Vijaykumar, Samira Manabi Khan, Saugata Ghose, Kevin K. Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, Onur Mutlu
2017Static Bubble: A Framework for Deadlock-Free Irregular On-chip Topologies.
Aniruddh Ramrakhyani, Tushar Krishna
2017Supporting Address Translation for Accelerator-Centric Architectures.
Yuchen Hao, Zhenman Fang, Glenn Reinman, Jason Cong
2017Tiny Directory: Efficient Shared Memory in Many-Core Systems with Ultra-Low-Overhead Coherence Tracking.
Sudhanshu Shukla, Mainak Chaudhuri
2017Towards Pervasive and User Satisfactory CNN across GPU Microarchitectures.
Mingcong Song, Yang Hu, Huixiang Chen, Tao Li
2017Transparent and Efficient CFI Enforcement with Intel Processor Trace.
Yutao Liu, Peitao Shi, Xinran Wang, Haibo Chen, Binyu Zang, Haibing Guan
2017Understanding and Optimizing Power Consumption in Memory Networks.
Xun Jian, Pavan Kumar Hanumolu, Rakesh Kumar
2017Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques.
Yu Cai, Saugata Ghose, Yixin Luo, Ken Mai, Onur Mutlu, Erich F. Haratsch