HPCA A*

56 papers

YearTitle / Authors
201319th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013
2013A case for Refresh Pausing in DRAM memory systems.
Prashant J. Nair, Chia-Chen Chou, Moinuddin K. Qureshi
2013A group-commit mechanism for ROB-based processors implementing the X86 ISA.
Furat Afram, Hui Zeng, Kanad Ghose
2013A multiple SIMD, multiple data (MSMD) architecture: Parallel execution of dynamic and static SIMD fragments.
Yaohua Wang, Shuming Chen, Jianghua Wan, Jiayuan Meng, Kai Zhang, Wei Liu, Xi Ning
2013A novel system architecture for web scale applications using lightweight CPUs and virtualized I/O.
Kshitij Sudan, Saisanthosh Balakrishnan, Sean Lie, Min Xu, Dhiraj Mallick, Gary Lauterbach, Rajeev Balasubramonian
2013Accelerating write by exploiting PCM asymmetries.
Jianhui Yue, Yifeng Zhu
2013Adaptive Reliability Chipkill Correct (ARCC).
Xun Jian, Rakesh Kumar
2013Application-to-core mapping policies to reduce memory system interference in multi-core systems.
Reetuparna Das, Rachata Ausavarungnirun, Onur Mutlu, Akhilesh Kumar, Mani Azimi
2013Architecture support for guest-transparent VM protection from untrusted hypervisor and physical attacks.
Yubin Xia, Yutao Liu, Haibo Chen
2013Breaking the on-chip latency barrier using SMART.
Tushar Krishna, Chia-Hsin Owen Chen, Woo-Cheol Kwon, Li-Shiuan Peh
2013Bridging the semantic gap: Emulating biological neuronal behaviors with simple digital neurons.
Andrew Nere, Atif Hashmi, Mikko H. Lipasti, Giulio Tononi
2013Cache coherence for GPU architectures.
Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor, Tor M. Aamodt
2013Coset coding to extend the lifetime of memory.
Adam N. Jacobvitz, A. Robert Calderbank, Daniel J. Sorin
2013Cost effective data center servers.
Rui Hou, Tao Jiang, Liuhang Zhang, Pengfei Qi, Jianbo Dong, Haibin Wang, Xiongli Gu, Shujie Zhang
2013Disintegrated control for energy-efficient and heterogeneous memory systems.
Tae Jun Ham, Bharath K. Chelepalli, Neng Xue, Benjamin C. Lee
2013ECM: Effective Capacity Maximizer for high-performance compressed caching.
Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Junghee Lee, Jongman Kim
2013ESESC: A fast multicore simulator using Time-Based Sampling.
Ehsan K. Ardestani, Jose Renau
2013Enabling distributed generation powered sustainable high-performance data center.
Chao Li, Ruijin Zhou, Tao Li
2013Energy-efficient interconnect via Router Parking.
Ahmad Samih, Ren Wang, Anil Krishna, Christian Maciocco, Tsung-Yuan Charlie Tai, Yan Solihin
2013EnergySmart: Toward energy-efficient manycores for Near-Threshold Computing.
Ulya R. Karpuzcu, Abhishek A. Sinkar, Nam Sung Kim, Josep Torrellas
2013Exploring high-performance and energy proportional interface for phase change memory systems.
Zhongqi Li, Ruijin Zhou, Tao Li
2013High-performance and energy-efficient mobile web browsing on big/little systems.
Yuhao Zhu, Vijay Janapa Reddi
2013High-speed formal verification of heterogeneous coherence hierarchies.
Jesse G. Beu, Jason A. Poovey, Eric R. Hein, Thomas M. Conte
2013How to implement effective prediction and forwarding for fusable dynamic multicore architectures.
Behnam Robatmili, Dong Li, Hadi Esmaeilzadeh, Madhu Saravana Sibi Govindan, Aaron Smith, Andrew Putnam, Doug Burger, Stephen W. Keckler
2013Hybrid latency tolerance for robust energy-efficiency on 1000-core data parallel processors.
Neal Clayton Crago, Omid Azizi, Steven S. Lumetta, Sanjay J. Patel
2013Illusionist: Transforming lightweight cores into aggressive cores on demand.
Amin Ansari, Shuguang Feng, Shantanu Gupta, Josep Torrellas, Scott A. Mahlke
2013Improving multi-core performance using mixed-cell cache architecture.
Samira Manabi Khan, Alaa R. Alameldeen, Chris Wilkerson, Jaydeep P. Kulkarni, Daniel A. Jiménez
2013In-network traffic regulation for Transactional Memory.
Lihang Zhao, Woojin Choi, Lizhong Chen, Jeffrey T. Draper
2013Layout-conscious random topologies for HPC off-chip interconnects.
Michihiro Koibuchi, Ikki Fujiwara, Hiroki Matsutani, Henri Casanova
2013MISE: Providing performance predictability and improving fairness in shared main memory systems.
Lavanya Subramanian, Vivek Seshadri, Yoongu Kim, Ben Jaiyen, Onur Mutlu
2013Macho: A failure model-oriented adaptive cache architecture to enable near-threshold voltage scaling.
Tayyeb Mahmood, Soontae Kim, Seokin Hong
2013Modeling performance variation due to cache sharing.
Andreas Sandberg, Andreas Sembrant, Erik Hagersten, David Black-Schaffer
2013Navigating heterogeneous processors with market mechanisms.
Marisabel Guevara, Benjamin Lubin, Benjamin C. Lee
2013Optimizing Google's warehouse scale computers: The NUMA experience.
Lingjia Tang, Jason Mars, Xiao Zhang, Robert Hagmann, Robert Hundt, Eric Tune
2013Optimizing virtual machine scheduling in NUMA multicore systems.
Jia Rao, Kun Wang, Xiaobo Zhou, Cheng-Zhong Xu
2013Power struggles: Revisiting the RISC vs. CISC debate on contemporary ARM and x86 architectures.
Emily R. Blem, Jaikrishnan Menon, Karthikeyan Sankaralingam
2013Power-efficient computing for compute-intensive GPGPU applications.
Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte
2013Power-performance co-optimization of throughput core architecture using resistive memory.
Nilanjan Goswami, Bingyi Cao, Tao Li
2013RECAP: A region-based cure for the common cold (cache).
Jason Zebchuk, Harold W. Cain, Xin Tong, Vijayalakshmi Srinivasan, Andreas Moshovos
2013Rainbow: Efficient memory dependence recording with high replay parallelism for relaxed memory model.
Xuehai Qian, He Huang, Benjamín Sahelices, Depei Qian
2013Reducing GPU offload latency via fine-grained CPU-GPU synchronization.
Daniel Lustig, Margaret Martonosi
2013Refrint: Intelligent refresh to minimize power in on-chip multiprocessor cache hierarchies.
Aditya Agrawal, Prabhat Jain, Amin Ansari, Josep Torrellas
2013Runnemede: An architecture for Ubiquitous High-Performance Computing.
Nicholas P. Carter, Aditya Agrawal, Shekhar Borkar, Romain Cledat, Howard David, Dave Dunning, Joshua B. Fryman, Ivan Ganev, Roger A. Golliver, Rob C. Knauerhase, Richard Lethin, Benoît Meister, Asit K. Mishra, Wilfred R. Pinfold, Justin Teller, Josep Torrellas, Nicolas Vasilache, Ganesh Venkatesh, Jianping Xu
2013SCRAP: Architecture for signature-based protection from Code Reuse Attacks.
Mehmet Kayaalp, Timothy Schmitt, Junaid Nomani, Dmitry Ponomarev, Nael B. Abu-Ghazaleh
2013Scaling towards kilo-core processors with asymmetric high-radix topologies.
Nilmini Abeyratne, Reetuparna Das, Qingkun Li, Korey Sewell, Bharan Giridhar, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge
2013Skinflint DRAM system: Minimizing DRAM chip writes for low power.
Yebin Lee, Soontae Kim, Seokin Hong, Jongmin Lee
2013Sonic Millip3De: A massively parallel 3D-stacked accelerator for 3D ultrasound.
Richard Sampson, Ming Yang, Siyuan Wei, Chaitali Chakrabarti, Thomas F. Wenisch
2013Store-Load-Branch (SLB) predictor: A compiler assisted branch prediction for data dependent branches.
Muhammad Umar Farooq, Khubaib, Lizy K. John
2013TS-Router: On maximizing the Quality-of-Allocation in the On-Chip Network.
Yuan-Ying Chang, Yoshi Shih-Chieh Huang, Matthew Poremba, Vijaykrishnan Narayanan, Yuan Xie, Chung-Ta King
2013Technology comparison for large last-level caches (L
Mu-Tien Chang, Paul Rosenfeld, Shih-Lien Lu, Bruce L. Jacob
2013The dual-path execution model for efficient GPU control flow.
Minsoo Rhu, Mattan Erez
2013Tiered-latency DRAM: A low latency and low cost DRAM architecture.
Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu
2013Two level bulk preload branch prediction.
James Bonanno, Adam Collura, Daniel Lipetz, Ulrich Mayer, Brian R. Prasky, Anthony Saporito
2013Warped register file: A power efficient register file for GPGPUs.
Mohammad Abdel-Majeed, Murali Annavaram
2013Worm-Bubble Flow Control.
Lizhong Chen, Timothy Mark Pinkston
2013i
Jue Wang, Xiangyu Dong, Yuan Xie, Norman P. Jouppi