HPCA A*

49 papers

YearTitle / Authors
201117th International Conference on High-Performance Computer Architecture (HPCA-17 2011), February 12-16 2011, San Antonio, Texas, USA
2011A case for guarded power gating for multi-core processors.
Niti Madan, Alper Buyuktosunoglu, Pradip Bose, Murali Annavaram
2011A new server I/O architecture for high speed networks.
Guangdeng Liao, Xia Zhu, Laxmi N. Bhuyan
2011A quantitative performance analysis model for GPU architectures.
Yao Zhang, John D. Owens
2011ACCESS: Smart scheduling for asymmetric cache CMPs.
Xiaowei Jiang, Asit K. Mishra, Li Zhao, Ravishankar R. Iyer, Zhen Fang, Sadagopan Srinivasan, Srihari Makineni, Paul Brett, Chita R. Das
2011Abstraction and microarchitecture scaling in early-stage power modeling.
Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose, Emrah Acar, Richard J. Eickemeyer
2011Achieving uniform performance and maximizing throughput in the presence of heterogeneity.
Krishna K. Rangan, Michael D. Powell, Gu-Yeon Wei, David M. Brooks
2011Addressing system-level trimming issues in on-chip nanophotonic networks.
Christopher Nitta, Matthew K. Farrens, Venkatesh Akella
2011Archipelago: A polymorphic cache design for enabling robust near-threshold operation.
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke
2011Architectural framework for supporting operating system survivability.
Xiaowei Jiang, Yan Solihin
2011Atomic Coherence: Leveraging nanophotonics to build race-free cache coherence protocols.
Dana Vantrease, Mikko H. Lipasti, Nathan L. Binkert
2011Beyond block I/O: Rethinking traditional storage primitives.
Xiangyong Ouyang, David W. Nellans, Robert Wipfel, David Flynn, Dhabaleswar K. Panda
2011Bloom Filter Guided Transaction Scheduling.
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge
2011CHIPPER: A low-complexity bufferless deflection router.
Chris Fallin, Chris Craik, Onur Mutlu
2011Calvin: Deterministic or not? Free will to choose.
Derek Hower, Polina Dudnik, Mark D. Hill, David A. Wood
2011Checked Load: Architectural support for JavaScript type-checking on mobile processors.
Owen Anderson, Emily Fortuna, Luis Ceze, Susan J. Eggers
2011CloudCache: Expanding and shrinking private caches.
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
2011Cuckoo directory: A scalable directory for many-core systems.
Michael Ferdman, Pejman Lotfi-Kamran, Ken Balet, Babak Falsafi
2011Data-triggered threads: Eliminating redundant computation.
Hung-Wei Tseng, Dean M. Tullsen
2011Dynamic parallelization of JavaScript applications using an ultra-lightweight speculation mechanism.
Mojtaba Mehrara, Po-Chun Hsu, Mehrzad Samadi, Scott A. Mahlke
2011Dynamically Specialized Datapaths for energy efficient computing.
Venkatraman Govindaraju, Chen-Han Ho, Karthikeyan Sankaralingam
2011Efficient complex operators for irregular codes.
Jack Sampson, Ganesh Venkatesh, Nathan Goulding-Hotta, Saturnino Garcia, Steven Swanson, Michael Bedford Taylor
2011Efficient data streaming with on-chip accelerators: Opportunities and challenges.
Rui Hou, Lixin Zhang, Michael C. Huang, Kun Wang, Hubertus Franke, Yi Ge, Xiaotao Chang
2011Essential roles of exploiting internal parallelism of flash memory based solid state drives in high-speed data processing.
Feng Chen, Rubao Lee, Xiaodong Zhang
2011Exploiting criticality to reduce bottlenecks in distributed uniprocessors.
Behnam Robatmili, Madhu Saravana Sibi Govindan, Doug Burger, Stephen W. Keckler
2011FREE-p: Protecting non-volatile memory against both hard and soft errors.
Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan, Norman P. Jouppi, Mattan Erez
2011Fast thread migration via cache working set prediction.
Jeffery A. Brown, Leo Porter, Dean M. Tullsen
2011Fg-STP: Fine-Grain Single Thread Partitioning on Multicores.
Rakesh Ranjan, Fernando Latorre, Pedro Marcuello, Antonio González
2011HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor.
Sanghoon Lee, Devesh Tiwari, Yan Solihin, James Tuck
2011HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing.
Michael Pellauer, Michael Adler, Michel A. Kinsy, Angshuman Parashar, Joel S. Emer
2011Hardware/software techniques for DRAM thermal management.
Song Liu, Brian Leung, Alexander Neckar, Seda Ogrenci Memik, Gokhan Memik, Nikos Hardavellas
2011Hardware/software-based diagnosis of load-store queues using expandable activity logs.
Javier Carretero, Xavier Vera, Jaume Abella, Tanausú Ramírez, Matteo Monchiero, Antonio González
2011How's the parallel computing revolution going?
Kathryn S. McKinley
2011I-CASH: Intelligently Coupled Array of SSD and HDD.
Qing Yang, Jin Ren
2011Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors.
Hamid Reza Ghasemi, Stark C. Draper, Nam Sung Kim
2011MOPED: Orchestrating interprocess message data on CMPs.
Junli Gu, Steven S. Lumetta, Rakesh Kumar, Yihe Sun
2011Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system.
Madhura Joshi, Wangyuan Zhang, Tao Li
2011MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy.
Shekhar Srikantaiah, Emre Kultursay, Tao Zhang, Mahmut T. Kandemir, Mary Jane Irwin, Yuan Xie
2011NUcache: An efficient multicore cache organization based on Next-Use distance.
R. Manikantan, Kaushik Rajan, R. Govindarajan
2011Offline symbolic analysis to infer Total Store Order.
Dongyoon Lee, Mahmoud Said, Satish Narayanasamy, Zijiang Yang
2011Power shifting in Thrifty Interconnection Network.
Jian Li, Wei Huang, Charles Lefurgy, Lixin Zhang, Wolfgang E. Denzel, Richard R. Treumann, Kun Wang
2011Practical and secure PCM systems by online detection of malicious write streams.
Moinuddin K. Qureshi, André Seznec, Luis A. Lastras, Michele Franceschini
2011Programming the cloud.
James R. Larus
2011Relaxing non-volatility for fast and energy-efficient STT-RAM caches.
Clinton Wills Smullen IV, Vidyabhushan Mohan, Anurag Nigam, Sudhanva Gurumurthi, Mircea R. Stan
2011Safe and efficient supervised memory systems.
Jayaram Bobba, Marc Lupon, Mark D. Hill, David A. Wood
2011Shared last-level TLBs for chip multiprocessors.
Abhishek Bhattacharjee, Daniel Lustig, Margaret Martonosi
2011SolarCore: Solar energy driven multi-core architecture power management.
Chao Li, Wangyuan Zhang, Chang-Burm Cho, Tao Li
2011Storage free confidence estimation for the TAGE branch predictor.
André Seznec
2011Thread block compaction for efficient SIMT control flow.
Wilson W. L. Fung, Tor M. Aamodt