HPCA A*

40 papers

YearTitle / Authors
201016th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 9-14 January 2010, Bangalore, India
Matthew T. Jacob, Chita R. Das, Pradip Bose
2010A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement.
Guangyu Sun, Yongsoo Joo, Yibo Chen, Dimin Niu, Yuan Xie, Yiran Chen, Hai Li
2010A bandwidth-aware memory-subsystem resource management using non-invasive resource profilers for large CMP systems.
Dimitris Kaseridis, Jeffrey Stuecheli, Jian Chen, Lizy Kurian John
2010ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers.
Yoongu Kim, Dongsu Han, Onur Mutlu, Mor Harchol-Balter
2010An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth.
Dong Hyuk Woo, Nak Hee Seong, Dean L. Lewis, Hsien-Hsin S. Lee
2010Application performance modeling in a virtualized environment.
Sajib Kundu, Raju Rangaswami, Kaushik Dutta, Ming Zhao
2010Architecting for power management: The IBM POWER7
Malcolm S. Ware, Karthick Rajamani, Michael S. Floyd, Bishop Brock, Juan C. Rubio, Freeman L. Rawson III, John B. Carter
2010BOLT: Energy-efficient Out-of-Order Latency-Tolerant execution.
Andrew D. Hilton, Amir Roth
2010CHOP: Adaptive filter-based DRAM caching for CMP server platforms.
Xiaowei Jiang, Niti Madan, Li Zhao, Mike Upton, Ravishankar R. Iyer, Srihari Makineni, Donald Newell, Yan Solihin, Rajeev Balasubramonian
2010COMIC++: A software SVM system for heterogeneous multicore accelerator clusters.
Jaejin Lee, Jun Lee, Sangmin Seo, Jungwon Kim, Seungkyun Kim, Zehra Sura
2010DMA cache: Using on-chip storage to architecturally separate I/O data from CPU data for improving I/O performance.
Dan Tang, Yungang Bao, Weiwu Hu, Mingyu Chen
2010DMA++: on the fly data realignment for on-chip memories.
Nikola Vujic, Marc González, Felipe Cabarcas, Alex Ramírez, Xavier Martorell, Eduard Ayguadé
2010Delay-Hiding energy management mechanisms for DRAM.
Mingsong Bi, Ran Duan, Chris Gniady
2010Designing a processor from the ground up to allow voltage/reliability tradeoffs.
Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori
2010ESP-NUCA: A low-cost adaptive Non-Uniform Cache Architecture.
Javier Merino, Valentin Puente, José-Ángel Gregorio
2010Exascale computing: The challenges and opportunities in the next decade.
Tilak Agerwala
2010Explaining cache SER anomaly using DUE AVF measurement.
Arijit Biswas, Charles Recchia, Shubhendu S. Mukherjee, Vinod Ambrose, Leo Chan, Aamer Jaleel, Athanasios E. Papathanasiou, Mike Plaster, Norbert Seifert
2010Extreme scale computing: Challenges and opportunities.
Josep Torrellas, Bill Gropp, Vivek Sarkar, Jaime H. Moreno, Kunle Olukotun
2010FlexiShare: Channel sharing for an energy-efficient nanophotonic crossbar.
Yan Pan, John Kim, Gokhan Memik
2010Graphite: A distributed parallel simulator for multicores.
Jason E. Miller, Harshad Kasture, George Kurian, Charles Gruenwald III, Nathan Beckmann, Christopher Celio, Jonathan Eastep, Anant Agarwal
2010HARE: Hardware assisted reverse execution.
Ioannis Doudalis, Milos Prvulovic
2010Handling branches in TLS systems with Multi-Path Execution.
Polychronis Xekalakis, Marcelo Cintra
2010High performance network virtualization with SR-IOV.
Yaozu Dong, Xiaowei Yang, Xiaoyong Li, Jianhui Li, Kun Tian, Haibing Guan
2010High-Performance low-vcc in-order core.
Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González
2010IADVS: On-demand performance for interactive applications.
Mingsong Bi, Igor Crk, Chris Gniady
2010Improving read performance of Phase Change Memories via Write Cancellation and Write Pausing.
Moinuddin K. Qureshi, Michele Franceschini, Luis Alfonso Lastras-Montaño
2010Interval simulation: Raising the level of abstraction in architectural simulation.
Davy Genbrugge, Stijn Eyerman, Lieven Eeckhout
2010Is hardware innovation over?
Arvind
2010LeadOut: Composing low-overhead frequency-enhancing techniques for single-thread performance in configurable multicores.
Brian Greskamp, Ulya R. Karpuzcu, Josep Torrellas
2010LiteTM: Reducing transactional state overhead.
Syed Ali Raza Jafri, Mithuna Thottethodi, T. N. Vijaykumar
2010Operating system support for overlapping-ISA heterogeneous multi-core architectures.
Tong Li, Paul Brett, Rob C. Knauerhase, David A. Koufaty, Dheeraj Reddy, Scott Hahn
2010SIF: Overcoming the limitations of SIMD devices via implicit permutation.
Libo Huang, Li Shen, Zhiying Wang, Wei Shi, Nong Xiao, Sheng Ma
2010Scalable architectural support for trusted software.
David Champagne, Ruby B. Lee
2010Simple virtual channel allocation for high throughput and high frequency on-chip routers.
Yi Xu, Bo Zhao, Youtao Zhang, Jun Yang
2010StimulusCache: Boosting performance of chip multiprocessors with excess cache.
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
2010Towards scalable, energy-efficient, bus-based on-chip networks.
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian
2010UNified Instruction/Translation/Data (UNITD) coherence: One protocol to rule them all.
Bogdan F. Romanescu, Alvin R. Lebeck, Daniel J. Sorin, Anne Bracy
2010Understanding how off-chip memory bandwidth partitioning in Chip Multiprocessors affects system performance.
Fang Liu, Xiaowei Jiang, Yan Solihin
2010Value Based BTB Indexing for indirect jump prediction.
Muhammad Umar Farooq, Lei Chen, Lizy Kurian John
2010Worth their watts? - an empirical study of datacenter servers.
Arunchandar Vasan, Anand Sivasubramaniam, Vikrant Shimpi, T. Sivabalan, Rajesh Subbiah