| 2009 | 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 14-18 February 2009, Raleigh, North Carolina, USA |
| 2009 | A first-order fine-grained multithreaded throughput model. Xi E. Chen, Tor M. Aamodt |
| 2009 | A low-radix and low-diameter 3D interconnection network design. Yi Xu, Yu Du, Bo Zhao, Xiuyi Zhou, Youtao Zhang, Jun Yang |
| 2009 | A novel architecture of the 3D stacked MRAM L2 cache for CMPs. Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yiran Chen |
| 2009 | Accurate microarchitecture-level fault modeling for studying hardware faults. Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu, Siva Kumar Sastry Hari, Sarita V. Adve |
| 2009 | Adaptive Spill-Receive for robust high-performance caching in CMPs. Moinuddin K. Qureshi |
| 2009 | An intelligent IT infrastructure for the future. Prith Banerjee |
| 2009 | Architectural Contesting. Hashem Hashemi Najaf-abadi, Eric Rotenberg |
| 2009 | Blueshift: Designing processors for timing speculation from the ground up. Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey J. Cook, Josep Torrellas, Deming Chen, Craig B. Zilles |
| 2009 | Bridging the computation gap between programmable processors and hardwired accelerators. Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Scott A. Mahlke |
| 2009 | CAMP: A technique to estimate per-structure power at run-time using a few simple parameters. Michael D. Powell, Arijit Biswas, Joel S. Emer, Shubhendu S. Mukherjee, Basit Riaz Sheikh, Shrirang M. Yardi |
| 2009 | Characterization of Direct Cache Access on multi-core systems and 10GbE. Amit Kumar, Ram Huggahalli, Srihari Makineni |
| 2009 | Criticality-based optimizations for efficient load processing. Samantika Subramaniam, Anne Bracy, Hong Wang, Gabriel H. Loh |
| 2009 | Dacota: Post-silicon validation of the memory subsystem in multi-core designs. Andrew DeOrio, Ilya Wagner, Valeria Bertacco |
| 2009 | Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs. Reetuparna Das, Soumya Eachempati, Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. Das |
| 2009 | Design and implementation of software-managed caches for multicores with local memory. Sangmin Seo, Jaejin Lee, Zehra Sura |
| 2009 | Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches. Manu Awasthi, Kshitij Sudan, Rajeev Balasubramonian, John B. Carter |
| 2009 | Elastic-buffer flow control for on-chip networks. George Michelogiannakis, James D. Balfour, William J. Dally |
| 2009 | Eliminating microarchitectural dependency from Architectural Vulnerability. Vilas Sridharan, David R. Kaeli |
| 2009 | Express Cube Topologies for on-Chip Interconnects. Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu |
| 2009 | Fast complete memory consistency verification. Yunji Chen, Yi Lv, Weiwu Hu, Tianshi Chen, Haihua Shen, Pengyu Wang, Hong Pan |
| 2009 | Feedback mechanisms for improving probabilistic memory prefetching. Ibrahim Hur, Calvin Lin |
| 2009 | Hardware-software integrated approaches to defend against software cache-based side channel attacks. Jingfei Kong, Onur Aciiçmez, Jean-Pierre Seifert, Huiyang Zhou |
| 2009 | In-Network Snoop Ordering (INSO): Snoopy coherence on unordered interconnects. Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha |
| 2009 | Industrial perspectives panel. Parthasarathy Ranganathan |
| 2009 | Lightweight predication support for out of order processors. Mark Stephenson, Lixin Zhang, Ram Rangan |
| 2009 | MRR: Enabling fully adaptive multicast routing for CMP interconnection networks. Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio |
| 2009 | Multi-core demands multi-interfaces. Yale N. Patt |
| 2009 | Opportunities beyond single-core microprocessors. Mark D. Hill |
| 2009 | Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy. Niti Madan, Li Zhao, Naveen Muralimanohar, Aniruddha N. Udipi, Rajeev Balasubramonian, Ravishankar R. Iyer, Srihari Makineni, Donald Newell |
| 2009 | PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches. Mainak Chaudhuri |
| 2009 | Practical off-chip meta-data for temporal memory streaming. Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos |
| 2009 | Prediction router: Yet another low latency on-chip router architecture. Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Tsutomu Yoshinaga |
| 2009 | Reconciling specialization and flexibility through compound circuits. Sami Yehia, Sylvain Girbal, Hugues Berry, Olivier Temam |
| 2009 | Soft error vulnerability aware process variation mitigation. Xin Fu, Tao Li, José A. B. Fortes |
| 2009 | Techniques for bandwidth-efficient prefetching of linked data structures in hybrid prefetching systems. Eiman Ebrahimi, Onur Mutlu, Yale N. Patt |
| 2009 | Variation-aware dynamic voltage/frequency scaling. Sebastian Herbert, Diana Marculescu |
| 2009 | Versatile prediction and fast estimation of Architectural Vulnerability Factor from processor performance metrics. Lide Duan, Bin Li, Lu Peng |
| 2009 | Voltage emergency prediction: Using signatures to reduce operating margins. Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. Holloway, Gu-Yeon Wei, Michael D. Smith, David M. Brooks |
| 2009 | iCFP: Tolerating all-level cache misses in in-order processors. Andrew D. Hilton, Santosh Nagarakatte, Amir Roth |