HPCA A*

36 papers

YearTitle / Authors
2000A DSM Architecture for a Parallel Computer Cenju-4.
Takeo Hosomi, Yasushi Kanoh, Masaaki Nakamura, Tetsuya Hirose
2000A Prefetching Technique for Irregular Accesses to Linked Data Structures.
Magnus Karlsson, Fredrik Dahlgren, Per Stenström
2000A Technique for High Bandwidth and Deterministic Low Latency Load/Store Accesses to Multiple Cache Banks.
Henk Neefs, Hans Vandierendonck, Koenraad De Bosschere
2000Architectural Issues in Java Runtime Systems.
Ramesh Radhakrishnan, Narayanan Vijaykrishnan, Lizy Kurian John, Anand Sivasubramaniam
2000Branch Transition Rate: A New Metric for Improved Branch Classification Analysis.
Michael Haungs, Phil Sallee, Matthew K. Farrens
2000Cache Memory Design for Network Processors.
Tzi-cker Chiueh, Prashant Pradhan
2000Cache-Efficient Matrix Transposition.
Siddhartha Chatterjee, Sandeep Sen
2000Coherence Communication Prediction in Shared-Memory Multiprocessors.
Stefanos Kaxiras, Cliff Young
2000Combining Static and Dynamic Branch Prediction to Reduce Destructive Aliasing.
Harish Patil, Joel S. Emer
2000Decoupled Value Prediction on Trace Processors.
Sang Jeong Lee, Yuan Wang, Pen-Chung Yew
2000Design of a Parallel Vector Access Unit for SDRAM Memory Systems.
Binu K. Mathew, Sally A. McKee, John B. Carter, Al Davis
2000Dynamic Cluster Assignment Mechanisms.
Ramon Canal, Joan-Manuel Parcerisa, Antonio González
2000Evaluation of Active Disks for Decision Support Databases.
Mustafa Uysal, Anurag Acharya, Joel H. Saltz
2000Flit-Reservation Flow Control.
Li-Shiuan Peh, William J. Dally
2000High-Throughput Coherence Controllers.
Ashwini K. Nanda, Anthony-Trung Nguyen, Maged M. Michael, Douglas J. Joseph
2000Impact of Chip-Level Integration on Performance of OLTP Workloads.
Luiz André Barroso, Kourosh Gharachorloo, Andreas Nowatzyk, Ben Verghese
2000Impact of Heterogeneity on DSM Performance.
Renato J. O. Figueiredo, José A. B. Fortes
2000Improving the Throughput of Synchronization by Insertion of Delays.
Ravi Rajwar, Alain Kägi, James R. Goodman
2000Investigating QoS Support for Traffic Mixes with the MediaWorm Router.
Ki Hwan Yum, Aniruddha S. Vaidya, Chita R. Das, Anand Sivasubramaniam
2000Investigating the Performance of Two Programming Models for Clusters of SMP PCs.
Franck Cappello, Olivier Richard, Daniel Etiemble
2000Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors.
Andreas Moshovos, Gurindar S. Sohi
2000Modified LRU Policies for Improving Second-Level Cache Behavior.
Wayne A. Wong, Jean-Loup Baer
2000On the Performance of Hand vs. Automatically Optimized Numerical Codes.
Marta Jiménez, José M. Llabería, Agustín Fernández
2000Performance Analysis and Visualization of Parallel Systems Using SimOS and Rivet: A Case Study.
Robert P. Bosch Jr., Chris Stolte, Gordon Stoll, Mendel Rosenblum, Pat Hanrahan
2000Performance Evaluation of Dynamic Reconfiguration in High-Speed Local Area Networks.
Rafael Casado, Aurelio Bermúdez, Francisco J. Quiles, José L. Sánchez, José Duato
2000PowerMANNA: A Parallel Architecture Based on the PowerPC MPC620.
Peter M. Behr, S. Pletner, Angela C. Sodan
2000Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, Toulouse, France, January 8-12, 2000
2000Quantifying the SMT Layout Overhead-Does SMT Pull Its Weight?
James Burns, Jean-Luc Gaudiot
2000Reducing Code Size with Run-Time Decompression.
Charles Lefurgy, Eva Piccininni, Trevor N. Mudge
2000Register Organization for Media Processing.
Scott Rixner, William J. Dally, Brucek Khailany, Peter R. Mattson, Ujval J. Kapasi, John D. Owens
2000Software-Controlled Multithreading Using Informing Memory Operations.
Todd C. Mowry, Sherwyn R. Ramkissoon
2000The Best Distribution for a Parallel OpenGL 3D Engine with Texture Caches.
Alexis Vartanian, Jean-Luc Béchennec, Nathalie Drach-Temam
2000The Effect of Network Total Order, Broadcast, and Remote-Write Capability on Network-Based Shared Memory Computing.
Robert Stets, Sandhya Dwarkadas, Leonidas I. Kontothanassis, Umit Rencuzogullari, Michael L. Scott
2000Toward a Cost-Effective DSM Organization That Exploits Processor-Memory Integration.
Josep Torrellas, Liuxi Yang, Anthony-Trung Nguyen
2000Trace Cache Redundancy: Red & Blue Traces.
Alex Ramírez, Josep Lluís Larriba-Pey, Mateo Valero
2000eXtended Block Cache.
Stéphan Jourdan, Lihu Rappoport, Yoav Almog, Mattan Erez, Adi Yoaz, Ronny Ronen