HPCA A*

32 papers

YearTitle / Authors
1998A Very Efficient Distributed Deadlock Detection Mechanism for Wormhole Networks.
Pedro López, Juan-Miguel Martínez, José Duato
1998Address Translation Mechanisms In Network Interfaces.
Ioannis Schoinas, Mark D. Hill
1998Architectural Implications of a Family of Irregular Applications.
David R. O'Hallaron, Jonathan Richard Shewchuk, Thomas R. Gross
1998Challenging Applications on Fast Networks.
Koen Langendoen, Rutger F. H. Hofman, Henri E. Bal
1998Communication Across Fault-Containment Firewalls on the SGI Origin.
Kaushik Ghosh, Allan J. Christie
1998Comparative Evaluation of Latency Tolerance Techniques for Software Distributed Shared Memory.
Todd C. Mowry, Charles Q. C. Chan, Adley K. W. Lo
1998Control Speculation in Multithreaded Processors through Dynamic Loop Detection.
Jordi Tubella, Antonio González
1998Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch.
Manolis Katevenis, Dimitrios N. Serpanos, Emmanuel Spyridakis
1998Efficiently Adapting to Sharing Patterns in Software DSMs.
Luiz Rodolpho Monnerat, Ricardo Bianchini
1998Enhancing Memory Use in Simple Coma: Multiplexed Simple Coma.
Sujoy Basu, Josep Torrellas
1998Exploiting Two-Case Delivery for Fast Protected Messaging.
Kenneth MacKenzie, John Kubiatowicz, Matthew I. Frank, Walter Lee, Victor Lee, Anant Agarwal, M. Frans Kaashoek
1998FPGA Based Custom Computing Machines for Irregular Problems.
David Abramson, Paul Logothetis, Adam Postula, Marcus Randall
1998Fine-Grain Software Distributed Shared Memory on SMP Clusters.
Daniel J. Scales, Kourosh Gharachorloo, Anshu Aggarwal
1998Hardware for Speculative Run-Time Parallelization in Distributed Shared-Memory Multiprocessors.
Ye Zhang, Lawrence Rauchwerger, Josep Torrellas
1998Home-Based SVM Protocols for SMP Clusters: Design and Performance.
Rudrajit Samanta, Angelos Bilas, Liviu Iftode, Jaswinder Pal Singh
1998Non-Stalling CounterFlow Architecture.
Michael F. Miller, Kenneth J. Janik, Shih-Lien Lu
1998PRISM: An Integrated Architecture for Scalable Shared Memory.
Kattamuri Ekanadham, Beng-Hong Lim, Pratap Pattnaik, Marc Snir
1998Partial Sampling with Reverse State Reconstruction: A New Technique for Branch Predictor Performance Estimation.
Darren Erik Vengroff, Guang R. Gao
1998Performance Evaluation of Tiling for the Register Level.
Marta Jiménez, José M. Llabería, Agustín Fernández
1998Performance Study of a Concurrent Multithreaded Processor.
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chung Yew
1998Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, Las Vegas, Nevada, USA, January 31 - February 4, 1998
1998Speculative Versioning Cache.
Sridhar Gopal, T. N. Vijaykumar, James E. Smith, Gurindar S. Sohi
1998Supporting Highly-Speculative Execution via Adaptive Branch Trees.
Tien-Fu Chen
1998Temporal-Based Procedure Reordering for Improved Instruction Cache Performance.
John Kalamatianos, David R. Kaeli
1998The Architectural Costs of Streaming I/O: A Comparison of Workstations, Clusters, and SMPs.
Remzi H. Arpaci-Dusseau, Andrea C. Arpaci-Dusseau, David E. Culler, Joseph M. Hellerstein, David A. Patterson
1998The Effectiveness of SRAM Network Caches in Clustered DSMs.
Adrian Moga, Michel Dubois
1998The Impact of Data Transfer and Buffering Alternatives on Network Interface Design.
Shubhendu S. Mukherjee, Mark D. Hill
1998The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization.
J. Gregory Steffan, Todd C. Mowry
1998The Sensitivity of Communication Mechanisms to Bandwidth and Latency.
Frederic T. Chong, Rajeev Barua, Fredrik Dahlgren, John Kubiatowicz, Anant Agarwal
1998Treegion Scheduling for Wide Issue Processors.
William A. Havanki, Sanjeev Banerjia, Thomas M. Conte
1998Using Multicast and Multithreading to Reduce Communication in Software DSM Systems.
Evan Speight, John K. Bennett
1998Virtual-Physical Registers.
Antonio González, José González, Mateo Valero