HPCA A*

30 papers

YearTitle / Authors
1996A Cache Coherency Protocol for Optically Connected Parallel Computer Systems.
John A. Reisner, Tom S. Wailes
1996A Comparison of Entry Consistency and Lazy Release Consistency Implementations.
Sarita V. Adve, Alan L. Cox, Sandhya Dwarkadas, Ramakrishnan Rajamony, Willy Zwaenepoel
1996A Shared-Bus Control Mechanism and a Cache Coherence Protocol for a High-Performance On-Chip Multiprocessor.
Masafumi Takahashi, Hiroyuki Takano, Emi Kaneko, Seigo Suzuki
1996A Topology-Independent Generic Methodology for Deadlock-Free Wormhole Routing.
Hyunmin Park, Dharma P. Agrawal
1996Bus-Based COMA - Reducing Traffic in Shared-Bus Multiprocessors.
Anders Landin, Fredrik Dahlgren
1996Co-Scheduling Hardware and Software Pipelines.
Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao
1996Decoupled Vector Architectures.
Roger Espasa, Mateo Valero
1996Distance-Adaptive Update Protocols for Scalable Shared-Memory Multiprocessors.
Alain Raynaud, Zheng Zhang, Josep Torrellas
1996Distributed Prefetch-buffer/Cache Design for High-Performance Memory Systems.
Thomas Alexander, Gershon Kedem
1996Fault-Tolerance with Multimodule Routers.
Suresh Chalasani, Rajendra V. Boppana
1996Fault-Tolerant Multicast Routing in the Mesh with No Virtual Channels.
Ran Libeskind-Hadas, Kevin Watkins, Thomas Hehre
1996Improving Release-Consistent Shared Virtual Memory Using Automatic Update.
Liviu Iftode, Cezary Dubnicki, Edward W. Felten, Kai Li
1996Improving the Data Cache Performance of Multiprocessor Operating Systems.
Chun Xia, Josep Torrellas
1996Multitasking and Multithreading on a Multiprocessor with Virtual Shared Memory.
Henk L. Muller, Paul W. A. Stallard, David H. D. Warren
1996On the Multiplexing Degree Required to Embed Permutations in a Class of Networks with Direct Interconnects.
Chunming Qiao, Yousong Mei
1996Parallel Intersecting Compressed Bit Vectors in a High Speed Query Server for Processing Postal Addresses.
Wen-jann Yang, Ramalingam Sridhar, Victor Demjanenko
1996Performance Characterization of the Alpha 21164 Microprocessor Using TP and SPEC Workloads.
Zarka Cvetanovic, Dileep Bhandarkar
1996Performance Evaluation of a Cluster-Based Multiprocessor Built from ATM Switches and Bus-Based Multiprocessor Servers.
Magnus Karlsson, Per Stenström
1996Performance Study of a Multithreaded Superscalar Microprocessor.
Manu Gulati, Nader Bagherzadeh
1996Predictive Sequential Associative Cache.
Brad Calder, Dirk Grunwald, Joel S. Emer
1996Proceedings of the Second International Symposium on High-Performance Computer Architecture, San Jose, CA, USA, February 3-7, 1996
1996Protected, User-Level DMA for the SHRIMP Network Interface.
Matthias A. Blumrich, Cezary Dubnicki, Edward W. Felten, Kai Li
1996RMB - A Reconfigurable Multiple Bus Network.
Hossam A. ElGindy, Arun K. Somani, Heiko Schröder, Hartmut Schmeck, Andrew Spray
1996Register File Design Considerations in Dynamically Scheduled Processors.
Keith I. Farkas, Norman P. Jouppi, Paul Chow
1996Representative Traces for Processor Models with Infinite Cache.
Vijay S. Iyengar, Louise Trevillyan, Pradip Bose
1996Shuffle-Ring: Overcoming the Increasing Degree of Hypercube.
Guihai Chen, Francis C. M. Lau
1996Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters.
Evangelos P. Markatos, Manolis Katevenis
1996The Impact of Shared-Cache Clustering in Small-Scale Shared-Memory Multiprocessors.
Basem A. Nayfeh, Kunle Olukotun, Jaswinder Pal Singh
1996Two Adaptive Hybrid Cache Coherency Protocols.
Craig Anderson, Anna R. Karlin
1996Using Memory-Mapped Network Interfaces to Improve the Performance of Distributed Shared Memory.
Leonidas I. Kontothanassis, Michael L. Scott