| 1995 | A Design Frame for Hybrid Access Caches. Kevin B. Theobald, Herbert H. J. Hum, Guang R. Gao |
| 1995 | A VLSI Architecture for Computer the Tree-to-Tree Distance. Raghu Sastry, N. Ranganathan |
| 1995 | Abstracting Network Characteristics and Locality Properties of Parallel Systems. Anand Sivasubramaniam, Aman Singla, Umakishore Ramachandran, H. Venkateswaran |
| 1995 | Access Ordering and Memory-Conscious Cache Utilization. Sally A. McKee, William A. Wulf |
| 1995 | An Argument for Simple COMA. Ashley Saulsbury, Tim Wilkinson, John B. Carter, Anders Landin |
| 1995 | An Initial Evaluation of the Convex SPP-1000 for Earth and Space Science Application. Thomas L. Sterling, Daniel Savarese, Phillip Merkey, Jeffrey P. Gardner |
| 1995 | Architectural Support for Inter-Stream Communication in a MSIMD System. Vivek Garg, David E. Schimmel |
| 1995 | Creating a Wider Bus Using Caching Techniques. Daniel Citron, Larry Rudolph |
| 1995 | DASC Cache. André Seznec |
| 1995 | Design and Performance Evaluation of a Multithreaded Architecture. Ramaswamy Govindarajan, Shashank S. Nemawarkar, Philip LeNir |
| 1995 | Effectiveness of Hardware-Based Stride and Sequential Prefetching in Shared-Memory Multiprocessors. Fredrik Dahlgren, Per Stenström |
| 1995 | Efficient and Balanced Adaptive Routing in Two-Dimensional Meshes. Jatin Upadhyay, Vara Varavithya, Prasant Mohapatra |
| 1995 | Fast Barrier Synchronization in Wormhole k-ary n-cube Networks with Multidestination Worms. Dhabaleswar K. Panda |
| 1995 | Fault-Tolerant Adaptive Routing for Two-Dimensional Meshes. Chris M. Cunningham, Dimiter R. Avresky |
| 1995 | Fine-Grain Multi-Thread Processor Architecture for Massively Parallel Processing. Tetsuo Kawano, Shigeru Kusakabe, Rin-Ichiro Taniguchi, Makoto Amamiya |
| 1995 | How Useful Are Non-Blocking Loads, Stream Buffers and Speculative Execution in Multiple Issue Processors? Keith I. Farkas, Norman P. Jouppi, Paul Chow |
| 1995 | Implementation of Atomic Primitives on Distributed Shared Memory Multiprocessors. Maged M. Michael, Michael L. Scott |
| 1995 | Implementing Register Interlocks in Parallel-Pipeline Multiple Instruction Queue, Superscalar Processors. Shlomo Weiss |
| 1995 | Improving Performance by Cache Driven Memory Management. Karl Westerholz, Stephen Honal, Josef Plankl, Christian Hafer |
| 1995 | Massively Parallel Array Processor for Logic, Fault, and Design Error Simulation. Youngmin Hur, Stephen A. Szygenda, E. Scott Fehr, Granville E. Ott, Sungho Kang |
| 1995 | Memory Access Reordering in Vector Processors. De-Lei Lee |
| 1995 | Modeling Virtual Channel Flow Control in Hypercubes. Younes M. Boura, Chita R. Das |
| 1995 | Non-Consistent Dual Register Files to Reduce Register Pressure. Josep Llosa, Mateo Valero, Eduard Ayguadé |
| 1995 | Optimizing Instruction Cache Performance for Operating System Intensive Workloads. Josep Torrellas, Chun Xia, Russell L. Daigle |
| 1995 | Origin-Based Fault-Tolerant routing in the Mesh. Ran Libeskind-Hadas, Eli Brandt |
| 1995 | Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture (HPCA 1995), Raleigh, North Carolina, USA, January 22-25, 1995 |
| 1995 | Program Balance and Its Impact on High Performance RISC Architectures. Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee D. Coraor |
| 1995 | Reducing Communication Latency with Path Multiplexing in Optically Interconnected Multiprocessor Systems. Chunming Qiao, Rami G. Melhem |
| 1995 | Simulation Study of Cached RAID5 Designs. Kent Treiber, Jai Menon |
| 1995 | Software Assistance for Data Caches. Olivier Temam, Nathalie Drach |
| 1995 | Software Cache Coherence for Large Scale Multiprocessors. Leonidas I. Kontothanassis, Michael L. Scott |
| 1995 | The Effects of STEF in Finely Parallel Multithreaded Processors. Yamin Li, Wanming Chu |
| 1995 | The Named-State Register File: Implementation and Performance. Peter R. Nuth, William J. Dally |
| 1995 | Thread Prioritization: A Thread Scheduling Mechanism for Multiple-Context Parallel Processors. Stuart Fiske, William J. Dally |
| 1995 | Toward High Communication Performance through Compiled Communications on a Circuit Switched Interconnection Network. Franck Cappello, Cécile Germain |
| 1995 | Two Techniques for Improving Performance on Bus-Based Multiprocessors. Craig Anderson, Jean-Loup Baer |
| 1995 | U-Cache: A Cost-Effective Solution to the Synonym Problem. Jesung Kim, Sang Lyul Min, Sanghoon Jeon, Byoungchul Ahn, Deog-Kyoon Jeong, Chong-Sang Kim |