| 2016 | 26th International Conference on Field Programmable Logic and Applications, FPL 2016, Lausanne, Switzerland, August 29 - September 2, 2016 Paolo Ienne, Walid A. Najjar, Jason Helge Anderson, Philip Brisk, Walter Stechele |
| 2016 | A hardware/software codesign framework for vision-based ADAS. Leandro Andrade Martinez, Eduardo Marques |
| 2016 | A high performance FPGA-based accelerator for large-scale convolutional neural networks. Huimin Li, Xitian Fan, Li Jiao, Wei Cao, Xuegong Zhou, Lingli Wang |
| 2016 | A highly-dense mixed grained reconfigurable architecture with overlay crossbar interconnect using via-switch. Junshi Hotate, Takashi Kishimoto, Toshiki Higashi, Hiroyuki Ochi, Ryutaro Doi, Munehiro Tada, Tadahiko Sugibayashi, Kazutoshi Wakabayashi, Hidetoshi Onodera, Yukio Mitsuyama, Masanori Hashimoto |
| 2016 | A low-power MTJ-based nonvolatile FPGA using self-terminated logic-in-memory structure. Daisuke Suzuki, Takahiro Hanyu |
| 2016 | A partial reconfiguration controller for Altera Stratix V FPGAs. Zhenzhong Xiao, Dirk Koch, Mikel Luján |
| 2016 | A runtime reconfigurable FPGA-based microphone array for sound source localization. Bruno da Silva, Laurent Segers, An Braeken, Abdellah Touhafi |
| 2016 | A survey of AIS-20/31 compliant TRNG cores suitable for FPGA devices. Oto Petura, Ugo Mureddu, Nathalie Bochard, Viktor Fischer, Lilian Bossuet |
| 2016 | A survey on reconfigurable accelerators for cloud computing. Christoforos Kachris, Dimitrios Soudris |
| 2016 | Accelerating particle identification for high-speed data-filtering using OpenCL on FPGAs and other architectures. Srikanth Sridharan, Paolo Durante, Christian Faerber, Niko Neufeld |
| 2016 | Accelerating recurrent neural networks in analytics servers: Comparison of FPGA, CPU, GPU, and ASIC. Eriko Nurvitadhi, Jaewoong Sim, David Sheffield, Asit K. Mishra, Krishnan Srivatsan, Debbie Marr |
| 2016 | AdapNoC: A fast and flexible FPGA-based NoC simulator. Hadi Mardani Kamali, Shaahin Hessabi |
| 2016 | An FPGA-based high-throughput stream join architecture. Charalabos Kritikakis, Grigorios Chrysos, Apostolos Dollas, Dionisios N. Pnevmatikatos |
| 2016 | An XDL alternative for interfacing RapidSmith and Vivado. Thomas Townsend, Brent E. Nelson, Michael J. Wirthlin |
| 2016 | An evaluation on the accuracy of the minimum width transistor area models in ranking the layout area of FPGA architectures. Farheen Fatima Khan, Andy Gean Ye |
| 2016 | An implementation method of the box filter on FPGA. Sichao Wang, Tsutomu Maruyama |
| 2016 | An investigation into a circuit based supply chain analyzer for FPGAs. Jacob Couch, John Arkoian |
| 2016 | Annotation-based finite-state transducers on reconfigurable devices. Raphael Polig, Kubilay Atasu, Christoph Hagleitner, Theresa Xu, Akihiro Nakayama |
| 2016 | Approximate Frequent Itemset Mining for streaming data on FPGA. Yubin Li, Yuliang Sun, Guohao Dai, Qiang Xu, Yu Wang, Huazhong Yang |
| 2016 | Architectural exploration and implementation of an image processing chain with SpaceStudio Fellipe Montero, Guy Bois, Eric Jenn, Kevin Duplantier |
| 2016 | Automated bug detection for pointers and memory accesses in High-Level Synthesis compilers. Pietro Fezzardi, Fabrizio Ferrandi |
| 2016 | Automated extra pipeline analysis of applications mapped to Xilinx UltraScale+ FPGAs. Ilya Ganusov, Henri Fraisse, Aaron Ng, Rafael Trapani Possignolo, Sabya Das |
| 2016 | Bayesian inference implemented on FPGA with stochastic bitstreams for an autonomous robot. Hugo Fernandes, M. Awais Aslam, Jorge Lobo, João Filipe Ferreira, Jorge Dias |
| 2016 | Body bias grain size exploration for a coarse grained reconfigurable accelerator. Yusuke Matsushita, Hayate Okuhara, Koichiro Masuyama, Yu Fujita, Ryuta Kawano, Hideharu Amano |
| 2016 | Boosting convergence of timing closure using feature selection in a Learning-driven approach. Que Yanghua, Harnhua Ng, Nachiket Kapre |
| 2016 | Chaotic architectures for secure free-space optical communication. Esam El-Araby, Nader M. Namazi |
| 2016 | Configurable and scalable belief propagation accelerator for computer vision. Jungwook Choi, Rob A. Rutenbar |
| 2016 | Connect on the fly: Enhancing and prototyping of cycle-reconfigurable modules. Hao Zhou, Xinyu Niu, Junqi Yuan, Lingli Wang, Wayne Luk |
| 2016 | Controller architecture for low-latency access to phase-change memory in OpenPOWER systems. Antonios Prodromakis, Nikolaos Papandreou, Eleni Bougioukou, Urs Egger, Nikos Toulgaridis, Theodore Antonakopoulos, Haralampos Pozidis, Evangelos Eleftheriou |
| 2016 | DT-CGRA: Dual-track coarse-grained reconfigurable architecture for stream applications. Xitian Fan, Huimin Li, Wei Cao, Lingli Wang |
| 2016 | Demonstration of a context-switch method for heterogeneous reconfigurable systems. Arief Wicaksana, Alban Bourge, Olivier Muller, Frédéric Rousseau |
| 2016 | Designing a virtual runtime for FPGA accelerators in the cloud. Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne |
| 2016 | Dimensionality reduction of hyperspectral images using reconfigurable hardware. Daniel Fenzandez, Carlos González, Daniel Mozos |
| 2016 | EURECA compilation: Automatic optimisation of cycle-reconfigurable circuits. Xinyu Niu, Nicholas Ng, Tomofumi Yuki, Shaojun Wang, Nobuko Yoshida, Wayne Luk |
| 2016 | Effects of I/O routing through column interfaces in embedded FPGA fabrics. Christophe Huriaux, Olivier Sentieys, Russell Tessier |
| 2016 | Efficient and reliable High-Level Synthesis Design Space Explorer for FPGAs. Dong Liu, Benjamin Carrión Schäfer |
| 2016 | Efficient processing of phased array radar in sense and avoid application using heterogeneous computing. Luke Newmeyer, Doran Wilde, Brent E. Nelson, Michael J. Wirthlin |
| 2016 | Efficient sum of absolute difference computation on FPGAs. Martin Kumm, Marco Kleinlein, Peter Zipf |
| 2016 | Energy-efficient stochastic matrix function estimator for graph analytics on FPGA. Heiner Giefers, Peter W. J. Staar, Raphael Polig |
| 2016 | Exploring the use of shift register lookup tables for Keccak implementations on Xilinx FPGAs. Jori Winderickx, Joan Daemen, Nele Mentens |
| 2016 | FMER: A hybrid configuration memory error recovery scheme for highly reliable FPGA SoCs. Dimitris Agiakatsikas, Ediz Çetin, Oliver Diessel |
| 2016 | FPGA-based accelerator design from a domain-specific language. M. Akif Ozkan, Oliver Reiche, Frank Hannig, Jürgen Teich |
| 2016 | Fast and area efficient adder for wide data in recent Xilinx FPGAs. Petter Kallstrom, Oscar Gustafsson |
| 2016 | Fast and robust hashing for database operators. Kaan Kara, Gustavo Alonso |
| 2016 | Fast hierarchical NPN classification. Ana Petkovska, Mathias Soeken, Giovanni De Micheli, Paolo Ienne, Alan Mishchenko |
| 2016 | GraVF: A vertex-centric distributed graph processing framework on FPGAs. Nina Engelhardt, Hayden Kwok-Hay So |
| 2016 | Hardware acceleration of a software-based VPN. Furkan Turan, Ruan de Clercq, Pieter Maene, Oscar Reparaz, Ingrid Verbauwhede |
| 2016 | Hardware acceleration of feature detection and description algorithms on low-power embedded platforms. Onur Ulusel, Christopher B. Picardo, Christopher B. Harris, Sherief Reda, R. Iris Bahar |
| 2016 | Hardware-software codesign of RSA for optimal performance vs. flexibility trade-off. Malik Umar Sharif, Rabia Shahid, Kris Gaj, Marcin Rogawski |
| 2016 | Harnessing Programmable SoCs to develop cost-effective network quality monitoring devices. Mario Ruiz, Javier Ramos, Gustavo Sutter, Sergio López-Buedo, Jorge E. López de Vergara, C. Sisterna |
| 2016 | HeteroSim: A heterogeneous CPU-FPGA simulator. Liang Feng, Hao Liang, Sharad Sinha, Wei Zhang |
| 2016 | High-level synthesis for medical image processing on Systems on Chip: A case study. Fraser D. Robinson, Louise H. Crockett, William H. Nailon, Robert W. Stewart |
| 2016 | High-speed PCAP configuration scrubbing on Zynq-7000 All Programmable SoCs. Aaron Stoddard, Ammon Gruwell, Peter Zabriskie, Michael J. Wirthlin |
| 2016 | High-speed programmable FPGA Configuration through JTAG. Ammon Gruwell, Peter Zabriskie, Michael J. Wirthlin |
| 2016 | Hoplite-DSP: Harnessing the Xilinx DSP48 multiplexers to efficiently support NoCs on FPGAs. Kumar H. B. Chethan, Nachiket Kapre |
| 2016 | Improved resource sharing for FPGA DSP blocks. Bajaj Ronak, Suhaib A. Fahmy |
| 2016 | Improving the efficiency of PUF-based key generation in FPGAs using variation-aware placement. Shrikant Vyas, Naveen Kumar Dumpala, Russell Tessier, Daniel E. Holcomb |
| 2016 | JetStream: An open-source high-performance PCI Express 3 streaming library for FPGA-to-Host and FPGA-to-FPGA communication. Malte Vesper, Dirk Koch, Kizheppatt Vipin, Suhaib A. Fahmy |
| 2016 | LYNX: CAD for FPGA-based networks-on-chip. Mohamed S. Abdelfattah, Vaughn Betz |
| 2016 | Liquid: Fast placement prototyping through steepest gradient descent movement. Elias Vansteenkiste, Seppe Lenders, Dirk Stroobandt |
| 2016 | Low-latency TCP/IP stack for data center applications. David Sidler, Zsolt István, Gustavo Alonso |
| 2016 | Measure twice and cut once: Robust dynamic voltage scaling for FPGAs. Ibrahim Ahmed, Shuze Zhao, Olivier Trescases, Vaughn Betz |
| 2016 | Memory efficient and high performance key-value store on FPGA using Cuckoo hashing. Wei Liang, Wenbo Yin, Ping Kang, Lingli Wang |
| 2016 | Model-based optimization of High Level Synthesis directives. Charles Lo, Paul Chow |
| 2016 | Modeling considerations for the hardware-software co-design of flexible modern wireless transceivers. Benjamin Drozdenko, Matthew Zimmermann, Tuan Dao, Kaushik R. Chowdhury, Miriam Leeser |
| 2016 | Modelling delay degradation due to NBTI in FPGA Look-up tables. Mohammad Naouss, François Marc |
| 2016 | Multi-core for K-means clustering on FPGA. Jose Canilho, Mário P. Véstias, Horácio C. Neto |
| 2016 | Optimal random sampling based path planning on FPGAs. Size Xiao, Adam Postula, Neil W. Bergmann |
| 2016 | Optimising Sparse Matrix Vector multiplication for large scale FEM problems on FPGA. Paul Grigoras, Pavel Burovskiy, Wayne Luk, Spencer J. Sherwin |
| 2016 | Optimizing hardware design for Human Action Recognition. Xiaoyin Ma, Jose M. Rodriguez Borbon, Walid A. Najjar, Amit K. Roy-Chowdhury |
| 2016 | Optimizing interconnection complexity for realizing fixed permutation in data and signal processing algorithms. Ren Chen, Viktor K. Prasanna |
| 2016 | Ouessant: Microcontroller approach for flexible accelerator integration and control in System-on-Chip. Pierre-Henri Horrein, Benoit Porteboeuf, André Lalevee |
| 2016 | Overcoming resource underutilization in spatial CNN accelerators. Yongming Shen, Michael Ferdman, Peter A. Milder |
| 2016 | Packet processing on FPGA SoC with DPDK. Jan Viktorin, Jan Korenek |
| 2016 | ParaFRo: A hybrid parallel FPGA router using fine grained synchronization and partitioning. Chin Hau Hoo, Yajun Ha, Akash Kumar |
| 2016 | Preface. Paolo Ienne, Walid A. Najjar, Jason Helge Anderson, Philip Brisk, Walter Stechele |
| 2016 | Quantifying observability for in-system debug of high-level synthesis circuits. Jeffrey Goeders, Steven J. E. Wilton |
| 2016 | Reconfigurable circuit for implementation of family of 4-phase latch protocols. Jotham Vaddaboina Manoranjan, Kenneth S. Stevens |
| 2016 | Relational query processing on OpenCL-based FPGAs. Zeke Wang, Johns Paul, Hui Yan Cheah, Bingsheng He, Wei Zhang |
| 2016 | Resource efficient real-time processing of Contrast Limited Adaptive Histogram Equalization. Burak Unal, Ali Akoglu |
| 2016 | Runtime reconfigurable beamforming architecture for real-time sound-source localization. Bruno da Silva, Laurent Segers, An Braeken, Abdellah Touhafi |
| 2016 | Runtime-quality tradeoff in partitioning based multithreaded packing. Dries Vercruyce, Elias Vansteenkiste, Dirk Stroobandt |
| 2016 | SRI-SURF: A better SURF powered by scaled-RAM interpolator on FPGA. Xijie Jia, Kaiyuan Guo, Wenqiang Wang, Yu Wang, Huazhong Yang |
| 2016 | Scalable and modularized RTL compilation of Convolutional Neural Networks onto FPGA. Yufei Ma, Naveen Suda, Yu Cao, Jae-sun Seo, Sarma B. K. Vrudhula |
| 2016 | Search-based synthesis of approximate circuits implemented into FPGAs. Zdenek Vasícek, Lukás Sekanina |
| 2016 | Semi-dense SLAM on an FPGA SoC. Konstantinos Boikos, Christos-Savvas Bouganis |
| 2016 | Single-FPGA 3D ultrasound beamformer. Ahmet Caner Yuzuguler, William Andrew Simon, Aya Ibrahim, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli |
| 2016 | Single-FPGA, scalable, low-power, and high-quality 3D ultrasound beamformer. William Andrew Simon, Ahmet Caner Yuzuguler, Aya Ibrahim, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli |
| 2016 | SoC and FPGA oriented high-quality stereo vision system. Yanzhe Li, Kai Huang, Luc Claesen |
| 2016 | SoCLog: A real-time, automatically generated logging and profiling mechanism for FPGA-based Systems On Chip. Ioannis Parnassos, Panagiotis Skrimponis, Georgios Zindros, Nikolaos Bellas |
| 2016 | Stress-aware routing to mitigate aging effects in SRAM-based FPGAs. Behnam Khaleghi, Behzad Omidi, Hussam Amrouch, Jörg Henkel, Hossein Asadi |
| 2016 | Survey of domain-specific languages for FPGA computing. Nachiket Kapre, Samuel Bayliss |
| 2016 | TeSHoP: A Temperature Sensing based Hotspot-Driven Placement technique for FPGAs. Weina Lu, Yu Hu, Jing Ye, Xiaowei Li |
| 2016 | The speed of diversity: Exploring complex FPGA routing topologies for the global metal layer. Oleg Petelin, Vaughn Betz |
| 2016 | Time-borrowing platform in the Xilinx UltraScale+ family of FPGAs and MPSoCs. Ilya Ganusov, Benjamin Devlin |
| 2016 | Towards a hardware-assisted information flow tracking ecosystem for ARM processors. Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat |
| 2016 | Towards an all-digital antenna array transmitter. Daniel Da Costa Dinis, Rui Fiel Cordeiro, Arnaldo S. R. Oliveira, José M. N. Vieira |
| 2016 | Transparent FPGA flow. Baptiste Delporte, Anthony Convers, Roberto Rigamonti, Alberto Dassatti |
| 2016 | Trojans modifying soft-processor instruction sequences embedded in FPGA bitstreams. Ismail San, Nicole Fern, Çetin Kaya Koç, Kwang-Ting Cheng |
| 2016 | Vector FPGA acceleration of 1-D DWT computations using sparse matrix skeletons. Sidharth Maheshwari, Gourav Modi, Siddhartha, Nachiket Kapre |
| 2016 | XNoC: A non-intrusive TDM circuit-switched Network-on-Chip. Tuan D. A. Nguyen, Akash Kumar |