FPL B

99 papers

YearTitle / Authors
201525th International Conference on Field Programmable Logic and Applications, FPL 2015, London, United Kingdom, September 2-4, 2015
20157MOPS/lemon-battery image processing demonstration with an ultra-low power reconfigurable accelerator CMA-SOTB-2.
Koichiro Masuyama, Yu Fujita, Hayate Okuhara, Hideharu Amano
2015A deep convolutional neural network based on nested residue number system.
Hiroki Nakahara, Tsutomu Sasao
2015A framework for integrated monitoring of real-time embedded SoC.
Giacomo Valente
2015A fully pipelined kernel normalised least mean squares processor for accelerated parameter optimisation.
Nicholas J. Fraser, Duncan J. M. Moss, JunKyu Lee, Stephen Tridgell, Craig T. Jin, Philip Heng Wai Leong
2015A portable open-source controller for safe Dynamic Partial Reconfiguration on Xilinx FPGAs.
Stefano Di Carlo, Paolo Prinetto, Pascal Trotta, Jan Andersson
2015A rapid prototyping framework for nano-photonic accelerators.
Wolfgang Büter, Alberto García Ortiz, A. Ali, S. Mahmood, S. Arefin, V. V. Parsi Sreenivas, R. B. Bergman
2015A resilient, flash-free soft error mitigation concept for the CBM-ToF read-out chain via GBT-SCA.
Andrei-Dumitru Oancea, Christian Stüllein, Jano Gebelein, Udo Kebschull
2015A run time interpretation approach for creating custom accelerators.
Sen Ma, Zeyad Aklah, David Andrews
2015A scalable FPGA architecture for nonnegative least squares problems.
Alric Althoff, Ryan Kastner
2015A scalable architecture for multi-class visual object detection.
Siddharth Advani, Yasuki Tanabe, Kevin M. Irick, Jack Sampson, Vijaykrishnan Narayanan
2015A scalable pipelined architecture for biomimetic vision sensors.
Daniel Llamocca, Brian K. Dean
2015A software configurable coprocessor-based state-space controller.
Aaron Mills, Pei Zhang, Sudhanshu Vyas, Joseph Zambreno, Phillip H. Jones
2015A study of data partitioning on OpenCL-based FPGAs.
Zeke Wang, Bingsheng He, Wei Zhang
2015A technology mapper for depth-constrained FPGA logic cells.
Zhenghong Jiang, Grace Zgheib, Colin Yu Lin, David Novo, Zhihong Huang, Liqun Yang, Haigang Yang, Paolo Ienne
2015A transport-layer network for distributed FPGA platforms.
Sang Woo Jun, Ming Liu, Shuotao Xu, Arvind
2015A variable length hash method for faster short read mapping on FPGA.
Yoko Sogabe, Tsutomu Maruyama
2015Accurate power analysis for near-Vt RRAM-based FPGA.
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015Adaptive MRAM-based CGRAs.
Xiaobin Liu, Tedy Thomas, Alan Boguslawski, Russell Tessier
2015AmBRAM
Petr Pfeifer
2015An FPGA implementation of a phylogenetic tree reconstruction algorithm using an alternative second-pass optimization.
Henry Block, Tsutomu Maruyama
2015An LZ77-style bit-level compression for trace data compaction.
Kai-Uwe Irrgang, Thomas B. Preußer
2015An automated technique to generate relocatable partial bitstreams for Xilinx FPGAs.
Roel Oomen, Tuan D. A. Nguyen, Akash Kumar, Henk Corporaal
2015An efficient many-core architecture for Elliptic Curve Cryptography security assessment.
Marco Indaco, Fabio Lauri, Andrea Miele, Pascal Trotta
2015An efficient reconfigurable architecture by characterizing most frequent logic functions.
Iman Ahmadpour, Behnam Khaleghi, Hossein Asadi
2015Automatic generation of high throughput energy efficient streaming architectures for arbitrary fixed permutations.
Ren Chen, Viktor K. Prasanna
2015Automatic support for multi-module parallelism from computational patterns.
Nithin George, HyoukJoong Lee, David Novo, Muhsen Owaida, David Andrews, Kunle Olukotun, Paolo Ienne
2015Building a distributed key-value store with FPGA-based microservers.
Zsolt István, David Sidler, Gustavo Alonso
2015Characterisation of feasibility regions in FPGAs under adaptive DVFS.
Nizar Dahir, Pedro B. Campos, Gianluca Tempesti, Martin Trefzer, Andrew M. Tyrrell
2015CoRAM++: Supporting data-structure-specific memory interfaces for FPGA computing.
Gabriel Weisz, James C. Hoe
2015Compact dual block AES core on FPGA for CCM Protocol.
João Carlos Resende, Ricardo Chaves
2015Data protection using recursive inverse function.
Teng Xu, Hongxiang Gu, Miodrag Potkonjak
2015Data-triggered breakpoint for in-circuit debug without re-implementation.
Yutaka Tamiya, Yoshinori Tomita, Toshiyuki Ichiba, Kaoru Kawamura
2015Design and simulation tools for Embedded NOCs on FPGAs.
Mohamed S. Abdelfattah, Andrew Bitar, Ange Yaghi, Vaughn Betz
2015Domain-specific optimisation for the high-level synthesis of CellML-based simulation accelerators.
Julian Oppermann, Andreas Koch, Ting Yu, Oliver Sinnen
2015Efficient assembly for high order unstructured FEM meshes.
Pavel Burovskiy, Paul Grigoras, Spencer J. Sherwin, Wayne Luk
2015Efficient data-stream management for shared-memory many-core systems.
Nuno Neves, Pedro Tomás, Nuno Roma
2015Enabling seamless execution on hybrid CPU/FPGA systems: Challenges & directions.
Meena Belwal, Madhura Purnaprajna, T. S. B. Sudarshan
2015Energy efficient partitioning of dynamic reconfigurable MRAM-FPGAs.
Ali Ahari, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori
2015Energy optimization of FPGA-based stream-oriented computing with power gating.
Mohammad Hosseinabady, José Luis Núñez-Yáñez
2015Enhancing stochastic computations via process variation.
Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto
2015Estimating circuit delays in FPGAs after technology mapping.
Berg Severens, Elias Vansteenkiste, Karel Heyse, Dirk Stroobandt
2015FPGA based nonlinear Support Vector Machine training using an ensemble learning.
Mudhar Bin Rabieah, Christos-Savvas Bouganis
2015FPGA implementation to estimate the number of endmembers in hyperspectral images.
Carlos González, Daniel Mozos, Sebastián López, Roberto Sarmiento
2015FPGA-based all-digital Software Defined Radio receiver.
Andre Prata, Arnaldo S. R. Oliveira, Nuno Borges Carvalho
2015FPGA-based all-digital software defined radio system demonstration.
Rui Fiel Cordeiro, Andre Prata, Arnaldo S. R. Oliveira, Nuno Borges Carvalho, José M. N. Vieira
2015FPGA-based all-digital transmitters.
Rui Fiel Cordeiro, Arnaldo S. R. Oliveira, José M. N. Vieira
2015Fast FPGA system for microarchitecture optimization on synthesizable modern processor design.
Libo Huang, Yongwen Wang, Qiang Dou, Chengyi Zhang, Caixia Sun, Chao Xu
2015Fast hierarchical implementation of sequential tree-reweighted belief propagation for probabilistic inference.
Skand Hurkat, Jungwook Choi, Eriko Nurvitadhi, José F. Martínez, Rob A. Rutenbar
2015Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs.
Yuan Xue, Patrick Cronin, Chengmo Yang, Jingtong Hu
2015From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis.
João Andrade, Nithin George, Kimon Karras, David Novo, Vítor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falcão Paiva Fernandes
2015Generating FPGA accelerators for chemical similarity assessment.
Nikolaos Alachiotis
2015Greedy approach based heuristics for partitioning SpMxV on FPGAs.
Jiasen Huang, Weina Lu, Junyan Ren
2015Hierarchical library based power estimator for versatile FPGAs.
Hao Liang, Wei Zhang, Sharad Sinha, Yi-Chung Chen, Hai Li
2015High speed ECC implementation on FPGA over GF(2
Zia Uddin Ahamed Khan, Mohammed Benaissa
2015High-Level-Synthesis extensions for scalable Single-Chip Many-Accelerators on FPGAs.
Dionysios Diamantopoulos, Sotirios Xydis, Kostas Siozios, Dimitrios Soudris
2015High-level FPGA logic synthesis from .NET programs for software developers.
Zoltan Lehoczky, Richárd Tóth, Krisztian Somogyi
2015Hoplite: Building austere overlay NoCs for FPGAs.
Nachiket Kapre, Jan Gray
2015Hybrid FPGA debug approach.
Zdravko Panjkov, Andreas Wasserbauer, Timm Ostermann, Richard Hagelauer
2015Hybrid breadth-first search on a single-chip FPGA-CPU heterogeneous platform.
Yaman Umuroglu, Donn Morrison, Magnus Jahre
2015In-field vulnerability analysis of hardware-accelerated computer vision applications.
Ioannis Chadjiminas, Christos Kyrkou, Theocharis Theocharides, Maria K. Michael, Christos Ttofis
2015Inter-procedural resource sharing in High Level Synthesis through function proxies.
Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi
2015Limits of FPGA acceleration of 3D Green's Function computation for geophysical applications.
Nachiket Kapre, Jayakrishnan Selva Kumar, Parjanya Gupta, Sagar Shrishailappa Masuti, Sylvain Barbot
2015Mind the (synthesis) gap: Examining where academic FPGA tools lag behind industry.
Eddie Hung
2015NetFPGA - rapid prototyping of high bandwidth devices in open source.
Noa Zilberman, Yury Audzevich, Georgina Kalogeridou, Neelakandan Manihatty Bojan, Jingyun Zhang, Andrew W. Moore
2015OpenCL computing on FPGA using multiported shared memory.
Tahsin Turker Mutlugun, Sheng-De Wang
2015Optimised OpenCL workgroup synthesis for hybrid ARM-FPGA devices.
Mohammad Hosseinabady, José Luis Núñez-Yáñez
2015Optimizing energy efficient low-swing interconnect for sub-threshold FPGAs.
He Qi, Oluseyi A. Ayorinde, Yu Huang, Benton H. Calhoun
2015Over effective hard real-time hardware tasks scheduling and allocation.
Zakarya Guettatfi, Omar Kermia, Abdelhakim Khouas
2015ParaLaR: A parallel FPGA router based on Lagrangian relaxation.
Chin Hau Hoo, Akash Kumar, Yajun Ha
2015Parallel feature extraction and heterogeneous object-detection for multi-camera driver assistance systems.
Stefan Wonneberger, Peter Mühlfellner, Pedro Ceriotti, Thorsten Graf, Rolf Ernst
2015Pipelined NoC router architecture design with buffer configuration exploration on FPGA.
Qi Chen, Qiang Liu
2015Placing partially reconfigurable stream processing applications on FPGAs.
Nicolae Bogdan Grigore, Dirk Koch
2015Power-efficient range-match-based packet classification on FPGA.
Yun Rock Qu, Viktor K. Prasanna
2015Preface.
Peter Y. K. Cheung, Wayne Luk, Cristina Silvano
2015PushPush: Seamless integration of hardware and software objects via function calls over AXI.
Shane T. Fleming, Ivan Beretta, David B. Thomas, George A. Constantinides, Dan R. Ghica
2015Rapid prototyping and Design Space Exploration methodologies for many-accelerator systems.
Efstathios Sotiriou-Xanthopoulos, Sotirios Xydis, Kostas Siozios, George Economakos, Dimitrios Soudris
2015Recursive pipelined genetic propagation for bilevel optimisation.
Shengjia Shao, Liucheng Guo, Ce Guo, Thomas C. P. Chau, David B. Thomas, Wayne Luk, Stephen Weston
2015Reduction calculator in an FPGA based switching Hub for high performance clusters.
Takuya Kuhara, Chiharu Tsuruta, Toshihiro Hanawa, Hideharu Amano
2015SPINE: From C loop-nests to highly efficient accelerators using Algorithmic Species.
Mark Wijtvliet, Shakith Fernando, Henk Corporaal
2015Scavenger: Automating the construction of application-optimized memory hierarchies.
Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel S. Emer
2015Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor Systems-on-Chip.
Edoardo Fusella, Alessandro Cilardo, Antonino Mazzeo
2015Serial and parallel interleaved modular multipliers on FPGA platform.
Khalid Javeed, Xiaojun Wang, Mike Scott
2015Significant papers from the first 25 years of the FPL conference.
Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang
2015Software-in-the-Loop simulation of embedded control applications based on Virtual Platforms.
Stephan Werner, Leonard Masing, Fabian Lesniak, Jürgen Becker
2015Static hardware task placement on multi-context FPGA using hybrid genetic algorithm.
Hao Liang, Sharad Sinha, Rakesh Warrier, Wei Zhang
2015Synthesizable FPGA fabrics targetable by the Verilog-to-Routing (VTR) CAD flow.
Jin Hee Kim, Jason Helge Anderson
2015SysAlloc: A hardware manager for dynamic memory allocation in heterogeneous systems.
Zeping Xue, David B. Thomas
2015Temperature-triggered behavioral IPs HW Trojan detection method with FPGAs.
Xiaotong Li, Benjamin Carrión Schäfer
2015Towards a guided design flow for heterogeneous reconfigurable architectures.
Timm Bostelmann, Sergei Sawitzki
2015Towards efficient discrete Gaussian sampling for lattice-based cryptography.
Chaohui Du, Guoqiang Bai
2015Towards heterogeneous solvers for large-scale linear systems.
Stylianos I. Venieris, Grigorios Mingas, Christos-Savvas Bouganis
2015Ultra low latency dataflow renderer.
Sebastian Friston, Anthony Steed, Simon Tilbury, Georgi Gaydadjiev
2015Ultra-fast NoC emulation on a single FPGA.
Thiem Van Chu, Shimpei Sato, Kenji Kise
2015UniStream: A unified stream architecture combining configuration and data processing.
Jian Yan, Jifang Jin, Ying Wang, Xuegong Zhou, Philip H. W. Leong, Lingli Wang
2015Using island-style bi-directional intra-CLB routing in low-power FPGAs.
Oluseyi A. Ayorinde, He Qi, Yu Huang, Benton H. Calhoun
2015Variable-latency signed addition on FPGAs.
Alessandro Cilardo
2015Wotan: A tool for rapid evaluation of FPGA architecture routability without benchmarks.
Oleg Petelin, Vaughn Betz
2015rrBox: A remote dynamically reconfigurable network processing middlebox.
Tze Hon Tan, Chia Yee Ooi, Muhammad N. Marsono