FPL B

131 papers

YearTitle / Authors
201424th International Conference on Field Programmable Logic and Applications, FPL 2014, Munich, Germany, 2-4 September, 2014
2014A bit-interleaved embedded hamming scheme to correct single-bit and multi-bit upsets for SRAM-based FPGAs.
Shyamsundar Venkataraman, Rui Santos, Anup Das, Akash Kumar
2014A combination of multi-edge coding and independent coding lines for time-to-digital conversion.
Dominik Sondej, Ryszard Szplet
2014A design support tool set for asynchronous circuits with bundled-data implementation on FPGAs.
Keitaro Takizawa, Shunya Hosaka, Hiroshi Saito
2014A dynamically adaptable bus architecture for trading-off among performance, consumption and dependability in Cyber-Physical Systems.
Juan Valverde, Alfonso Rodríguez, Julio Camarero, Andrés Otero, Jorge Portilla, Eduardo de la Torre, Teresa Riesgo
2014A fast and scalable FPGA damage diagnostic service for R3TOS using BIST cloning technique.
Ali Ebrahim, Tughrul Arslan, Xabier Iturbe
2014A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms.
Nam Ho, Paul Kaufmann, Marco Platzner
2014A high performance alternating projections image demosaicing hardware.
Hasan Azgin, Serkan Yaliman, Ilker Hamzaoglu
2014A high speed design and implementation of dynamically reconfigurable processor using 28NM SOI technology.
Toru Katagiri, Hideharu Amano
2014A highly-efficient and green data flow engine for solving euler atmospheric equations.
Lin Gan, Haohuan Fu, Chao Yang, Wayne Luk, Wei Xue, Oskar Mencer, Xiaomeng Huang, Guangwen Yang
2014A logic cell architecture exploiting the shannon expansion for the reduction of configuration memory.
Qian Zhao, Kyosei Yanagida, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi
2014A mixed integer linear programming approach for design space exploration in FPGA-based MPSoC.
Bouthaina Damak, Rachid Benmansour, Smaïl Niar, Mouna Baklouti, Mohamed Abid
2014A novel modular adder for one thousand bits and more using fast carry chains of modern FPGAs.
Marcin Rogawski, Ekawat Homsirikamol, Kris Gaj
2014A scalable, high-performance customized priority queue.
Muhuan Huang, Kevin Lim, Jason Cong
2014A scalable, serially-equivalent, high-quality parallel placement methodology suitable for modern multicore and GPU architectures.
Christian Fobel, Gary William Grewal, Deborah A. Stacey
2014A secure and unclonable embedded system using instruction-level PUF authentication.
Jason Xin Zheng, Dongfang Li, Miodrag Potkonjak
2014A semi-supervised modeling approach for performance characterization of FPGA architectures.
Liqun Yang, Haigang Yang, Wei Li, Zhihua Li, Zhihong Huang, Colin Yu Lin
2014A soft-core processor for finite field arithmetic with a variable word size accelerator.
Aiko Iwasaki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa
2014A survey of open source processors for FPGAs.
Rui Jia, Colin Yu Lin, Zhenhong Guo, Rui Chen, Fei Wang, Tongqiang Gao, Haigang Yang
2014Accelerate NDN name lookup using FPGA: Challenges and a scalable approach.
Yanbiao Li, Dafang Zhang, Xian Yu, Wei Liang, Jing Long, Hong Qiao
2014Accurate power control and monitoring in ZYNQ boards.
Arash Farhadi Beldachi, José L. Núñez-Yáñez
2014Achieving low-overhead fault tolerance for parallel accelerators with dynamic partial reconfiguration.
James J. Davis, Peter Y. K. Cheung
2014Achieving portability and efficiency over chip heterogeneous multiprocessor systems.
Eugene Cartwright, Alborz Sadeghian, Sen Ma, David Andrews
2014Adaptive Dynamic On-chip Memory Management for FPGA-based reconfigurable architectures.
Ghada Dessouky, Michael J. Klaiber, Donald G. Bailey, Sven Simon
2014Aging effects in FPGAs: an experimental analysis.
Abdulazim Amouri, Florent Bruguier, Saman Kiamehr, Pascal Benoit, Lionel Torres, Mehdi Baradaran Tahoori
2014An FPGA hardware acceleration of the indirect calculation of tree lengths method for phylogenetic tree reconstruction.
Henry Block, Tsutomu Maruyama
2014An FPGA sliding window-based architecture harris corner detector.
Alexandru Amaricai, Constantina-Elena Gavriliu, Oana Boncalo
2014An FPGA-optimized architecture of horn and schunck optical flow algorithm for real-time applications.
Michael Kunz, Alexander Ostrowski, Peter Zipf
2014An efficient FPGA-based hardware framework for natural feature extraction and related Computer Vision tasks.
Matthias Pohl, Michael Schaeferling, Gundolf Kiefer
2014An efficient and flexible host-FPGA PCIe communication library.
Jian Gong, Tao Wang, Jiahua Chen, Haoyang Wu, Fan Ye, Songwu Lu, Jason Cong
2014An efficient sparse conjugate gradient solver using a Beneš permutation network.
Gary C. T. Chow, Paul Grigoras, Pavel Burovskiy, Wayne Luk
2014An empirical evaluation of High-Level Synthesis languages and tools for database acceleration.
Oriol Arcas-Abella, Geoffrey Ndu, Nehir Sönmez, Mohsen Ghasempour, Adrià Armejach, Javier Navaridas, Wei Song, John Mawer, Adrián Cristal, Mikel Luján
2014An enhanced and embedded GNU radio flow.
Ryan Marlow, Chris Dobson, Peter Athanas
2014An image processing library for C-based high-level synthesis.
Moritz Schmid, Nicolas Apelt, Frank Hannig, Jürgen Teich
2014Application specific multi-port memory customization in FPGAs.
Gorker Alp Malazgirt, Hasan Erdem Yantir, Arda Yurdakul, Smaïl Niar
2014Area implications of memory partitioning for high-level synthesis on FPGAs.
Luca Gallo, Alessandro Cilardo, David B. Thomas, Samuel Bayliss, George A. Constantinides
2014Asynchronously assisted FPGA for variability.
Hock Soon Low, Delong Shang, Fei Xia, Alexandre Yakovlev
2014Automated framework for FPGA-based parallel genetic algorithms.
Liucheng Guo, David B. Thomas, Ce Guo, Wayne Luk
2014Automatic high-level synthesis of multi-threaded hardware accelerators.
Jens Huthmann, Julian Oppermann, Andreas Koch
2014Balancing WDDL dual-rail logic in a tree-based FPGA to enhance physical security.
Emna Amouri, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger, Habib Mehrez
2014Biomedical image processing and reconstruction with dataflow computing on FPGAs.
Frederik Grüll, Udo Kebschull
2014Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology.
Honlian Su, Yu Fujita, Hideharu Amano
2014Caching memcached at reconfigurable network interface.
Eric Shun Fukuda, Hiroaki Inoue, Takashi Takenaka, Dahoo Kim, Tsunaki Sadahisa, Tetsuya Asai, Masato Motomura
2014Comparing soft and hard vector processing in FPGA-based embedded systems.
Soh Jun Jie, Nachiket Kapre
2014Compiling text analytics queries to FPGAs.
Raphael Polig, Kubilay Atasu, Heiner Giefers, Laura Chiticariu
2014Configuration approaches to improve computing efficiency of coarse-grained reconfigurable multimedia processor.
Chen Yang, Leibo Liu, Yansheng Wang, Shouyi Yin, Peng Cao, Shaojun Wei
2014Cost-efficient FPGA layered LDPC decoder with serial AP-LLR processing.
Oana Boncalo, Alexandru Amaricai, Andrei Hera, Valentin Savin
2014Criticality-aware scrubbing mechanism for SRAM-based FPGAs.
Rui Santos, Shyamsundar Venkataraman, Anup Das, Akash Kumar
2014Dataflow acceleration of Krylov subspace sparse banded problems.
Pavel Burovskiy, Stephen Girdlestone, Craig Davies, Spencer J. Sherwin, Wayne Luk
2014DyRACT: A partial reconfiguration enabled accelerator and test platform.
Kizheppatt Vipin, Suhaib A. Fahmy
2014Educating hardware design - From primary school children to postgraduate engineers.
Oliver Knodel, Martin Zabel, Patrick Lehmann, Rainer G. Spallek
2014Effective FPGA debug for high-level synthesis generated circuits.
Jeffrey B. Goeders, Steven J. E. Wilton
2014Effective emulation of permanent faults in ASICs through dynamically reconfigurable FPGAs.
Ernesto Sánchez, Luca Sterpone, Anees Ullah
2014Efficient 3D triangulation in hardware for dense structure-from-motion in low-speed automotive scenarios.
Stefan Wonneberger, Max Kohler, Wojciech Derendarz, Thorsten Graf, Rolf Ernst
2014Efficient implementation of a single-precision floating-point arithmetic unit on FPGA.
Wilson José, Ana Rita Silva, Horácio C. Neto, Mário P. Véstias
2014Efficient mapping of mathematical expressions into DSP blocks.
Bajaj Ronak, Suhaib A. Fahmy
2014Efficient multi-standard cognitive radios on FPGAs.
Thinh Hung Pham, Suhaib A. Fahmy, Ian Vince McLoughlin
2014Enabling SRAM-PUFs on Xilinx FPGAs.
Alexander Wild, Tim Güneysu
2014Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration.
Andreas Becher, Florian Bauer, Daniel Ziener, Jürgen Teich
2014Evolutionary on-line synthesis of hardware accelerators for software modules in reconfigurable embedded systems.
Roland Dobai
2014Experimental multi-FPGA GNSS receiver platform.
Fabio Garzia, Alexander Rügamer, Robert Koch, Philipp Neumaier, Ekaterina Serezhkina, Matthias Overbeck, Günter Rohmer
2014Exploring architecture parameters for dual-output LUT based FPGAs.
Zhenghong Jiang, Colin Yu Lin, Liqun Yang, Fei Wang, Haigang Yang
2014FPGA acceleration of SAT/Max-SAT solving using variable-way cache.
Kenji Kanazawa, Tsutomu Maruyama
2014FPGA acceleration of short read mapping based on sort and parallel comparison.
Youkou Sogabe, Tsutomu Maruyama
2014FPGA architecture support for heterogeneous, relocatable partial bitstreams.
Christophe Huriaux, Olivier Sentieys, Russell Tessier
2014FPGA implementation of a multi-algorithm parallel FEC for SDR platforms.
Zhenzhi Wu, Dake Liu, Zheng Yang, Qingying Wang, Wei Zhou
2014FPGA implementation of an interior point method for high-speed model predictive control.
Junyi Liu, Helfried Peyrl, Andreas Burg, George A. Constantinides
2014FPGA implementation of low-power split-radix FFT processors.
Zhuo Qian, Nasibeh Nasiri, Oren Segal, Martin Margala
2014Fast and accurate SEU-tolerance characterization method for Zynq SoCs.
Igor Villata, Unai Bidarte, Uli Kretzschmar, Armando Astarloa, Jesús Lázaro
2014HPC-gSpan: An FPGA-based parallel system for frequent subgraph mining.
Athanasios Stratikopoulos, Grigorios Chrysos, Ioannis Papaefstathiou, Apostolos Dollas
2014Hardware accelerated novel optical de novo assembly for large-scale genomes.
Pingfan Meng, Matthew Jacobsen, Motoki Kimura, Vladimir Dergachev, Thomas Anantharaman, Michael Requa, Ryan Kastner
2014Hardware conversion of neural networks simulation models for neural processing accelerator implemented as FPGA-based SoC.
Marcin Pietras
2014Hardware system synthesis from Domain-Specific Languages.
Nithin George, HyoukJoong Lee, David Novo, Tiark Rompf, Kevin J. Brown, Arvind K. Sujeeth, Martin Odersky, Kunle Olukotun, Paolo Ienne
2014Heterogeneous Heartbeats: A framework for dynamic management of Autonomous SoCs.
Shane T. Fleming, David B. Thomas
2014Heterogeneous dataflow architectures for FPGA-based sparse LU factorization.
Siddhartha, Nachiket Kapre
2014Hierarchical reconfiguration of FPGAs.
Dirk Koch, Christian Beckhoff
2014High level programming framework for FPGAs in the data center.
Oren Segal, Martin Margala, Sai Rahul Chalamalasetti, Mitch Wright
2014High throughput channel tracking for JTRS wireless channel emulation.
Dajung Lee, Janarbek Matai, Brad T. Weals, Ryan Kastner
2014High-level synthesis-based design methodology for Dynamic Power-Gated FPGAs.
Rehan Ahmed, Assem A. M. Bsoul, Steven J. E. Wilton, Peter Hallschmid, Richard Klukas
2014High-precision self-characterization for the LUT burn-in information leakage threat.
Kenneth M. Zick, Sen Li, Matthew French
2014High-throughput implementation of a million-point sparse Fourier Transform.
Abhinav Agarwal, Haitham Hassanieh, Omid Abari, Ezzeldin Hamed, Dina Katabi, Arvind
2014HyPER: A runtime reconfigurable architecture for monte carlo option pricing in the Heston model.
Christian Brugger, Christian de Schryver, Norbert Wehn
2014Identifying and placing heterogeneously-sized cluster groupings based on FPGA placement data.
Farnaz Gharibian, Lesley Shannon, Peter Jamieson
2014Improve defect tolerance in a cluster of a SRAM-based Mesh of Cluster FPGA using hardware redundancy.
Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Emna Amouri
2014Improving FPGA accelerated tracking with multiple online trained classifiers.
Matthew Jacobsen, Siddarth Sampangi, Yoav Freund, Ryan Kastner
2014Incremental distributed trigger insertion for efficient FPGA debug.
Fatemeh Eslami, Steven J. E. Wilton
2014Interconnect for commodity FPGA clusters: Standardized or customized?
A. Theodore Markettos, Paul James Fox, Simon W. Moore, Andrew W. Moore
2014Leakage and performance aware resource management for 2D dynamically reconfigurable FPGA architectures.
Siqi Wang, Pham Nam Khanh, Amit Kumar Singh, Akash Kumar
2014Low-cost multiplier-based FPU for embedded processing on FPGA.
Bogdan Pasca
2014MAPC: Memory access pattern based controller.
Tassadaq Hussain, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Eduard Ayguadé, Mateo Valero
2014Method for dynamic power monitoring on FPGAs.
Mohamad Najem, Pascal Benoit, Florent Bruguier, Gilles Sassatelli, Lionel Torres
2014Methods for implementation of feedback loops in high speed FPGA applications.
Nima Safari, Volker Mauer, Shahin Gheitanchi
2014Mixed-architecture process scheduling on tightly coupled reconfigurable computers.
Brandon Kyle Hamilton, Michael Inggs, Hayden Kwok-Hay So
2014Modulo SDC scheduling with recurrence minimization in high-level synthesis.
Andrew Canis, Stephen Dean Brown, Jason Helge Anderson
2014Multi-FPGA reconfigurable system for accelerating MATLAB simulations.
Muhammed Al Kadi, Max Ferger, Volker Stegemann, Michael Hübner
2014Multi-directional error correction schemes for SRAM-based FPGAs.
Shyamsundar Venkataraman, Rui Santos, Sidharth Maheshwari, Akash Kumar
2014New approaches for in-system debug of behaviorally-synthesized FPGA circuits.
Joshua S. Monson, Brad L. Hutchings
2014PR-HMPSoC: A versatile partially reconfigurable heterogeneous Multiprocessor System-on-Chip for dynamic FPGA-based embedded systems.
Tuan D. A. Nguyen, Akash Kumar
2014Particle filtering-based Maximum Likelihood Estimation for financial parameter estimation.
Jinzhe Yang, Binghuan Lin, Wayne Luk, Terence Nahar
2014Patra: Parallel tree-reweighted message passing architecture.
Wenlai Zhao, Haohuan Fu, Guangwen Yang, Wayne Luk
2014Pattern-based FPGA logic block and clustering algorithm.
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014Pipelined compressor tree optimization using integer linear programming.
Martin Kumm, Peter Zipf
2014Pipelined reconfigurable multiplication with constants on FPGAs.
Konrad Möller, Martin Kumm, Marco Kleinlein, Peter Zipf
2014Portable module relocation and bitstream compression for Xilinx FPGAs.
Christian Beckhoff, Dirk Koch, Jim Tørresen
2014Power-efficient re-gridding architecture for accelerating Non-uniform Fast Fourier Transform.
Umer I. Cheema, Gregory Nash, Rashid Ansari, Ashfaq A. Khokhar
2014Privacy preserving large scale DNA read-mapping in MapReduce framework using FPGAs.
Lei Xu, Han-Yee Kim, Xi Wang, Weidong Shi, Taeweon Suh
2014RAM-based hardware accelerator for network data anonymization.
Fumito Yamaguchi, Kanae Matsui, Hiroaki Nishi
2014Radix-4 and radix-8 booth encoded interleaved modular multipliers over general Fp.
Khalid Javeed, Xiaojun Wang
2014Rapid codesign of a soft vector processor and its compiler.
Matthew Naylor, Simon W. Moore
2014Ready PCIe data streaming solutions for FPGAs.
Thomas B. Preußer, Rainer G. Spallek
2014Robust and flexible FPGA-based digital PUF.
Teng Xu, Miodrag Potkonjak
2014Run-time accelerator binding for tile-based mixed-grained reconfigurable architectures.
Cláudio Machado Diniz, Muhammad Shafique, Sergio Bampi, Jörg Henkel
2014Run-time power gating in hybrid ARM-FPGA devices.
Mohammad Hosseinabady, José Luis Núñez-Yáñez
2014Scalable parallel architecture for singular value decomposition of large matrices.
Unai Martinez-Corral, Koldo Basterretxea, Raul Finker
2014Secure partial dynamic reconfiguration with unsecured external memory.
Hirak J. Kashyap, Ricardo Chaves
2014Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm.
Pablo Leyva, Ginés Doménech-Asensi, F. Javier Garrigós, Julio Illade-Quinteiro, Víctor M. Brea, Paula López, Diego Cabello
2014Source-level debugging for FPGA high-level synthesis.
Nazanin Calagar, Stephen Dean Brown, Jason Helge Anderson
2014THOR - The hardware onion router.
Tim Güneysu, Francesco Regazzoni, Pascal Sasdrich, Marcin Wójcik
2014The LEAP FPGA operating system.
Kermin Fleming, Hsin-Jung Yang, Michael Adler, Joel S. Emer
2014Tile-based bottom-up compilation of custom mesh-of-functional-units FPGA overlays.
Davor Capalija, Tarek S. Abdelrahman
2014Towards dark silicon era in FPGAs using complementary hard logic design.
Ali Ahari, Behnam Khaleghi, Zahra Ebrahimi, Hossein Asadi, Mehdi Baradaran Tahoori
2014Towards domain-specific Instruction-Set Generation.
Adithya Pulli, Carlo Galuzzi, Georgi Gaydadjiev
2014Trade-offs and progressive adoption of FPGA acceleration in network traffic monitoring.
Lukas Kekely, Viktor Pus, Pavel Benácek, Jan Korenek
2014TransPar: Transformation based dynamic Parallelism for low power CGRAs.
Syed M. A. H. Jafri, Guilermo Serrano, Masoud Daneshtalab, Naeem Abbas, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2014Transparent insertion of latency-oblivious logic onto FPGAs.
Eddie Hung, Tim Todman, Wayne Luk
2014Trends of CPU, GPU and FPGA for high-performance computing.
Mário P. Véstias, Horácio C. Neto
2014Ultrasmall: The smallest MIPS soft processor.
Hiroshi Nakatsuka, Yuichiro Tanaka, Thiem Van Chu, Shinya Takamaeda-Yamazaki, Kenji Kise
2014Using an OpenCL framework to evaluate interconnect implementations on FPGAs.
Vincent Mirian, Paul Chow
2014Using buffer-to-BRAM mapping approaches to trade-off throughput vs. memory use.
Jasmina Vasiljevic, Paul Chow
2014Using high-level knowledge to enhance data channels in FPGA streaming systems.
Marlon Wijeyasinghe, David Thomas
2014flipSyrup: Cycle-accurate hardware simulation framework on abstract FPGA platforms.
Shinya Takamaeda-Yamazaki, Kenji Kise