FPL B

75 papers

YearTitle / Authors
2001A Data Re-use Based Compiler Optimization for FPGAs.
Ram Subramanian, Santosh Pande
2001A Digit-Serial Structure for Reconfigurable Multipliers.
Chakkapas Visavakul, Peter Y. K. Cheung, Wayne Luk
2001A Generic Library for Adaptive Computing Environments.
Tilman Neumann, Andreas Koch
2001A Music Synthesizer on FPGA.
Takashi Saito, Tsutomu Maruyama, Tsutomu Hoshino, Saburo Hirano
2001A New Placement Method for Direct Mapping into LUT-Based FPGAs.
Joerg Abke, Erich Barke
2001A Reconfigurable Approach to Packet Filtering.
Raymond Sinnappan, Scott Hazelhurst
2001A Reconfigurable Embedded Input Device for Kinetically Challenged Persons.
Apostolos Dollas, Kyprianos Papademetriou, Nikolaos Aslanides, Tom Kean
2001A System on Chip for Power Line Communications According to European Home Systems Specifications.
Isidoro Urriza, José I. García-Nicolás, Alfredo Sanz, Antonio Valdovinos
2001A n-Bit Reconfigurable Scalar Quantiser.
Oswaldo Cadenas, Graham M. Megson
2001Accelerating Matrix Product on Reconfigurable Hardware for Signal Processing.
Abbes Amira, Ahmed Bouridane, Peter Milligan
2001An Approach to Real-Time Visualization of PIV Method with FPGA.
Tsutomu Maruyama, Yoshiki Yamaguchi, Atsushi Kawase
2001An Emulator for Exploring RaPiD Configurable Computing Architectures.
Chris Fisher, Kevin Rennie, Guanbin Xing, Stefan G. Berg, Kevin Bolding, John H. Naegle, Daniel Parshall, Dmitriy Portnov, Adnan Sulejmanpasic, Carl Ebeling
2001An FPGA-Based Syntactic Parser for Real-Life Almost Unrestricted Context-Free Grammars.
Cristian Ciressan, Eduardo Sanchez, Martin Rajman, Jean-Cédric Chappelier
2001Arithmetic Operation Oriented Reconfigurable Chip: RHW.
Tsukasa Yamauchi, Shogo Nakaya, Takeshi Inuo, Nobuki Kajihara
2001Bubble Partitioning for LUT-Based Sequential Circuits.
Frank Wolz, Reiner Kolla
2001Building Asynchronous Circuits with JBits.
Eric Keller
2001CRISP: A Template for Reconfigurable Instruction Set Processors.
Pieter Op de Beeck, Francisco Barat, Murali Jayapala, Rudy Lauwereins
2001Case Study of Integration of Reconfigurable Logic as a Coprocessor into a SCI-Cluster under RT-Linux.
Thomas Lehmann, Andreas Schreckenberg
2001Chip-Based Reconfigurable Task Management.
Gordon J. Brebner, Oliver Diessel
2001Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines.
João M. P. Cardoso, Horácio C. Neto
2001Configuration Caching and Swapping.
Suraj Sudhir, Suman Nath, Seth Copen Goldstein
2001Demonstrating Real-Time JPEG Image Compression-Decompression Using Standard Component IP Cores on a Programmable Logic Based Platform for DSP and Image Processing.
Albert Simpson, Jill K. Hunter, Moira Wylie, Yi Hu, David Mann
2001Design and Implementation of an Accelerated Gabor Filter Bank Using Parallel Hardware.
Nikolaus Voß, Bärbel Mertsching
2001Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware.
Yajun Ha, Bingfeng Mei, Patrick Schaumont, Serge Vernalde, Rudy Lauwereins, Hugo De Man
2001Dijkstra's Shortest Path Routing Algorithm in Reconfigurable Hardware.
Matti Tommiska, Jorma Skyttä
2001Dynamically Reconfigurable Cores.
John MacBeth, Patrick Lysaght
2001Efficient Constant Coefficient Multiplication Using Advanced FPGA Architectures.
Michael J. Wirthlin, Brian McMurtrey
2001Efficient Mapping of Pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures.
Jürgen Becker, Nicolas Liebau, Thilo Pionteck, Manfred Glesner
2001Evaluation of an FPGA Implementation of the Discrete Element Method.
Benjamin Carrión Schäfer, Steven F. Quigley, Andrew H. C. Chan
2001FPGA Resource Reduction Through Truncated Multiplication.
Kent E. Wires, Michael J. Schulte, Don McCarley
2001FPGA-Based Discrete Wavelet Transforms System.
Mokhtar Nibouche, Ahmed Bouridane, Fionn Murtagh, Omar Nibouche
2001FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits.
Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding.
Riad Stefo, José Luis Núñez, Claudia Feregrino, Sudipta Mahapatra, Simon R. Jones
2001Field-Programmable Logic and Applications, 11th International Conference, FPL 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings
Gordon J. Brebner, Roger F. Woods
2001Gambit: A Tool for the Simultaneous Placement and Detailed Routing of Gate-Arrays.
John Karro, James P. Cohoon
2001Generative Development System for FPGA Processors with Active Components.
Stephan Rühl, Peter Dillinger, Stefan Hezel, Reinhard Männer
2001Gigahertz Reconfigurable Computing Using SiGe HBT BiCMOS FPGAs.
Bryan S. Goda, Russell P. Kraft, Steven R. Carlough, Thomas W. Krawczyk Jr., John F. McDonald
2001Hardware-Software Partitioning: A Reconfigurable and Evolutionary Computing Approach.
Jim Harkin, T. Martin McGinnity, Liam P. Maguire
2001Implementation of (Normalised) RLS Lattice on Virtex.
Felix Albu, Jiri Kadlec, Christopher I. Softley, Rudolf Matousek, Antonin Hermanek, Nick Coleman, Anthony D. Fagan
2001Implementation of a NURBS to Bézier Conversor with Constant Latency.
Paula N. Mallón, Montserrat Bóo, Javier D. Bruguera
2001Implementing a Hidden Markov Model Speech Recognition System in Programmable Logic.
Stephen J. Melnikoff, Steven F. Quigley, Martin J. Russell
2001Initial Analysis of the Proteus Architecture.
Michael Winston Dales
2001JBits
Scott McMillan, Cameron Patterson
2001Loop Tiling for Reconfigurable Accelerators.
Steven Derrien, Sanjay V. Rajopadhye
2001Macrocell Architectures for Product Term Embedded Memory Arrays.
Ernie Lin, Steven J. E. Wilton
2001Memory Synthesis for FPGA-Based Reconfigurable Computers.
Amit Kasat, Iyad Ouaiss, Ranga Vemuri
2001Motivation from a Full-Rate Specific Design to a DSP Core Approach for GSM Vocoders.
Shervin Sheidaei, Hamid Noori, Ahmad Akbari, Hossein Pedram
2001Multiple Stereo Matching Using an Extended Architecture.
Miguel Arias-Estrada, Juan M. Xicoténcatl Pérez
2001Parameterized Function Evaluation for FPGAs.
Oskar Mencer, Nicolas Boullis, Wayne Luk, Henry Styles
2001Placing, Routing, and Editing Virtual FPGAs.
Loïc Lagadec, Dominique Lavenier, Erwan Fabiani, Bernard Pottier
2001Processing Models for the Next Generation Network [Abstract].
Jeff Lawrence
2001Prototyping Framework for Reconfigurable Processors.
Sergej Sawitzki, Steffen Köhler, Rainer G. Spallek
2001PuMA++: From Behavioral Specification to Multi-FPGA-Prototype.
Klaus Harbich, Erich Barke
2001Rapid Construction of Partial Configuration Datastreams from High-Level Constructs Using JBits.
Satnam Singh, Philip James-Roxby
2001Real Time Morphological Image Contrast Enhancement in Virtex FPGA.
Jerzy Kasperek
2001Reconfigurable Breakpoints for Co-debug.
Tim Price, Cameron Patterson
2001Reconfigurable Frame-Grabber for Real-Time Automated Visual Inspection (RT-AVI) Systems.
Sergio A. Cuenca, Francisco Ibarra, Rafael Álvarez
2001Reconfigurable Router Modules Using Network Protocol Wrappers.
Florian Braun, John W. Lockwood, Marcel Waldvogel
2001Run-Time Optimized Reconfiguration Using Instruction Forecasting.
Marios Iliopoulos, Theodore Antonakopoulos
2001Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers.
Andreas Dandalis, Viktor K. Prasanna, Bharani Thiruvengadam
2001Secure Configuration of Field Programmable Gate Arrays.
Tom Kean
2001Single-Chip FPGA Implementation of the Advanced Encryption Standard Algorithm.
Máire McLoone, John V. McCanny
2001Static Profile-Driven Compilation for FPGAs.
Srihari Cadambi, Seth Copen Goldstein
2001Synthesizing RTL Hardware from Java Byte Codes.
Michael J. Wirthlin, Brad L. Hutchings, Carl D. Worth
2001System Level Tools for DSP in FPGAs.
James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey D. Stroomer
2001Task-Parallel Programming of Reconfigurable Systems.
Markus Weinhardt, Wayne Luk
2001Technology Trends and Adaptive Computing.
Michael J. Flynn, Albert A. Liddicoat
2001The Evolution of Programmable Logic: Past, Present, and Future Predictions [Abstract].
Bill Carter
2001The MOLEN rho-mu-Coded Processor.
Stamatis Vassiliadis, Stephan Wong, Sorin Cotofana
2001The Systolic Ring: A Dynamically Reconfigurable Architecture for Embedded Systems.
Gilles Sassatelli, Lionel Torres, Jérôme Galy, Gaston Cambon, Camille Diou
2001Tightly Integrated Placement and Routing for FPGAs.
PariVallal Kannan, Dinesh Bhatia
2001Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification.
Timothy Wheeler, Paul S. Graham, Brent E. Nelson, Brad L. Hutchings
2001Virtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver.
Lok-Kee Ting, Roger F. Woods, Colin Cowan
2001X-MatchPRO: A ProASIC-Based 200 Mbytes/s Full-Duplex Lossless Data Compressor.
José Luis Núñez, Claudia Feregrino, Simon R. Jones, Stephen Bateman
2001fGREP - Fast Generic Routing Demand Estimation for Placed FPGA Circuits.
PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia