FPL B

52 papers

YearTitle / Authors
1997A 800 Mpixel/sec reconfigurable image correlator on XC6216.
Tom Kean, Ann Duncan
1997A case study of algorithm implementation in reconfigurable hardware and software.
Mark Shand
1997A case study of partially evaluated hardware circuits: Key-specific DES.
Jason Leonard, William H. Mangione-Smith
1997A hardware/software partitioning algorithm for custom computing machines.
Anton V. Chichkov, Carlos Beltrán Almeida
1997A prototyping environment for fuzzy controllers.
Thomas Hollstein, Andreas Kirschbaum, Manfred Glesner
1997A reconfigurable approach to low cost media processing.
Igor Kostarnov, Steve Morley, Javed Osmany, Charlie Solomon
1997A reconfigurable coprocessor for a PCI-based real time computer vision system.
Ferran Lisa, Faustino Cuadrado, Dolores Rexachs, Jordi Carrabina
1997A reconfigurable data-localised array for morphological algorithms.
Anjit Sekhar Chaudhuri, Peter Y. K. Cheung, Wayne Luk
1997A reconfigurable sensor-data processing system for personal robots.
Kazumasa Nukata, Yuichiro Shibata, Hideharu Amano, Yuichiro Anzai
1997An FPGA implementation of a matched filter detector for spread spectrum communications systems.
T. Mathews, S. G. Gibb, Laurence E. Turner, Peter J. W. Graumann, Michel Fattouche
1997An NTSC and PAL closed caption processor.
Sayan Teerapnyawatt, Krit Athikulwongse
1997An operating system for custom computing machines based on the Xputer paradigm.
Rainer Kress, Reiner W. Hartenstein, Ulrich Nageldinger
1997Auto-configurable array for GCD computation.
Tudor Jebelean
1997Automatc identification of swappable logic units in XC6200 circuitry.
Gordon J. Brebner
1997Automatic mapping of algorithms onto multiple FPGA-SRAM modules.
S. J. B. Acock, Keith R. Dimond
1997CAD-oriented FPGA and dedicated CAD system for telecommunications.
Toshiaki Miyazaki, Atsushi Takahara, Masaru Katayama, Takahiro Murooka, Takaki Ichimori, Ken-nosuke Fukami, Akihiro Tsutsui, Kazuhiro Hayashi
1997Data scheduling to increase performance of parallel accelerators.
Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger
1997Enhancing fixed point DSP processor performance by adding CPLDs as coprocessing elements.
David Greenfield, Caleb Crome, Martin S. Won, Doug Amos
1997Exploiting reconfigurability through domain-specific systems.
Brad L. Hutchings
1997Extending dynamic circuit switching to meet the challenges of new FPGA architectures.
Gordon Charles McGregor, Patrick Lysaght
1997FPGA implementation of a digital IQ demodulator using VHDL.
Ching-Chuen Jong, Y. Y. H. Lam, L. S. Ng
1997FPGA implementation of real-time digital controllers using on-line arithmetic.
Arnaud Tisserand, Martin Dimmler
1997FPLD HDL synthesis employing high-level evolutionary algorithm optimisation.
R. Bruce Maunder, Zoran A. Salcic, George G. Coghill
1997Fast parallel implementation of DFT using configurable devices.
Andreas Dandalis, Viktor K. Prasanna
1997Field-Programmable Logic and Applications, 7th International Workshop, FPL '97, London, UK, September 1-3, 1997, Proceedings
Wayne Luk, Peter Y. K. Cheung, Manfred Glesner
1997Hardware compilation, configurable platforms and ASICs for self-validating sensors.
Ian Page
1997Implementation of pipelined multipliers on Xilinx FPGAs.
Tien-Toan Do, Holger Kropp, Markus Schwiegershausen, Peter Pirsch
1997Multicontext dynamic reconfiguration and real time probing on a novel mixed signal programmable device with on-chip microprocessor.
Julio Faura, Juan Manuel Moreno, Miguel Angel Aguirre Echánove, Phuoc van Duong, Josep Maria Insenser
1997P4: A platform for FPGA implementation of protocol boosters.
Ilija Hadzic, Jonathan M. Smith
1997Parallel Graph colouring using FPGAs.
Barry Rising, Max van Daalen, Peter Burge, John Shawe-Taylor
1997Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement.
John Marty Emmert, Dinesh Bhatia
1997Performance evaluation of a full speed PCI initiator and target subsystem using FPGAs.
David Robinson, Patrick Lysaght, Gordon Charles McGregor, Hugh Dick
1997Pipeline morphing and virtual pipelines.
Wayne Luk, Nabeel Shirazi, Shaori Guo, Peter Y. K. Cheung
1997Postscript
Satnam Singh, John W. Patterson, Jim Burns, Michael Winston Dales
1997Real-time stereopsis using FPGAs.
Paul A. Dunn, Peter I. Corke
1997Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research.
Patrick I. Mackinlay, Peter Y. K. Cheung, Wayne Luk, Richard Sandiford
1997Rothko: A three dimensional FPGA architecture, its fabrication, and design tools.
Miriam Leeser, Waleed Meleis, Mankuan Michael Vai, Paul M. Zavracky
1997Run-time compaction of FPGA designs.
Oliver Diessel, Hossam A. ElGindy
1997Run-time parameterised circuits for the Xilinx XC6200.
Rob Payne
1997Satisfiability on reconfigurable hardware.
Miron Abramovici, Daniel G. Saab
1997Stream synthesis for a wormhole run-time reconfigurable platform.
Brian Kahne, Peter M. Athanas
1997Structural versus algorithmic approaches for efficient adders on Xilinx 5200 FPGA.
Bernard Laurent, Gilles Bosco, Gabriele Saucier
1997Technology mapping by binate covering.
Michal Servít, Kang Yi
1997Technology mapping of LUT based FPGAs for delay optimisation.
Xiaochun Lin, Erik L. Dagless, Aiguo Lu
1997Technology mapping of heterogeneous LUT-based FPGAs.
Maurice Kilavuka Inuani, Jonathan Saul
1997Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs.
Klaus Feske, Sven Mulka, Manfred Koegst, Günter Elst
1997The Java environment for reconfigurable computing.
Eric Lechner, Steve Guccione
1997The XC6200DS development system.
Stuart Nisbet, Steve Guccione
1997Thermal monitoring on FPGAs using ring-oscillators.
Eduardo I. Boemo, Sergio López-Buedo
1997Towards an expert system for a priori estimation of reconfiguration latency in dynamically reconfigurable logic.
Patrick Lysaght
1997VPR: A new packing, placement and routing tool for FPGA research.
Vaughn Betz, Jonathan Rose
1997Virtual radix array processors (V-RaAP).
B. Bramer, D. Chauham, M. K. Ibrahim, Amar Aggoun