FPL B

51 papers

YearTitle / Authors
1996A Fast Constant Coefficient Multiplier for the XC6200.
Tom Kean, Bernie New, Robert Slous
1996A Framework for Developing Parameterised FPGA Libraries.
Wayne Luk, Shaori Guo, Nabeel Shirazi, N. Zhuang
1996A New FPGA Technology Mapping Approach by Cluster Merging.
Kang Yi, Chu Shik Jhon
1996A Slow Motion Engine for the Analysis of FPGA-Based Prototypes.
Nikolaj Janzen, Franz J. Rammig
1996A Universal CLA Adder Generator for SRAM-Based FPGAs.
Jörn Stohmann, Erich Barke
1996A Virtual Hardware Operating System for the Xilinx XC6200.
Gordon J. Brebner
1996ASIC Design and FPGA Design: A Unified Design Methodology Applied to Different Technologies.
Alessandro Balboni, Loris Valenti
1996ATTEMPT-1: A Reconfigurable Multiprocessor Testbed.
Keisuke Inoue, Toru Kisuki, Michitaka Okuno, Etsuko Shimizu, Takuya Terasawa, Hideharu Amano
1996An Asynchronous Transfer Mode (ATM) Stream Demultiplexer and Switch.
John R. Haddy, David J. Skellern
1996An EPLD Based Transient Recorder for Simulation of Video Signal Processing Devices in an VHDL Environment Close to System Level Conditions.
L. Larsson
1996An Emulation System of the WASMII: A Data Driven Computer on a Virtual Hardware.
Yuichiro Shibata, Xiao-ping Ling, Hideharu Amano
1996An Experimental Programmable Environment for Prototyping Digital Circuits.
Andrej Trost, Roman Kuznar, Andrej Zemva, Baldomir Zajc
1996Architectural Strategies for Implementing an Image Processing Algorithm on XC6000 FPGA.
Jean-Paul Heron, Roger F. Woods
1996Architectural Synthesis Techniques for Dynamically Reconfigurable Logic.
Milan Vasilko, Djamel Ait-Boudaoud
1996Architectural Synthesis and Efficient Circuit Implementation for Field Programmable Gate Arrays.
David W. Trainor, Roger F. Woods
1996CAPpartx: Computer Aided Prototyping Partitioning for Xilinx FPGAs, a Hierarchical Partitioning Tool for Rapid Prototyping.
Ulrike Ober, Hans-Jürgen Herpel, Manfred Glesner
1996CCSimP - An Instruction-level Custom-Configurable Processor for FPLDs.
Zoran A. Salcic, R. Bruce Maunder
1996Coherent Demodulation with FPGAs.
Uwe Meyer-Bäse
1996Computing 2-D DFTs Using FPGAs.
Chris Dick
1996Computing Weight Distributions of Binary Linear Block Codes on a CCM.
Markus Weinhardt
1996Concurrent Design of Hardware/Software Dedicated Systems.
Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon
1996Convolutional Error Decoding with FPGAs.
Uwe Meyer-Bäse
1996Custom Computing Machines vs. Hardware/Software Codesign: From a globalized point of view.
Reiner W. Hartenstein, Jürgen Becker, Rainer Kress
1996Design of a VME Parametrized Library for FPGAs.
José Luis Ruiz, Yago Torroja, José Luis García
1996Development of a Telephone Answering Machine in a Lab - FPGAs in Education.
Guido Schumacher, Bernhard Josko, Gerhard Wagner, Martin Radetzki
1996FACT: Co-evaluation Environment for FPGA Architecture and CAD System.
Toshiaki Miyazaki, Akihiro Tsutsui, Kenji Ishii, Naohisa Ohta
1996FIR Filtering with FPGAs Using Quadrature Sigma-Delta Modulation Encoding.
Chris Dick, Fred Harris
1996FPGA Design Migration: Some Remarks.
Vassilliy Tchoumatchenko, Tania Vassileva, R. Ribas, Alain Guyot
1996FPGA Implementation of the Block-Matching Algorithm for Motion Estimation in Image Coding.
César Sanz, Laura de Zulueta, Juan M. Meneses
1996Fast Reconfigurable Crossbar Switching in FPGAs.
Holger Eggers, Patrick Lysaght, Hugh Dick, Gordon Charles McGregor
1996Field-Programmable Logic, Smart Applications, New Paradigms and Compilers, 6th International Workshop on Field-Programmable Logic, FPL '96, Darmstadt, Germany, September 23-25, 1996, Proceedings
Reiner W. Hartenstein, Manfred Glesner
1996Flexible Codesign Target Architecture for Early Prototyping of CMIST Systems.
Kalle Tammemäe, Mattias O'Nils, Ahmed Hemani
1996Growable FPGA Macro Generator.
Gulsun Yasar, Julie Devins, Yelena Tsyrkina, Gregg Stadtlander, Eric Millham
1996Implementing Reconfigurable Datapaths in FPGAs for Adaptive Filter Design.
Alfred Hesener
1996Implementing Sigma Delta Modulator Prototype Designs on an FPGA.
Kevin Rowley, Colin Lyden
1996Key Issues for User Acceptance of FPGA Design Tools.
Albrecht Ditzinger, Ralph Remme
1996Logic Synthesis for FPGAs Using A Mixed Exclusive-/Inclusive-OR Form.
Nigel Lester, Jonathan Saul
1996Metastability Characteristics Testing for Programmable Logic Design.
Branka Medved Rogina, Karolj Skala, Bozidar Vojnovic
1996Migration from Schematic-Based Designs to a VHDL Synthesis Environment.
Michael Gschwind, Christian Mautner
1996Optically Reconfigurable FPGAs: Is this a Future Trend?
Milan Vasilko, Djamel Ait-Boudaoud
1996Parallel CRC Computation in FPGAs.
Michael Braun, Jörg Friedrich, Thomas Grün, Josef Lembert
1996Performance-Directed Technology-Mapping for LUT-Based FPGAs - What Role Do Decomposition and Covering Play?
Christian Legl, Klaus Eckl, Bernd Wurth
1996Portable Pipeline Synthesis for FCCMs.
Markus Weinhardt
1996RACE: Reconfigurable and Adaptive Computing Environment.
Doug Smith, Dinesh Bhatia
1996RaPiD - Reconfigurable Pipelined Datapath.
Carl Ebeling, Darren C. Cronquist, Paul Franklin
1996Reconfigurable DSP Demonstrators for the Development of Spacecraft Payload Processors.
B. L. Combridge, P. S. Cornfield, S. Naunton
1996Reconfigurable Logic Based Fibre Channel Network Card With Sub 2 Micro-Second Raw Latency.
Steve Casselman
1996Solving Satisfiability Problems on FPGAs.
Takayuki Suyama, Makoto Yokoo, Hiroshi Sawada
1996The Design of a Coprocessor Board Using Xilinx's XC6200 FPGA - An Experience Report.
Stefan H.-M. Ludwig
1996The Implementation of a Field Programmable Logic Based Co-Processor for the Acceleration of Discrete Event Simulators.
Abdellah Touhafi, Wouter Brissinck, Erik F. Dirkx
1996The Trianus System and Its Application to Custom Computing.
Stephan W. Gehring, Stefan H.-M. Ludwig