FPGA A

57 papers

YearTitle / Authors
1999400-MHz Frequency Counter: A Case Study in Semi-Synchronous Design.
Bernie New, Peter Alfke
1999A Computational Intelligence Based Coarse-Grained Reconfigurable Element.
C. Hart Poskar, Peter J. Czezowski, Robert D. McLeod
1999A FPGA-Based Hardware Implementation of Generalized Profile Search Using Online Arithmetic.
Emeka Mosanya, Eduardo Sanchez
1999A Method for Implementing Fractal Image Compression on Reconfigurable Architecture.
Akihiro Matsuura, Hidehisa Nagano, Akira Nagoya
1999A Methodology for Fast FPGA Floorplanning.
John Marty Emmert, Dinesh Bhatia
1999A New High Density and Very Low Cost Reprogrammable FPGA Architecture.
Sinan Kaptanoglu, Greg Bakker, Arun Kundu, Ivan Corneillet, Ben Ting
1999A Reconfigurable Arithmetic Array for Multimedia Application.
Alan Marshall, Tony Stansfield, Igor Kostarnov, Jean Vuillemin, Brad L. Hutchings
1999ATLANTIS - A Hybrid Approach Combining the Power of FPGA and RISC Processors Based on CompactPCI.
Klaus Kornmesser, Torsten Kuberka, Andreas Kugel, Reinhard Männer, Stephan Rühl, M. Sessler, Holger Singpiel
1999An Innovative, Segmented High Performance FPGA Family with Variable-Grain-Architecture and Wide-Gating Functions.
Om Agrawal, Herman Chang, Brad Sharpe-Geisler, Nick Schmitz, Bai Nguyen, Jack Wong, Giap Tran, Fabiano Fontana, Bill Harding
1999Architecture Considerations for Mixed Signals FPGAs.
Luigi Carro
1999Balancing Interconnect and Computation in a Reconfiguable Computing Array (or, why you don't really want 100% LUT utilization).
André DeHon
1999Circuit Partitioning for Dynamically Reconfigurable FPGAs.
Huiqun Liu, D. F. Wong
1999Configuration Caching Vs Data Caching for Striped FPGAs.
Deepali Deshpande, Arun K. Somani, Akhilesh Tyagi
1999Configuration Cloning: Exploiting Regularity in Dynamic DSP Architectures.
S. R. Park, Wayne P. Burleson
1999Cut Ranking and Pruning: Enabling a General and Efficient FPGA Mapping Solution.
Jason Cong, Chang Wu, Yuzheng Ding
1999Design Issues in the Development of a JAVA-Processor for Small Embedded Applications.
Hagen Ploog, Tino Rachui, Dirk Timmermann
1999Don't Care Discovery for FPGA Configuration Compression.
Zhiyuan Li, Scott Hauck
1999Dynamically Programmable Cache Evaluation and Virtualization.
Mouna Nakkar, David G. Bentlage, John Harding, David Schwartz, Paul D. Franzon, Thomas M. Conte
1999Efficient Support of Hardware Debugging Through FPGA Physical Design Partitioning.
John C. Lach, William H. Mangione-Smith, Miodrag Potkonjak
1999Exploiting Early Partial Reconfiguration of Run-Time Reconfigurable FPGAs in Embedded Systems Design.
Byungil Jeong, Sungjoo Yoo, Kiyoung Choi
1999Exploiting FPGA-Features During the Emulation of a Fast Reactive Embedded System.
Karlheinz Weiß, Thorsten Steckstor, Gernot Koch, Wolfgang Rosenstiel
1999Extra-Dimensional Island-Style FPGAs.
Herman Schmit
1999FPGA Based Computer Vision Camera.
A. Lecerf, François Vachon, D. Ouellet, Miguel O. Arias-Estrada
1999FPGA Design Experiences Using the CSELT VIP (TM) Library.
Enrica Filippi, Archille Montanaro, Maurizio Paolini, Maura Turolla
1999FPGA Routing Architecture: Segmentation and Buffering to Optimize Speed and Density.
Vaughn Betz, Jonathan Rose
1999FPGA-Targeted Development System for Embedded Applications.
Valery Sklyarov, José A. Fonseca, Ricardo Sal Monteiro, Arnaldo S. R. Oliveira, Andreia Melo, Nuno Lau, Konstantin Kondratjuk, Iouliia Skliarova, Paulo A. C. S. Neves, António de Brito Ferrari
1999Fast Compilation for Pipelined Reconfigurable Fabrics.
Mihai Budiu, Seth Copen Goldstein
1999HSRA: High-Speed, Hierarchical Synchroous Reconfigurable Array.
William Tsu, Kip Macy, Atul Joshi, Randy Huang, Norman Walker, Tony Tung, Omid Rowhani, George Varghese, John Wawrzynek, André DeHon
1999Hardware/Software Partitioning Between Microprocessor and Reconfigurable Hardware.
M. Anand, Sanjiv Kapoor, M. Balakrishnan
1999Hierarchical Placement Directives for Parametric IP Blocks.
James Hwang, Cameron Patterson, Sujoy Mitra
1999High Speed Calculation of Cyclic Redundancy Codes.
John McCluskey
1999High-Performance 2-D FPGA DCTs Using Polynomial Transforms.
Chris Dick
1999High-Performance Low-Cost Implementation of Two-Dimensional DCT Processor nn FPGA.
Lirida A. B. Naviner, Jean-Luc Danger, C. Laurent
1999Hybrid Product Term and LUT Based Architectures Using Embedded Memory Blocks.
Frank Heile, Andrew Leaver
1999Implementing an Artificial CPG Using Fine-Grain FPGAs.
Zhijun Yang, Felipe M. G. França
1999Memory Interfacing and Instruction Specification for Reconfigurable Processors.
Jeffrey A. Jacob, Paul Chow
1999Module Generation of High Performance FPGA-Based Multipliers.
Kun-Ming Ho, Allen C.-H. Wu
1999Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems.
Abdel Ejnioui, N. Ranganathan
1999Partitioning Large Designs by Filling PFGA Devices with Hierarchy Blocks.
Helena Krupnova, Gabriele Saucier
1999Practical Applications of Recursive VHDL Components in FPGA Synthesis.
John McCluskey
1999Procedural Texture Mapping on FPGAs.
Andy Gean Ye, David M. Lewis
1999Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, FPGA 1999, Monterey, CA, USA, February 21-23, 1999
Sinan Kaptanoglu, Steve Trimberger
1999Prototyping Board and Development Environment for Rapid Prototyping of Real Time and Regular Digital Signal Processing Application.
Philippe Soulard
1999Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs.
Peter Kollig, Bashir M. Al-Hashimi
1999Run-Time Parameterizable Cores.
Steve Guccione, Delon Levi
1999Satisfiability-Based Layout Revisited: Detailed Routing of Complex FPGAs vis Search-Based Boolean SAT.
Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
1999Self-Checking Logic Design for LUT-Based FPGAs.
Parag K. Lala, Alfred L. Burress
1999Special Arithmetic Operations on FPGAs.
Matti Tommiska
1999String Natching on Nulticontext FPGAs Using Self-Reconfiguration.
Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna
1999The X-MatchLITE FPGA-Based Data Compressor.
José Luis Núñez, Claudia Feregrino, Stephen Bateman, Simon R. Jones
1999Throughput Optimization with Design Space Exploration During Partitioning for Multi-FPGA Architectures.
Vinoo Srinivasan, Ranga Vemuri
1999Towards Adaptable Hierarchical Placement for FPGAs.
Florent de Dinechin, Wayne Luk, Steve McKeever
1999Trading Quality for Compile Time: Ultra-Fast Placement for FPGAs.
Yaska Sankar, Jonathan Rose
1999Unified Access to Heterogeneous Module Generators.
Andreas Koch
1999Universal Switch Blocks for Three-Dimensional FPGA Design.
Guang-Ming Wu, Michael Shyu, Yao-Wen Chang
1999Using Cluster-Based Logic Blocks and Timing-Driven Packing to Improve FPGA Speed and Density.
Alexander Marquardt, Vaughn Betz, Jonathan Rose
1999Why a CAD-Verified FPGA Makes Routing so Simple and Fast! A Result of Co-Designing FPGAs and CAD Algorithms.
Takahiro Murooka, Atsushi Takahara, Toshiaki Miyazaki