FPGA A

49 papers

YearTitle / Authors
1998A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract).
David Jefferson, Srinivas Reddy, Christopher Lane, Ninh Ngo, Wanli Chang, Manuel Mijia, Ketan Zaveri, Cameron McClintock, Richard Cliff
1998A Coarse-Grained FPGA Architecture for High-Performance FIR Filtering.
James R. Anderson, Siddharth Sheth, Kaushik Roy
1998A Fast FPGA (FFPGA) Using Active Interconnect (Abstract).
Paul T. Sasaki
1998A Fast Routability-Driven Router for FPGAs.
Jordan S. Swartz, Vaughn Betz, Jonathan Rose
1998A Hybrid Complete-Graph Partial-Crossbar Routing Architecture for Multi-FPGA Systems.
Mohammed A. S. Khalid, Jonathan Rose
1998A New FPGA Architecture for High-Performance bit-Serial Pipeline Datapath (Abstract).
Tsuyoshi Isshiki, Takenobu Shimizugashira, Akihisa Ohta, Imanuddin Amril, Hiroaki Kunieda
1998A New Retiming-Based Technology Mapping Algorithm for LUT-based FPGAs.
Peichen Pan, Chih-Chang Lin
1998A Novel Predictable Segmented FPGA Routing Architecture.
Emil S. Ochotta, Patrick J. Crotty, Charles R. Erickson, Chih-Tsung Huang, Rajeev Jayaraman, Richard C. Li, Joseph D. Linoff, Luan Ngo, Hy V. Nguyen, Kerry M. Pierce, Douglas P. Wieland, Jennifer Zhuang, Scott S. Nance
1998A Survey of CORDIC Algorithms for FPGA Based Computers.
Ray Andraka
1998Advantages of the XC6000 Architecture for Embedded System Design (Abstract).
Karlheinz Weiß, Ronny Kistner, Arno Kunzmann, Wolfgang Rosenstiel
1998An LPGA with Foldable PLA-style Logic Blocks.
Jason Helge Anderson, Stephen Dean Brown
1998Block and IP Wrapping for Efficient Design on FPGAs (Abstract).
Helena Krupnova, B. Behnam, Gabriele Saucier
1998Boolean Matching for Complex PLBs in LUT-based FPGAs with Application to Architecture Evaluation.
Jason Cong, Yean-Yow Hwang
1998Bridging Fault Detection in FPGA Interconnects Using
Lan Zhao, D. M. H. Walker, Fabrizio Lombardi
1998Circuit Partitioning with Complex Resource Constraints in FPGAs.
Huiqun Liu, Kai Zhu, D. F. Wong
1998Configuration Prefetch for Single Context Reconfigurable Coprocessors.
Scott Hauck
1998Constraints from Hell: How to Tell Makes a Good FPGA (Panel).
Jonathan Rose, Sinan Kaptanoglu, Clive McCarthy, Rob Smith, Sandip Vij, Steve Taylor
1998Design of a Three-Dimensional FPGA for Reconfigurable Computing Machines (Abstract).
Silviu M. S. A. Chiricescu, Mankuan Michael Vai
1998Efficiently Supporting Fault-Tolerance in FPGAs.
John C. Lach, William H. Mangione-Smith, Miodrag Potkonjak
1998Evolving Computer Programs Using Rapidly Reconfigurable Field-Programmable Gate Arrays and Genetic Programming.
John R. Koza, Forrest H. Bennett III, Jeffrey L. Hutchings, Stephen L. Bade, Martin A. Keane, David Andre
1998FPGA Circuit Optimization Based on Block Integration (Abstract).
Takenori Kouda, Yahiko Kambayashi
1998FPGA Implementation of an ATM Traffic Shaper: ATS (Abstract).
Jesus Crespo, Juan Carlos Diaz, Pimitivo Matas
1998FPGA Logic Block Architecture for Digit-Serial DSP Applications (Abstract).
Hanho Lee, Sarvesh Shrivastava, Gerald E. Sobelman
1998FPGA-Based Sonar Processing.
Paul S. Graham, Brent E. Nelson
1998Fast Integrated Tools for Circuit Design with FPGAs.
Stephan W. Gehring, Stefan H.-M. Ludwig
1998Fast Module Mapping and Placement for Datapaths in FPGAs.
Timothy J. Callahan, Philip Chong, André DeHon, John Wawrzynek
1998GART: A New, Flexible Placement and Routing Tool for Research on FPGA Architectures (Abstract).
Jo Depreitere, Herwig Van Marck, Jan Van Campenhout
1998Hardware Implementation of Generalized Profile Search on the GENSTROM Machine (Abstract).
Emeka Mosanya, Jean-Michel Puiatti, Eduardo Sanchez
1998High-Level Synthesis Using Genetic Algorithms for Dynamically Reconfigurable FPGAs (Abstract).
Xue-Jie Zhang, Kam-Wing Ng, Gilbert H. Young
1998High-Performance Carry Chains for FPGAs.
Scott Hauck, Matthew M. Hosler, Thomas W. Fry
1998Implementation of IEEE Single-Precision Floating-Point Operations on FPGAs (Abstract).
Walter B. Ligon III, Greg Monn, S. P. McMillan, Kevin Schoonover, Fred Stivers, Keith D. Underwood
1998Managing Pipeline-Reconfigurable FPGAs.
Srihari Cadambi, Jeffrey Weener, Seth Copen Goldstein, Herman Schmit, Donald E. Thomas
1998Mapping Multiplication Algorithms into a Family of LUT-based FPGAs (Abstract).
Manuel Jiménez, Chin-Long Wey, Michael A. Shanblatt
1998Minimizing the Application Time for Manufacturer Testing of FPGA (Abstract).
Franco Fummi, A. Marshall, Laura Pozzi, Mariagiovanna Sami
1998More Wires and Fewer LUTs: A Design Methodology for FPGAs.
Atsushi Takahara, Toshiaki Miyazaki, Takahiro Murooka, Masaru Katayama, Kazuhiro Hayashi, Akihiro Tsutsui, Takaki Ichimori, Ken-nosuke Fukami
1998Optimizations for a Highly Cost-Efficient Programmable Logic Architecture.
Kerry Veenstra, Bruce Pedersen, Jay Schleicher, Chiakang Sung
1998Partial FPGA Rearrangement by Local Repacking (Abstract).
Oliver Diessel, Hossam A. ElGindy
1998Partitioning Sequential Circuits on Dynamically Reconfiguable FPGAs.
Douglas Chang, Malgorzata Marek-Sadowska
1998Performance-Driven Board-Level Routing for FPGA-Based Logic Emulation (Abstract).
Wai-Kei Mak, D. F. Wong
1998Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, FPGA 1998, Monterey, CA, USA, February 22-24, 1998
Jason Cong, Sinan Kaptanoglu
1998REMARC: Reconfigurable Multimedia Array Coprocessor (Abstract).
Takashi Miyamori, Kunle Olukotun
1998RENCO: A Reconfigurable Network Computer (Abstract).
Jacques-Olivier Haenni, Erik Bruchez, Emeka Mosanya, Eduardo Sanchez
1998Rapid Prototyping of Multi-Recommendation Modem (Abstract).
Abdellatif Mtibaa, Mohamed Abid, Rached Tourki
1998Reconfigurable Processing for Robust Navigation and Control (Abstract).
Jeanette F. Arrigo, Kevin J. Page, Paul M. Chau, N. C. Tien
1998SMAP: Heterogeneous Technology Mapping for Area Reduction in FPGAs with Embedded Memory Arrays.
Steven J. E. Wilton
1998Scheduling Designs into a Time-Multiplexed FPGA.
Steven Trimberger
1998Soft Decision Maximum Likelihood Decoders for Binary Linear Block Codes Implemented on FPGAs (Abstract).
Hidehisa Nagano, Takayuki Suyama, Akira Nagoya
1998Technology Mapping for FPGAs with Embedded Memory Blocks.
Jason Cong, Songjie Xu
1998Timing Driven Floorplanning on Programmable Hierarchical Targets.
S. A. Senouci, Aadil Amoura, Helena Krupnova, Gabriele Saucier