FPGA A

24 papers

YearTitle / Authors
1997A CMOS Continuous-Time Field Programmable Analog Array.
C. A. Looby, Colin Lyden
1997A FPGA-Based Implementation of a Fault-Tolerant Neural Architecture for Photon Identification.
Monica Alderighi, E. L. Gummati, Vincenzo Piuri, Giacomo R. Sechi
1997Architectural and Physical Design Challenges for One-Million Gate FPGAs and Beyond.
Jonathan Rose, Dwight D. Hill
1997Architecture Issues and Solutions for a High-Capacity FPGA.
Steven Trimberger, Khue Duong, Bob Conn
1997Buffer Minimization and Time-Multiplexed I/O on Dynamically Reconfigurable FPGAs.
Douglas Chang, Malgorzata Marek-Sadowska
1997Challenges in CAD for the One Million Gate FPGA.
Kurt Keutzer
1997FPGA Routing and Routability Estimation via Boolean Satisfiability.
R. Glenn Wood, Rob A. Rutenbar
1997General Modeling and Technology-Mapping Technique for LUT-Based FPGAs.
Amit Chowdhary, John P. Hayes
1997Generation of Synthetic Sequential Benchmark Circuits.
Michael D. Hutton, Jonathan Rose, Derek G. Corneil
1997I/O and Performance Tradeoffs with the FunctionBus During Multi-FPGA Partitioning.
Frank Vahid
1997Improving Functional Density Through Run-Time Constant Propagation.
Michael J. Wirthlin, Brad L. Hutchings
1997Is Reconfigurable Computing Commercially Viable (panel)?
Herman Schmit
1997Laser Correcting Defects to Create Transparent Routing for Large Area FPGA's.
Glenn H. Chapman, Benoit Dufort
1997Memory-to-Memory Connection Structures in FPGAs with Embedded Memory Arrays.
Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic
1997Module Generation of Complex Macros for Logic-Emulation Applications.
Wen-Jong Fang, Allen C.-H. Wu, Duan-Ping Chen
1997Partially-Dependent Functional Decomposition with Applications in FPGA Synthesis and Mapping.
Jason Cong, Yean-Yow Hwang
1997Performance Driven Floorplanning for FPGA Based Designs.
Jianzhong Shi, Dinesh Bhatia
1997Proceedings of the 1997 ACM/SIGDA Fifth International Symposium on Field Programmable Gate Arrays, FPGA 1997, Monterey, CA, USA, February 9-11, 1997
Carl Ebeling
1997Signal Processing at 250 MHz Using High-Performance FPGA's.
Brian Von Herzen
1997Synchronous Up/Down Binary Counter for LUT FPGAs with Counting Frequency Independent of Counter Size.
Alexandre F. Tenca, Milos D. Ercegovac
1997Synthesis and Floorplanning for Large Hierarchical FPGAs.
Helena Krupnova, Christian Rabedaoro, Gabriele Saucier
1997The Transmogrifier-2: A 1 Million Gate Rapid Prototyping System.
David M. Lewis, David R. Galloway, Marcus van Ierssel, Jonathan Rose, Paul Chow
1997Wormhole Run-Time Reconfiguration.
Ray Bittner, Peter M. Athanas
1997YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data Processing.
Akihiro Tsutsui, Toshiaki Miyazaki