| 2020 | A Top-Down Design Methodology for Synthesizing FPGA Fabrics Using Standard ASIC Flow. Prashanth Mohan, Oguz Atli, Onur O. Kibar, Ken Mai |
| 2020 | Accuracy-Aware Memory Allocation to Mitigate BRAM Errors for Voltage Underscaling on FPGA Overlay Accelerators. Tanvir Ahmed, Johannes Maximilian Kühn |
| 2020 | Advanced Dataflow Programming using Actor Machines for High-Level Synthesis. Endri Bezati, Mahyar Emami, James R. Larus |
| 2020 | An Algorithm for Delay Optimal Logic Replication for FPGAs Accounting for Combinational Loops. Rupesh S. Shelar |
| 2020 | Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency. Licheng Guo, Jason Lau, Yuze Chi, Jie Wang, Cody Hao Yu, Zhe Chen, Zhiru Zhang, Jason Cong |
| 2020 | Architectural Enhancements in Intel® Agilex™ FPGAs. Jeffrey Chromczak, Mark Wheeler, Charles Chiasson, Dana How, Martin Langhammer, Tim Vanderhoek, Grace Zgheib, Ilya Ganusov |
| 2020 | AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs. Pengfei Xu, Xiaofan Zhang, Cong Hao, Yang Zhao, Yongan Zhang, Yue Wang, Chaojian Li, Zetong Guan, Deming Chen, Yingyan Lin |
| 2020 | BiS-KM: Enabling Any-Precision K-Means on FPGAs. Zhenhao He, Zeke Wang, Gustavo Alonso |
| 2020 | Boyi: A Systematic Framework for Automatically Deciding the Right Execution Model of OpenCL Applications on FPGAs. Jiantong Jiang, Zeke Wang, Xue Liu, Juan Gómez-Luna, Nan Guan, Qingxu Deng, Wei Zhang, Onur Mutlu |
| 2020 | Buffer Placement and Sizing for High-Performance Dataflow Circuits. Lana Josipovic, Shabnam Sheikhha, Andrea Guerrieri, Paolo Ienne, Jordi Cortadella |
| 2020 | Built-in Self-Evaluation of First-Order Power Side-Channel Leakage for FPGAs. Ognjen Glamocanin, Louis Coulon, Francesco Regazzoni, Mirjana Stojilovic |
| 2020 | CANSEE: Customized Accelerator for Neural Signal Enhancement and Extraction from the Calcium Image in Real Time. Zhe Chen, Garrett J. Blair, Hugh T. Blair, Jason Cong |
| 2020 | Cash: A Single-Source Hardware-Software Codesign Framework for Rapid Prototyping. Blaise Tine, Fares Elsabbagh, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim |
| 2020 | Closing Leaks: Routing Against Crosstalk Side-Channel Attacks. Zeinab Seifoori, Seyedeh Sharareh Mirzargar, Mirjana Stojilovic |
| 2020 | CloudMoles: Surveillance of Power-Wasting Activities by Infiltrating Undercover Sensors. Seyedeh Sharareh Mirzargar, Andrea Guerrieri, Mirjana Stojilovic |
| 2020 | Codesign-NAS: Automatic FPGA/CNN Codesign Using Neural Architecture Search. Mohamed S. Abdelfattah, Lukasz Dudziak, Thomas Chau, Royson Lee, Hyeji Kim, Nicholas D. Lane |
| 2020 | Combining Dynamic & Static Scheduling in High-level Synthesis. Jianyi Cheng, Lana Josipovic, George A. Constantinides, Paolo Ienne, John Wickerson |
| 2020 | ConvCloud: An Adaptive Convolutional Neural Network Accelerator on Cloud FPGAs. Yang Yang, Chao Wang, Lei Gong, Xuehai Zhou |
| 2020 | Cycle-Free FPGA Routing Graphs. Ang Li, David Wentzlaff |
| 2020 | DBHI: A Tool for Decoupled Functional Hardware-Software Co-Design on SoCs. Unai Martinez-Corral, Guillermo Callaghan, Konstantinos Iordanou, Cosmin Gorgovan, Koldo Basterretxea, Mikel Luján |
| 2020 | DOMIS: Dual-Bank Optimal Micro-Architecture for Iterative Stencils. Juan Escobedo, Mingjie Lin |
| 2020 | Dependency-Driven Trace-Based Network-on-Chip Emulation on FPGAs. Thiem Van Chu, Kenji Kise, Kiyofumi Tanaka |
| 2020 | Early-stage Automated Identification of Similar Hardware Implementations with Abstract-Syntax-Tree. Parnian Mokri, Maziar Amiraskari, Yuelin Liu, Mark Hempstead |
| 2020 | Enable Efficient and Flexible FPGA Virtualization for Deep Learning in the Cloud. Shulin Zeng, Guohao Dai, Kai Zhong, Hanbo Sun, Guangjun Ge, Kaiyuan Guo, Yu Wang, Huazhong Yang |
| 2020 | End-to-End Optimization of Deep Learning Applications. Atefeh Sohrabizadeh, Jie Wang, Jason Cong |
| 2020 | Energy-Efficient 360-Degree Video Rendering on FPGA via Algorithm-Architecture Co-Design. Qiuyue Sun, Amir Taherin, Yawo Siatitse, Yuhao Zhu |
| 2020 | Establishing Trust in Microelectronics. Lee W. Lerner |
| 2020 | Evaluation of Optimized CNNs on FPGA and non-FPGA based Accelerators using a Novel Benchmarking Approach. Michaela Blott, Johannes Kath, Lisa Halder, Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Miriam Leeser, Linda Doyle |
| 2020 | FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020 Stephen Neuendorffer, Lesley Shannon |
| 2020 | FPGA / SoC Security: Arms Race in the Cloud. Steven McNeil |
| 2020 | FPGA-Accelerated Samplesort for Large Data Sets. Han Chen, Sergey Madaminov, Michael Ferdman, Peter A. Milder |
| 2020 | FPGAs will Never be the Same Again: How the Newest FPGA Architectures are Totally Disrupting the Entire FPGA Ecosystem as We Know It. Raymond X. Nijssen |
| 2020 | FPTLOPT: An Automatic Transistor-Level Optimization Tool for GRM FPGA. Yufan Zhang, Zhengjie Li, Jian Wang, Jinmei Lai |
| 2020 | FTDL: An FPGA-tailored Architecture for Deep Learning Systems. Runbin Shi, Yuhao Ding, Xuechao Wei, Hang Liu, Hayden Kwok-Hay So, Caiwen Ding |
| 2020 | FeCaffe: FPGA-enabled Caffe with OpenCL for Deep Learning Training and Inference on Intel Stratix 10. Ke He, Bo Liu, Yu Zhang, Andrew Ling, Dian Gu |
| 2020 | Finding and Understanding Bugs in FPGA Synthesis Tools. Yann Herklotz, John Wickerson |
| 2020 | Fingerprinting Cloud FPGA Infrastructures. Shanquan Tian, Wenjie Xiong, Ilias Giechaskiel, Kasper Rasmussen, Jakub Szefer |
| 2020 | Flexible Communication Avoiding Matrix Multiplication on FPGA with High-Level Synthesis. Johannes de Fine Licht, Grzegorz Kwasniewski, Torsten Hoefler |
| 2020 | GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platforms. Hanqing Zeng, Viktor K. Prasanna |
| 2020 | HPIPE: Heterogeneous Layer-Pipelined and Sparse-Aware CNN Inference for FPGAs. Mathew Hall, Vaughn Betz |
| 2020 | Hardware Description Beyond Register-Transfer Level Languages. Oron Port, Yoav Etsion |
| 2020 | HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration. Jiajie Li, Yuze Chi, Jason Cong |
| 2020 | High Density Pipelined 8bit Multiplier Systolic Arrays for FPGA. Martin Langhammer, Sergey Gribok, Gregg Baeckler |
| 2020 | High-Performance FPGA Network Switch Architecture. Philippos Papaphilippou, Jiuxi Meng, Wayne Luk |
| 2020 | INCAME: INterruptible CNN Accelerator for Multi-robot Exploration. Jincheng Yu, Zhilin Xu, Shulin Zeng, Chao Yu, Jiantao Qiu, Chaoyang Shen, Yuanfan Xu, Guohao Dai, Yu Wang, Huazhong Yang |
| 2020 | INTB: A New FPGA Interconnect Model for Architecture Exploration. Chengyu Hu, Qinghua Duan, Peng Lu, Wei Liu, Jian Wang, Jinmei Lai |
| 2020 | Invited Tutorial: Dynamatic: From C/C++ to Dynamically Scheduled Circuits. Lana Josipovic, Andrea Guerrieri, Paolo Ienne |
| 2020 | Invited Tutorial: FPGA Hardware Security for Datacenters and Beyond. Kaspar Matas, Tuan La, Nikola Grunchevski, Khoa Dang Pham, Dirk Koch |
| 2020 | LPAC: A Low-Precision Accelerator for CNN on FPGAs. Tianyu Zhang, Tiantian Han, Lu Tian, Yi Li, Xijie Jia, Guangdong Liu, Pingbo An, Yingran Tan, Lingzhi Sui, Shaoxia Fang, Dongliang Xie, Michaela Blott, Yi Shan |
| 2020 | LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations. Seyedramin Rasoulinezhad, Siddhartha, Hao Zhou, Lingli Wang, David Boland, Philip H. W. Leong |
| 2020 | Light-OPU: An FPGA-based Overlay Processor for Lightweight Convolutional Neural Networks. Yunxuan Yu, Tiandong Zhao, Kun Wang, Lei He |
| 2020 | Low Precision Floating Point Arithmetic for High Performance FPGA-based CNN Acceleration. Chen Wu, Mingyu Wang, Xinyuan Chu, Kun Wang, Lei He |
| 2020 | MLSBench: A Synthesizable Dataset of HLS Designs to Support ML Based Design Flows. Pingakshya Goswami, Masoud Shahshahani, Dinesh Bhatia |
| 2020 | Massively Simulating Adiabatic Bifurcations with FPGA to Solve Combinatorial Optimization. Yu Zou, Mingjie Lin |
| 2020 | Maximizing CNN Throughput on FPGA Clusters. Ruihao Li, Ke Liu, Mengying Zhao, Zhaoyan Shen, Xiaojun Cai, Zhiping Jia |
| 2020 | Maximizing the Serviceability of Partially Reconfigurable FPGA Systems in Multi-tenant Environment. Tuan D. A. Nguyen, Akash Kumar |
| 2020 | Multi-tenant FPGA Security: Challenges and Opportunities. Patrick Koeberl |
| 2020 | Near-memory Acceleration for Scalable Phylogenetic Inference. Nikolaos Alachiotis, Panagiotis Skrimponis, Emmanouil Pissadakis, Sundeep Rangan, Dionisios N. Pnevmatikatos |
| 2020 | On the Exploration of Connection-aware Partitioning for Parallel FPGA Routing. Yun Zhou, Dries Vercruyce, Dirk Stroobandt |
| 2020 | Performance Evaluation and Power Analysis of Teraflop-scale Fluid Simulation with Stratix 10 FPGA. Atsushi Koshiba, Kouki Watanabe, Takaaki Miyajima, Kentaro Sano |
| 2020 | Performance Portable FPGA Design. Nils Voss, Tobias Becker, Simon Tilbury, Georgi Gaydadjiev, Oskar Mencer, Anna Maria Nestorov, Enrico Reggiani, Wayne Luk |
| 2020 | Pipeline-aware Logic Deduplication in High-Level Synthesis for Post-Quantum Cryptography Algorithms. Changsu Kim, Yongwoo Lee, Shinnung Jeong, Wen Wang, Jakub Szefer, Hanjun Kim |
| 2020 | Placement Aware Design and Automation of High Speed Architectures for Tree-Structured Linear Cellular Automata on FPGAs with Scan Path Insertion. Ayan Palchaudhuri, Sandeep Sharma, Anindya Sundar Dhar |
| 2020 | Productive Hardware Designs using Hybrid HLS-RTL Development. Blaise Tine, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim |
| 2020 | Programming Abstractions for Configurable Hardware: Survey and Research Directions. Samuel Dewan, Paulo Garcia |
| 2020 | QTAccel: A Generic FPGA based Design for Q-Table based Reinforcement Learning Accelerators. Rachit Rajat, Yuan Meng, Sanmukh R. Kuppannagari, Ajitesh Srivastava, Viktor K. Prasanna, Rajgopal Kannan |
| 2020 | R2CNN: Recurrent Residual Convolutional Neural Network on FPGA. Hiroki Nakahara, Zhiqiang Que, Akira Jinguji, Wayne Luk |
| 2020 | Reactive Signal Obfuscation with Time-Fracturing to Counter Information Leakage in FPGAs. Stephen M. Williams, Mingjie Lin |
| 2020 | Real-Time Spatial 3D Audio Synthesis on FPGAs for Blind Sailing. Anish Singhani, Alexander Morrow |
| 2020 | Reuse Kernels or Activations?: A Flexible Dataflow for Low-latency Spectral CNN Acceleration. Yue Niu, Rajgopal Kannan, Ajitesh Srivastava, Viktor K. Prasanna |
| 2020 | Scalable FPGA Median Filtering using Multiple Efficient Passes. Oscar Rahnama, Tommaso Cavallari, Philip H. S. Torr, Stuart Golodetz |
| 2020 | Scalable FPGA-based Architecture for High-Performance Per-Flow Traffic Measurement. Junzhong Shen, Mei Wen, Minjin Tang, Xiaolei Zhao, Chunyuan Zhang |
| 2020 | StateMover: Combining Simulation and Hardware Execution for Efficient FPGA Debugging. Sameh Attia, Vaughn Betz |
| 2020 | Straight to the Point: Intra- and Intercluster LUT Connections to Mitigate the Delay of Programmable Routing. Stefan Nikolic, Grace Zgheib, Paolo Ienne |
| 2020 | Studying the Potential of Automatic Optimizations in the Intel FPGA SDK for OpenCL. Adel Ejjeh, Vikram S. Adve, Rob A. Rutenbar |
| 2020 | Symbiosis in Action: Reconfigurable Architectures and EDA. Mahesh A. Iyer |
| 2020 | Synthesis-Free, Flexible and Fast Hardware Library for Biophysically Plausible Neurosimulations. Rene Miedema, Georgios Smaragdos, Mario Negrello, Zaid Al-Ars, Matthias Möller, Christos Strydis |
| 2020 | The Case for Hard Matrix Multiplier Blocks in an FPGA. Aman Arora, Zhigang Wei, Lizy K. John |
| 2020 | Thermal and Voltage Side and Covert Channels and Attacks in Cloud FPGAs. Jakub Szefer |
| 2020 | Unleashing the Power of FPGAs as Programmable Switches. Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva, Yvon Savaria, J. M. Pierre Langlois |
| 2020 | Using OpenCL to Enable Software-like Development of an FPGA-Accelerated Biophotonic Cancer Treatment Simulator. Tanner Young-Schultz, Lothar Lilge, Stephen Brown, Vaughn Betz |
| 2020 | V-LSTM: An Efficient LSTM Accelerator Using Fixed Nonzero-Ratio Viterbi-Based Pruning. Taesu Kim, Daehyun Ahn, Jae-Joon Kim |
| 2020 | What To Do With Datacenter FPGAs Besides Deep Learning. Andrew Putnam |
| 2020 | When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network. Vladimir Rybalkin, Norbert Wehn |
| 2020 | Xilinx Vitis Unified Software Platform. Vinod Kathail |