FPGA A

68 papers

YearTitle / Authors
2016A 1 GSa/s, Reconfigurable Soft-core FPGA ADC (Abstract Only).
Stefan Visser, Harald Homulle, Edoardo Charbon
2016A Case for Work-stealing on FPGAs with OpenCL Atomics.
Nadesh Ramanathan, John Wickerson, Felix Winterstein, George A. Constantinides
2016A Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only).
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016A High-throughput Architecture for Lossless Decompression on FPGA Designed Using HLS (Abstract Only).
Jie Lei, Yu-Ting Chen, Yunsong Li, Jason Cong
2016A Low DDR Bandwidth 100FPS 1080p Video 2D Discrete Wavelet Transform Implementation on FPGA (Abstract Only).
Mohammed Shaaban Ibraheem, Syed Zahid Ahmed, Khalil Hachicha, Sylvain Hochberg, Patrick Garda
2016A Platform-Oblivious Approach for Heterogeneous Computing: A Case Study with Monte Carlo-based Simulation for Medical Applications.
Shih-Hao Hung, Min-Yu Tsai, Bo-Yi Huang, Chia-Heng Tu
2016A Scalable Heterogeneous Dataflow Architecture For Big Data Analytics Using FPGAs (Abstract Only).
Ehsan Ghasemi, Paul Chow
2016A Study of Pointer-Chasing Performance on Shared-Memory Processor-FPGA Systems.
Gabriel Weisz, Joseph Melber, Yu Wang, Kermin Fleming, Eriko Nurvitadhi, James C. Hoe
2016ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architecture (Abstact Only).
Yu-Ting Chen, Jason Cong, Zhenman Fang, Peipei Zhou
2016Accelerating Database Query Processing on OpenCL-based FPGAs (Abstract Only).
Zeke Wang, Hui Yan Cheah, Johns Paul, Bingsheng He, Wei Zhang
2016Agile Co-Design for a Reconfigurable Datacenter.
Shlomi Alkalay, Hari Angepat, Adrian M. Caulfield, Eric S. Chung, Oren Firestein, Michael Haselman, Stephen Heil, Kyle Holohan, Matt Humphrey, Tamás Juhász, Puneet Kaur, Sitaram Lanka, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Andrew Putnam, Raja Seera, Rimon Tadros, Jason Thong, Lisa Woods, Derek Chiou, Doug Burger
2016An Activity Aware Placement Approach For 3D FPGAs (Abstract Only).
Girish Deshpande, Dinesh K. Bhatia
2016An FPGA-Based Controller for a 77 GHz MEMS Tri-Mode Automotive Radar (Abstract Only).
Sabrina Zereen, Sundeep Lal, Mohammed A. S. Khalid, Sazzadur Chowdhury
2016An FPGA-SOC Based Accelerating Solution for N-body Simulations in MOND (Abstract Only).
Bo Peng, Tianqi Wang, Xi Jin, Chuanjun Wang
2016An Improved Global Stereo-Matching on FPGA for Real-Time Applications (Abstract Only).
Daolu Zha, Xi Jin, Tian Xiang
2016Automated Verification Code Generation in HLS Using Software Execution Traces (Abstract Only).
Liwei Yang, Swathi T. Gurumani, Suhaib A. Fahmy, Deming Chen, Kyle Rupnow
2016Automatically Optimizing the Latency, Area, and Accuracy of C Programs for High-Level Synthesis.
Xitong Gao, John Wickerson, George A. Constantinides
2016Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network.
Henri Fraisse, Abhishek Joshi, Dinesh Gaitonde, Alireza Kaviani
2016CASK: Open-Source Custom Architectures for Sparse Kernels.
Paul Grigoras, Pavel Burovskiy, Wayne Luk
2016Case for Design-Specific Machine Learning in Timing Closure of FPGA Designs.
Que Yanghua, Chinnakkannu Adaikkala Raj, Harnhua Ng, Kirvy Teo, Nachiket Kapre
2016DCPUF: Placement and Routing Constraint based Dynamically Configured Physical Unclonable Function on FPGA (Abstact Only).
Jing Ye, Yu Hu, Xiaowei Li
2016Doubling FPGA Throughput via a Soft SerDes Architecture for Full-Bandwidth Serial Pipelining (Abstract Only).
Aaron Landy, Greg Stitt
2016ENFIRE: An Energy-efficient Fine-grained Spatio-temporal Reconfigurable Computing Fabric (Abstact Only).
Wenchao Qian, Christopher Babecki, Robert Karam, Swarup Bhunia
2016Efficient Memory Partitioning for Parallel Data Access via Data Reuse.
Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou
2016Enhanced TERO-PUF Implementations and Characterization on FPGAs (Abstract Only).
Cédric Marchand, Lilian Bossuet, Abdelkarim Cherkaoui
2016Evaluating the Impact of Environmental Factors on Physically Unclonable Functions (Abstract Only).
Sebastien Bellon, Claudio Favi, Miroslaw Malek, Marco Macchetti, Francesco Regazzoni
2016FCUDA-SoC: Platform Integration for Field-Programmable SoC with the CUDA-to-FPGA Compiler.
Tan Nguyen, Swathi T. Gurumani, Kyle Rupnow, Deming Chen
2016FGPU: An SIMT-Architecture for FPGAs.
Muhammed Al Kadi, Benedikt Janßen, Michael Hübner
2016FPGA Power Estimation Using Automatic Feature Selection (Abstract Only).
Yunxuan Yu, Lei He
2016FPGP: Graph Processing Framework on FPGA A Case Study of Breadth-First Search.
Guohao Dai, Yuze Chi, Yu Wang, Huazhong Yang
2016FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures.
Grace Zgheib, Manana Lortkipanidze, Muhsen Owaida, David Novo, Paolo Ienne
2016Floorplanning of Partially Reconfigurable Design on Heterogeneous FPGA (Abstract Only).
Pingakshya Goswami, Dinesh Bhatia
2016GPU-Accelerated High-Level Synthesis for Bitwidth Optimization of FPGA Datapaths.
Nachiket Kapre, Deheng Ye
2016Going Deeper with Embedded FPGA Platform for Convolutional Neural Network.
Jiantao Qiu, Jie Wang, Song Yao, Kaiyuan Guo, Boxun Li, Erjin Zhou, Jincheng Yu, Tianqi Tang, Ningyi Xu, Sen Song, Yu Wang, Huazhong Yang
2016GraphOps: A Dataflow Library for Graph Analytics Acceleration.
Tayo Oguntebi, Kunle Olukotun
2016HGum: Messaging Framework for Hardware Accelerators (Abstact Only).
Sizhuo Zhang, Hari Angepat, Derek Chiou
2016High Level Synthesis of Complex Applications: An H.264 Video Decoder.
Xinheng Liu, Yao Chen, Tan Nguyen, Swathi T. Gurumani, Kyle Rupnow, Deming Chen
2016High Performance Linkage Disequilibrium: FPGAs Hold the Key.
Nikolaos Alachiotis, Gabriel Weisz
2016HyperPipelining of High-Speed Interface Logic.
Gregg Baeckler
2016Increasing the Utility of Self-Calibration Methods in High-Precision Time Measurement Systems (Abstract Only).
Matthias Hinkfoth, Ralf Salomon
2016Intel Acquires Altera: How Will the World of FPGAs be Affected?
Derek Chiou
2016Just In Time Assembly of Accelerators.
Sen Ma, Zeyad Aklah, David Andrews
2016Knowledge is Power: Module-level Sensing for Runtime Optimisation (Abstact Only).
James J. Davis, Eddie Hung, Joshua M. Levine, Edward A. Stott, Peter Y. K. Cheung, George A. Constantinides
2016LMC: Automatic Resource-Aware Program-Optimized Memory Partitioning.
Hsin-Jung Yang, Kermin Fleming, Michael Adler, Felix Winterstein, Joel S. Emer
2016Low-Swing Signaling for FPGA Power Reduction (Abstract Only).
Sayeh Sharifymoghaddam, Ali Sheikholeslami
2016Machine-Learning driven Auto-Tuning of High-Level Synthesis for FPGAs (Abstract Only).
Li Ting, Harri Wijaya, Nachiket Kapre
2016OLAF'16: Second International Workshop on Overlay Architectures for FPGAs.
Hayden Kwok-Hay So, John Wawrzynek
2016Optimal Circuits for Streamed Linear Permutations Using RAM.
François Serre, Thomas Holenstein, Markus Püschel
2016PRFloor: An Automatic Floorplanner for Partially Reconfigurable FPGA Systems.
Tuan D. A. Nguyen, Akash Kumar
2016Physical Design of 3D FPGAs Embedded with Micro-channel-based Fluidic Cooling.
Zhiyuan Yang, Ankur Srivastava
2016Pitfalls and Tradeoffs in Simultaneous, On-Chip FPGA Delay Measurement.
Timothy A. Linscott, Benjamin Gojman, Raphael Rubin, André DeHon
2016Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 21-23, 2016
Deming Chen, Jonathan W. Greene
2016Re-targeting Optimization Sequences from Scalar Processors to FPGAs in HLS compilers (Abstract Only).
Ronak Kogta, Suresh Purini, Ajit Mathew
2016Reducing Memory Requirements for High-Performance and Numerically Stable Gaussian Elimination.
David Boland
2016Resolve: Generation of High-Performance Sorting Architectures from High-Level Synthesis.
Janarbek Matai, Dustin Richmond, Dajung Lee, Zac Blair, Qiongzhi Wu, Amin Abazari, Ryan Kastner
2016SDSoC: A Higher-level Programming Environment for Zynq SoC and Ultrascale+ MPSoC.
Vinod Kathail, James Hwang, Welson Sun, Yogesh Chobe, Tom Shui, Jorge Carrillo
2016SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing.
Michael J. Wirthlin, Andrew M. Keller, Chase McCloskey, Parker Ridd, David S. Lee, Jeffrey Draper
2016Spatial Debug & Debug Without Re-programming in FPGAs: On-Chip debugging in FPGAs.
Pankaj Shanker
2016Stochastic-Based Convolutional Networks with Reconfigurable Logic Fabric (Abstract Only).
Mohammed Alawad, Mingjie Lin
2016Stochastic-Based Spin-Programmable Gate Array with Emerging MTJ Device Technology (Abstract Only).
Yu Bai, Mingjie Lin
2016Stratix™ 10 High Performance Routable Clock Networks.
Carl Ebeling, Dana How, David M. Lewis, Herman Schmit
2016Testing FPGA Local Interconnects Based on Repeatable Configuration Modules (Abstract Only).
Zhen Yang, Jian Wang, Meng Yang, Jinmei Lai
2016The Stratix™ 10 Highly Pipelined FPGA Architecture.
David M. Lewis, Gordon R. Chiu, Jeffrey Chromczak, David R. Galloway, Ben Gamsa, Valavan Manohararajah, Ian Milton, Tim Vanderhoek, John Van Dyken
2016Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks.
Naveen Suda, Vikas Chandra, Ganesh Dasika, Abinash Mohanty, Yufei Ma, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao
2016Towards PVT-Tolerant Glitch-Free Operation in FPGAs.
Safeen Huda, Jason Helge Anderson
2016Using Stochastic Computing to Reduce the Hardware Requirements for a Restricted Boltzmann Machine Classifier.
Bingzhe Li, M. Hassan Najafi, David J. Lilja
2016an Extensible Heterogeneous Multi-FPGA Framework for Accelerating N-body Simulation (Abstract Only).
Tianqi Wang, Bo Peng, Xi Jin
2016t-QuadPlace: Timing Driven Quadratic Placement using Quadrisection Partitioning for FPGAs (Abstact Only).
Nimish Agashiwala, Satya Prakash Upadhyay, Kia Bazargan