FPGA A

84 papers

YearTitle / Authors
20150.5-V Highly Power-Efficient Programmable Logic using Nonvolatile Configuration Switch in BEOL.
Makoto Miyamura, Toshitsugu Sakamoto, Yukihide Tsuji, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada
2015200 MS/s ADC implemented in a FPGA employing TDCs.
Harald Homulle, Francesco Regazzoni, Edoardo Charbon
2015300 Thousand Gates Single Event Effect Hardened SRAM-based FPGA for Space Application (Abstract Only).
Lei Chen, Yuanfu Zhao, Zhiping Wen, Jing Zhou, Xuewu Li, Yanlong Zhang, Huabo Sun
2015A Hardware Implementation of a Unit for Geometric Algebra Operations With Parallel Memory Arrays (Abstract Only).
Gerardo Soria García, Adrian Pedroza de-la-Crúz, Susana Ortega-Cisneros, Juan José Raygoza-Panduro, Eduardo Bayro-Corrochano
2015A Mixed-Grained Reconfigurable Computing Platform for Multiple-Standard Video Decoding (Abstract Only).
Leibo Liu, Yingjie Victor Chen, Dong Wang, Min Zhu, Shouyi Yin, Shaojun Wei
2015A Novel Coefficient Address Generation Algorithm for Split-Radix FFT (Abstract Only).
Zhuo Qian, Martin Margala
2015A Novel Composite Method to Accelerate Control Flow on Reconfigurable Architecture (Abstract Only).
Junbin Wang, Leibo Liu, Jianfeng Zhu, Shouyi Yin, Shaojun Wei
2015A Novel Method for Enabling FPGA Context-Switch (Abstract Only).
Alban Bourge, Olivier Muller, Frédéric Rousseau
2015A Novel Method for FPGA Test Based on Partial Reconfiguration and Sorting Algorithm (Abstract Only).
Xianjian Zheng, Fan Zhang, Lei Chen, Zhiping Wen, Yuanfu Zhao, Xuewu Li
2015A Parallel And Scalable Multi-FPGA based Architecture for High Performance Applications (Abstract Only).
Venkatasubramanian Viswanathan, Rabie Ben Atitallah, Jean-Luc Dekeyser, Benjamin Nakache, Maurice Nakache
2015Accelerating Complete Decision Support Queries Through High-Level Synthesis Technology (Abstract Only).
Gorker Alp Malazgirt, Nehir Sönmez, Arda Yurdakul, Osman S. Unsal, Adrián Cristal
2015Acceleration of Synthetic Aperture Radar (SAR) Algorithms using Field Programmable Gate Arrays (FPGAs) (Abstract Only).
Youngsoo Kim, William Harding, Clay S. Gloster Jr., Winser E. Alexander
2015An Automated Design Framework for Floating Point Scientific Algorithms using Field Programmable Gate Arrays (FPGAs) (Abstract Only).
Michaela E. Amoo, Youngsoo Kim, Vance Alford, Shrikant Jadhav, Naser I. El-Bathy, Clay S. Gloster Jr.
2015An Automatic Design Flow for Hybrid Parallel Computing on MPSoCs (Abstract Only).
Hongyuan Ding, Miaoqing Huang
2015An Efficient and Flexible FPGA Implementation of a Face Detection System (Abstract Only).
Hichem Ben Fekih, Ahmed Elhossini, Ben H. H. Juurlink
2015An Embedded FPGA Operating System Optimized for Vision Computing (Abstract Only).
Zhilei Chai, Jin Yu, Zhibin Wang, Jie Zhang, Haojie Zhou
2015An FPGA Implementation of Multi-stream Tracking Hardware using 2D SIMD Array (Abstract Only).
Ryota Takasu, Yoichi Tomioka, Takashi Aoki, Hitoshi Kitazawa
2015An FPGA Implementation of a Timing-Error Tolerant Discrete Cosine Transform (Abstract Only).
Yaoqiang Li, Pierce I-Jen Chuang, Andrew A. Kennings, Manoj Sachdev
2015An FPGA-Based Accelerator for the 2D Implicit FDM and Its Application to Heat Conduction Simulations (Abstract Only).
Yutaro Ishigaki, Ning Li, Yoichi Tomioka, Akihiko Miyazaki, Hitoshi Kitazawa
2015Application of Specific Delay Window Routing for Timing Optimization in FPGA Designs.
Evan Wegley, Qinhai Zhang
2015Architecture of Reconfigurable-Logic Cell Array with Atom Switch: Cluster Size & Routing Fabrics (Abstract Only).
Xu Bai, Yukihide Tsuji, Ayuka Morioka, Makoto Miyamura, Toshi Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada
2015Area Optimization of Arithmetic Units by Component Sharing for FPGAs (Abstract Only).
Shao Lin S. T. Tang, Guy Lemieux
2015Automatic Time-Redundancy Transformation for Fault-Tolerant Circuits.
Dmitry Burlyaev, Pascal Fradet, Alain Girault
2015Bridging Architecture and Programming for Throughput-Oriented Vision Processing (Abstract Only).
Amir Momeni, Hamed Tabkhi, Gunar Schirner, David R. Kaeli
2015Cost-Effective Memory Architecture to Achieve Flexible Configuration and Efficient Data Transmission for Coarse-Grained Reconfigurable Array (Abstract Only).
Chen Yang, Leibo Liu, Shouyi Yin, Shaojun Wei
2015Customizable and High Performance Matrix Multiplication Kernel on FPGA (Abstract Only).
Jie Wang, Jason Cong
2015Delay-Bounded Routing for Shadow Registers.
Eddie Hung, Joshua M. Levine, Edward A. Stott, George A. Constantinides, Wayne Luk
2015Design Space Exploration of L1 Data Caches for FPGA-Based Multiprocessor Systems.
Eric Matthews, Nicholas C. Doyle, Lesley Shannon
2015Design of a Loeffler DCT using Xilinx Vivado HLS (Abstract Only).
Seung Yeol Baik, Seokjin Jeong, Hyeong-Cheol Oh
2015EURECA: On-Chip Configuration Generation for Effective Dynamic Data Access.
Xinyu Niu, Wayne Luk, Yu Wang
2015Efficient Generation of Energy and Performance Pareto Front for FPGA Designs (Abstract Only).
Sanmukh R. Kuppannagari, Viktor K. Prasanna
2015Energy and Memory Efficient Mapping of Bitonic Sorting on FPGA.
Ren Chen, Sruja Siriyal, Viktor K. Prasanna
2015Energy-Efficient Discrete Signal Processing with Field Programmable Analog Arrays (FPAAs).
Yu Bai, Mingjie Lin
2015Energy-Efficient High-Order FIR Filtering through Reconfigurable Stochastic Processing (Abstract Only).
Mohammed Alawad, Mingjie Lin
2015Enhancements in UltraScale CLB Architecture.
Shant Chandrakar, Dinesh Gaitonde, Trevor Bauer
2015Enhancing Hardware Design Flows with MyHDL.
Keerthan Jaic, Melissa C. Smith
2015Expanding OpenFlow Capabilities with Virtualized Reconfigurable Hardware.
Stuart Byma, Naif Tarafdar, Talia Xu, Hadi Bannazadeh, Alberto Leon-Garcia, Paul Chow
2015Exploring Efficiency of Ring Oscillator-Based Temperature Sensor Networks on FPGAs (Abstract Only).
Navid Rahmanikia, Amirali Amiri, Hamid Noori, Farhad Mehdipour
2015FPGA Acceleration for Simultaneous Image Reconstruction and Segmentation based on the Mumford-Shah Regularization (Abstract Only).
Wentai Zhang, Li Shen, Thomas Page, Guojie Luo, Peng Li, Peter Maaß, Ming Jiang, Jason Cong
2015FPGA Acceleration of Irregular Iterative Computations using Criticality-Aware Dataflow Optimizations (Abstract Only).
Siddhartha, Nachiket Kapre
2015FPGA Implementation of Trained Coarse Carrier Frequency Offset Estimation and Correction for OFDM Signals (Abstract Only).
Marko Jacovic, James Chacko, Doug Pfeil, Nagarajan Kandasamy, Kapil R. Dandekar
2015FPGA-based BLOB Detection Using Dual-pipelining (Abstract Only).
Naoto Nojiri, Lin Meng, Katsuhiro Yamazaki
2015FiT: An Automated Toolkit for Matching Processor Architecture to Applications (Abstract Only).
Charles Mutigwe, Johnson Kinyua, Farhad Aghdasi
2015Fine-Grained Interconnect Synthesis.
Alex Rodionov, David Biancolin, Jonathan Rose
2015Floating-Point DSP Block Architecture for FPGAs.
Martin Langhammer, Bogdan Pasca
2015Formal Verification ATPG Search Engine Emulator (Abstract Only).
Gregory Ford, Aswin Krishna, Jacob A. Abraham, Daniel G. Saab
2015Growing a Healthy FPGA Ecosystem.
John Lockwood, Michael Adler, Dan Mansur, Derek Chiou, Mike Strickland, Jason Cong, Steve Teig
2015High Level Programming of Document Classification Systems for Heterogeneous Environments using OpenCL (Abstract Only).
Nasibeh Nasiri, Oren Segal, Martin Margala, Wim Vanderbauwhede, Sai Rahul Chalamalasetti
2015High-Level Design Tools for Floating Point FPGAs.
Deshanand P. Singh, Bogdan Pasca, Tomasz S. Czajkowski
2015Impact of Memory Architecture on FPGA Energy Consumption.
Edin Kadric, David Lakata, André DeHon
2015InTime: A Machine Learning Approach for Efficient Selection of FPGA CAD Tool Parameters.
Nachiket Kapre, Harnhua Ng, Kirvy Teo, Jaco Naude
2015Logic Gates in the routing network of FPGAs (Abstract Only).
Elias Vansteenkiste, Berg Severens, Dirk Stroobandt
2015Low-Resource Bluespec Design of a Modular Acquisition and Stimulation System for Neuroscience (Abstract Only).
Paulo Matias, Rafael Tuma Guariento, Lírio Onofre Baptista de Almeida, Jan Frans Willem Slaets
2015MATCHUP: Memory Abstractions for Heap Manipulating Programs.
Felix Winterstein, Kermin Fleming, Hsin-Jung Yang, Samuel Bayliss, George A. Constantinides
2015Mapping-Aware Constrained Scheduling for LUT-Based FPGAs.
Mingxing Tan, Steve Dai, Udit Gupta, Zhiru Zhang
2015MedianPipes: An FPGA based Highly Pipelined and Scalable Technique for Median Filtering (Abstract Only).
Umer I. Cheema, Gregory Nash, Rashid Ansari, Ashfaq A. Khokhar
2015Numerical Program Optimization for High-Level Synthesis.
Xitong Gao, George A. Constantinides
2015On Data Forwarding in Deeply Pipelined Soft Processors.
Hui Yan Cheah, Suhaib A. Fahmy, Nachiket Kapre
2015On Implementation of LUT with Large Numbers of Inputs (Abstract Only).
Masahiro Fujita
2015Optimized Fixed-Point FPGA Implementation of SVPWM for a Two-Level Inverter (Abstract Only).
Danyal Mohammadi, Said Ahmed-Zaid, Nader Rafla
2015Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks.
Chen Zhang, Peng Li, Guangyu Sun, Yijin Guan, Bingjun Xiao, Jason Cong
2015Physical Design Space Exploration.
Ephrem Wu, Inkeun Cho
2015Platform-Independent Gigabit Communication for Low-Cost FPGAs (Abstract Only).
Ralf Salomon, Ralf Joost, Matthias Hinkfoth
2015Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 22-24, 2015
George A. Constantinides, Deming Chen
2015REPROC: A Dynamically Reconfigurable Architecture for Symmetric Cryptography (Abstract Only).
Bo Wang, Leibo Liu
2015Ramethy: Reconfigurable Acceleration of Bisulfite Sequence Alignment.
James Arram, Wayne Luk, Peiyong Jiang
2015Rapid Prototyping of Wireless Physical Layer Modules Using Flexible Software/Hardware Design Flow.
James Chacko, Cem Sahin, Douglas Pfiel, Nagarajan Kandasamy, Kapil R. Dandekar
2015RapidPath: Accelerating Constrained Shortest Path Finding in Graphs on FPGA (Abstract Only).
Chao Wang, Xi Li, Qi Guo, Xuehai Zhou
2015RapidSmith 2: A Framework for BEL-level CAD Exploration on Xilinx FPGAs.
Travis Haroldsen, Brent E. Nelson, Brad L. Hutchings
2015Real-Time Obstacle Avoidance for Mobile Robots via Stereoscopic Vision Using Reconfigurable Hardware (Abstract Only).
Martinianos Papadopoulos, Christos Ttofis, Christos Kyrkou, Theocharis Theocharides
2015Resource-Aware Throughput Optimization for High-Level Synthesis.
Peng Li, Peng Zhang, Louis-Noël Pouchet, Jason Cong
2015Sequence-based In-Circuit Breakpoints for Post-Silicon Debug (Abstract Only).
Yutaka Tamiya, Yoshinori Tomita, Toshiyuki Ichiba, Kaoru Kawamura
2015Silicon Verification using High-Level Design Tools (Abstract Only).
Tomasz S. Czajkowski
2015Software-Driven Hardware Development.
Myron King, Jamey Hicks, John Ankcorn
2015Superoptimized Memory Subsystems for Streaming Applications.
Joseph G. Wingbermuehle, Ron K. Cytron, Roger D. Chamberlain
2015System-level Linking of Synthesised Hardware and Compiled Software Using a Higher-order Type System.
Shane T. Fleming, David B. Thomas, George A. Constantinides, Dan R. Ghica
2015Take the Highway: Design for Embedded NoCs on FPGAs.
Mohamed S. Abdelfattah, Andrew Bitar, Vaughn Betz
2015Technology Mapping into General Programmable Cells.
Alan Mishchenko, Robert K. Brayton, Wenyi Feng, Jonathan W. Greene
2015The BEEcube Story: Lessons Learned from Running a FPGA Startup for the Past 7 Years.
Chen Chang
2015Toward Wave Digital Filter based Analog Circuit Emulation on FPGA (Abstract Only).
Wei Wu, Peng Gu, Yen-Lung Chen, Chien-Nan Liu, Sudhakar Pamarti, Chang Wu, Lei He
2015Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only).
Pierre-Emmanuel Gaillardon, Gain Kim, Xifan Tang, Luca Gaetano Amarù, Giovanni De Micheli
2015Unlocking FPGAs Using High Level Synthesis Compiler Technologies.
Fernando Martinez-Vallina, Henry Styles
2015Using Source-Level Transformations to Improve High-Level Synthesis Debug and Validation on FPGAs.
Joshua S. Monson, Brad L. Hutchings
2015Wavefront Skipping using BRAMs for Conditional Algorithms on Vector Processors.
Aaron Severance, Joe Edwards, Guy G. F. Lemieux