FPGA A

67 papers

YearTitle / Authors
2010A 1 cycle-per-byte XML parsing accelerator.
Zefu Dai, Nick Ni, Jianwen Zhu
2010A 3d-audio reconfigurable processor.
Dimitris Theodoropoulos, Georgi Kuzmanov, Georgi Gaydadjiev
2010A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs.
Doris Chen, Deshanand P. Singh, Jeffrey Chromczak, David M. Lewis, Ryan Fung, David Neto, Vaughn Betz
2010A dependency graph based methodology for parallelizing HLL applications on FPGA (abstract only).
Sunita Chandrasekaran, Shilpa Shanbagh, Douglas L. Maskell
2010A heuristic algorithm for LUT-based FPGA technology mapping using the lower bound for DAG covering problem (abstract only).
Taiga Takata, Yusuke Matsunaga
2010A modular NFA architecture for regular expression matching.
Hao Wang, Shi Pu, Gabriel Knezek, Jyh-Charn Liu
2010A multi-FPGA based platform for emulating a 100m-transistor-scale processor with high-speed peripherals (abstract only).
Huandong Wang, Xiang Gao, Yunji Chen, Dan Tang, Weiwu Hu
2010A semi-automatic toolchain for reconfigurable multiprocessor systems-on-chip: architecture development and application partitioning (abstract only).
Diana Göhringer, Michael Hübner, Michael Benz, Jürgen Becker
2010Accelerating Monte Carlo based SSTA using FPGA.
Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, Kirill Minkovich, Bo Yuan, Yi Zou
2010Acceleration of an analytical approach to collateralized debt obligation pricing.
Dharmendra P. Gupta, Paul Chow
2010Accurately evaluating application performance in simulated hybrid multi-tasking systems.
Kyle Rupnow, Jacob Adriaens, Wenyin Fu, Katherine Compton
2010Aggressive overclocking support using a novel timing error recovery technique on FPGAs (abstract only).
Amir Masoud Gharehbaghi, Bijan Alizadeh, Masahiro Fujita
2010An architecture for graphics processing in an FPGA (abstract only).
Marcus Dutton, David C. Keezer
2010Application of a reconfigurable computing cluster to ultra high throughput genome resequencing (abstract only).
Kristian Stevens, Henry Chen, Terry Filiba, Peter L. McMahon, Yun S. Song
2010Automatic generation of high-performance multipliers for FPGAs with asymmetric multiplier blocks.
Shreesha Srinath, Katherine Compton
2010Automatic tool flow for shift-register-LUT reconfiguration: making run-time reconfiguration fast and easy (abstract only).
Brahim Al Farisi, Karel Bruneel, Harald Devos, Dirk Stroobandt
2010Axel: a heterogeneous cluster with FPGAs and GPUs.
Kuen Hung Tsoi, Wayne Luk
2010Bit-level optimization for high-level synthesis and FPGA-based acceleration.
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan, Xianhua Liu, Xu Cheng, Jason Cong
2010Building a faster boolean matcher using bloom filter.
Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong
2010Combining multicore and reconfigurable instruction set extensions.
Zhimin Chen, Richard Neil Pittman, Alessandro Forin
2010DRAM-based FPGA enabled by three-dimensional (3d) memory stacking (abstract only).
Yangyang Pan, Tong Zhang
2010Degradation in FPGAs: measurement and modelling.
Edward A. Stott, Justin S. J. Wong, N. Pete Sedcole, Peter Y. K. Cheung
2010Design and evaluation of a parameterizable NoC router for FPGAs (abstract only).
Mike Brugge, Mohammed A. S. Khalid
2010Design space exploration of throughput-optimized arrays from recurrence abstractions (abstract only).
Arpith C. Jacob, Jeremy D. Buhler, Roger D. Chamberlain
2010Designing hardware with dynamic memory abstraction.
Jirí Simsa, Satnam Singh
2010Efficient FPGAs using nanoelectromechanical relays.
Chen Chen, Roozbeh Parsa, Nishant Patil, Soogine Chong, Kerem Akarvardar, J. Provine, David Lewis, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra
2010Efficient multi-ported memories for FPGAs.
Charles Eric LaForest, J. Gregory Steffan
2010Energy efficient sensor node implementations.
Jan R. Frigo, Eric Y. Raby, Sean M. Brennan, Christophe Wolinski, Charles Wagner, François Charot, Edward Rosten, Vinod Kulathumani
2010Energy reduction with run-time partial reconfiguration (abstract only).
Shaoshan Liu, Richard Neil Pittman, Alessandro Forin
2010FPGA based chip emulation system for test development and verification of analog and mixed signal circuits (abstract only).
Rahul Bhattacharya, Santosh Biswas, Siddhartha Mukhopadhyay
2010FPGA implementation of highly parallelized decoder logic for network coding (abstract only).
Sunwoo Kim, Won Woo Ro
2010FPGA power reduction by guarded evaluation.
Jason Helge Anderson, Chirag Ravishankar
2010FPGA prototyping of an amba-based windows-compatible SoC.
Kan Huang, Junlin Lu, Jiufeng Pang, Yansong Zheng, Hao Li, Dong Tong, Xu Cheng
2010FPGA-2010 pre-conference workshop on open-source for FPGA.
Shepard Siegel, Michael J. Wirthlin
2010FPGA-based prototyping of a 2D MESH / TORUS on-chip interconnect (abstract only).
Donglai Dai, Aniruddha S. Vaidya, Roy Saharoy, Seungjoon Park, Dongkook Park, Hariharan L. Thantry, Ralf Plate, Elmar Maas, Akhilesh Kumar, Mani Azimi
2010FPMR: MapReduce framework on FPGA.
Yi Shan, Bo Wang, Jing Yan, Yu Wang, Ningyi Xu, Huazhong Yang
2010Fine-grained vs. coarse-grained shift-and-add arithmetic in FPGAs (abstract only).
Julien Lamoureux, Scott Miller, Mihai Sima
2010Global delay optimization using structural choices.
Alan Mishchenko, Robert K. Brayton, Stephen Jang
2010Haptic rendering of deformable objects using a multiple FPGA parallel computing architecture.
Behzad Mahdavikhah, Ramin Mafi, Shahin Sirouspour, Nicola Nicolici
2010Heterogeneous-ASIF: an application specific inflexible FPGA using heterogeneous logic blocks (abstract only).
Husain Parvez, Zied Marrakchi, Habib Mehrez
2010High throughput and large capacity pipelined dynamic search tree on FPGA.
Yi-Hua E. Yang, Viktor K. Prasanna
2010High-performance FPGA based on novel DSS-MOSFET and non-volatile configuration memory (abstract only).
Shinichi Yasuda, Tetsufumi Tanamoto, Kazutaka Ikegami, Atsuhiro Kinoshita, Keiko Abe, Hirotaka Nishino, Shinobu Fujita
2010High-throughput bayesian computing machine with reconfigurable hardware.
Mingjie Lin, Ilia A. Lebedev, John Wawrzynek
2010Implementing dynamic information flow tracking on microprocessors with integrated FPGA fabric (abstract only).
Skyler Schneider, Daniel Y. Deng, Daniel Lo, Greg Malysa, G. Edward Suh
2010Intel nehalem processor core made FPGA synthesizable.
Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Xiang Zou, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang
2010LUT-based FPGA technology mapping for reliability (abstract only).
Jason Cong, Kirill Minkovich
2010LambdaRank acceleration for relevance ranking in web search engines (abstract only).
Jing Yan, Ningyi Xu, Xiongfei Cai, Rui Gao, Yu Wang, Rong Luo, Feng-Hsiung Hsu
2010Maximizing area-constrained partial fault tolerance in reconfigurable logic.
David L. Foster, Darrin M. Hanna
2010Memory efficient string matching: a modular approach on FPGAs (abstract only).
Hoang Le, Yi-Hua E. Yang, Viktor K. Prasanna
2010Minimizing partial reconfiguration overhead with fully streaming DMA engines and intelligent ICAP controller (abstract only).
Shaoshan Liu, Richard Neil Pittman, Alessandro Forin
2010Modeling and simulation of nano quantum FPGAs (abstract only).
Mohammed Y. Niamat, Sowmya Panuganti, Tejas Raviraj
2010Multiplier architectures for FPGA double precision functions (abstract only).
Y. Hamid, Martin Langhammer
2010Nano-magnetic non-volatile CMOS circuits for nano-scale FPGAs (abstract only).
Larkhoon Leem, James A. Weaver, Metha Jeeradit, James S. Harris Jr.
2010Odin II: an open-source verilog HDL synthesis tool for FPGA cad flows (abstract only).
Peter A. Jamieson, Kenneth B. Kent
2010On-line sensing for healthier FPGA systems.
Kenneth M. Zick, John P. Hayes
2010Predicting the performance of application-specific NoCs implemented on FPGAs.
Jason Lee, Lesley Shannon
2010Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010
Peter Y. K. Cheung, John Wawrzynek
2010Programming high performance signal processing systems in high level languages.
Kees A. Vissers, Devada Varma, Vinod Kathail, Jeff Bier, Don MacMillen, Joseph R. Cavallaro
2010Reconfigurable custom floating-point instructions (abstract only).
Zhanpeng Jin, Richard Neil Pittman, Alessandro Forin
2010Scalable architecture for programmable quantum gate array (abstract only).
Mingjie Lin, Yaling Ma
2010Scalable network virtualization using FPGAs.
Deepak Unnikrishnan, Ramakrishna Vadlamani, Yong Liao, Abhishek Dwaraki, Jérémie Crenne, Lixin Gao, Russell Tessier
2010Server-side coprocessor updating for mobile devices with FPGAs.
Chen Huang, Frank Vahid
2010The impact of interconnect architecture on via-programmed structured ASICs (VPSAs).
Usman Ahmed, Guy G. Lemieux, Steven J. E. Wilton
2010Towards 5ps resolution TDC on a dynamically reconfigurable FPGA (abstract only).
Marc-André Daigneault, Jean-Pierre David
2010Towards scalable placement for FPGAs.
Huimin Bian, Andrew C. Ling, Alexander Choong, Jianwen Zhu
2010Variation-aware placement for FPGAs with multi-cycle statistical timing analysis.
Gregory Lucas, Chen Dong, Deming Chen
2010Voter insertion algorithms for FPGA designs using triple modular redundancy.
Jonathan M. Johnson, Michael J. Wirthlin