FPGA A

27 papers

YearTitle / Authors
2007A 1000-word vocabulary, speaker-independent, continuous live-mode speech recognizer implemented in a single FPGA.
Edward C. Lin, Kai Yu, Rob A. Rutenbar, Tsuhan Chen
2007A practical FPGA-based framework for novel CMP research.
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy Teslyar, Daxia Ge, Christos Kozyrakis, Kunle Olukotun
2007A routing fabric for monolithically stacked 3D-FPGA.
Mingjie Lin, Abbas El Gamal
2007A synthesizable datapath-oriented embedded FPGA fabric.
Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Bradley R. Quinton
2007A versatile, low latency HyperTransport core.
David Slogsnat, Alexander Giese, Ulrich Brüning
2007An FPGA-based Pentium in a complete desktop system.
Shih-Lien Lu, Peter Yiannacouras, Rolf Kassa, Michael Konow, Taeweon Suh
2007Attacking elliptic curve cryptosystems with special-purpose hardware.
Tim Güneysu, Christof Paar, Jan Pelzl
2007CReconfigurable finite field instruction set architecture.
Nathan Jachimiec, Fernando Martinez-Vallina, Jafar Saniie
2007Design of a logic element for implementing an asynchronous FPGA.
Scott C. Smith
2007Designing efficient input interconnect blocks for LUT clusters using counting and entropy.
Wenyi Feng, Sinan Kaptanoglu
2007Efficient hardware checkpointing: concepts, overhead analysis, and implementation.
Dirk Koch, Christian Haubelt, Jürgen Teich
2007FPGA-friendly code compression for horizontal microcoded custom IPs.
Bita Gorjiara, Daniel Gajski
2007GlitchLess: an active glitch minimization technique for FPGAs.
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wilton
2007High-level languages: the future or a passing fad?
Michael J. Wirthlin, Misha Burich, Andrew Guyler, Brian Von Herzen
2007Improved SAT-based Boolean matching using implicants for LUT-based FPGAs.
Jason Cong, Kirill Minkovich
2007Integrating FPGAs in high-performance computing: introduction.
Paul Chow, Mike Hutton
2007Integrating FPGAs in high-performance computing: programming models for parallel systems -- the programmer's perspective.
Satnam Singh
2007Integrating FPGAs in high-performance computing: the architecture and implementation perspective.
Nathan Woods
2007Parametric yield in FPGAs due to within-die delay variations: a quantitative analysis.
N. Pete Sedcole, Peter Y. K. Cheung
2007Performance and yield enhancement of FPGAs with within-die variation using multiple configurations.
Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami, Toshiyuki Tsutsumi, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike
2007Post-route LUT output polarity selection for timing optimization.
Kai Zhu
2007Power-aware FPGA logic synthesis using binary decision diagrams.
Kevin Oo Tinmaung, David Howland, Russell Tessier
2007Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, FPGA 2007, Monterey, California, USA, February 18-20, 2007
André DeHon, Mike Hutton
2007Stochastic physical synthesis for FPGAs with pre-routing interconnect uncertainty and process variation.
Yan Lin, Lei He
2007Synthesis of an application-specific soft multiprocessor system.
Jason Cong, Guoling Han, Wei Jiang
2007The shunt: an FPGA-based accelerator for network intrusion prevention.
Nicholas Weaver, Vern Paxson, José M. González
2007Variation-aware routing for FPGAs.
Satish Sivaswamy, Kia Bazargan