FPGA A

53 papers

YearTitle / Authors
2003A SC-based novel configurable analog cell.
Binlin Guo, Jiarong Tong
2003A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme.
Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda
2003A fully pipelined memoryless 17.8 Gbps AES-128 encryptor.
Kimmo U. Järvinen, Matti Tommiska, Jorma Skyttä
2003A granularity-based classification model for systems-on-a-chip.
Stephan Bingemer, Peter Zipf, Manfred Glesner
2003A high resolution diagnosis technique for open and short defects in FPGA interconnects.
Mehdi Baradaran Tahoori
2003A logic based approach to hardware abstraction.
Khaled Benkrid, Samir Belkacemi, Danny Crookes
2003A methodology to implement block ciphers in reconfigurable hardware and its application to fast and compact AES RIJNDAEL.
François-Xavier Standaert, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat
2003A physical retiming algorithm for field programmable gate arrays.
Peter Suaris, Dongsheng Wang, Pei-Ning Guo, Nan-Chi Chou
2003A pipelined configurable gate array for embedded processors.
Andrea Lodi, Mario Toma, Fabio Campi
2003A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology.
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, Russell P. Kraft, John F. McDonald
2003A single-FPGA implementation of image connected component labelling.
Khaled Benkrid, S. Sukhsawas, Danny Crookes, Samir Belkacemi
2003An FPGA architecture with built-in error correction capability.
Parag K. Lala, B. Kiran Kumar
2003An FPGA architecture with enhanced datapath functionality.
Katarzyna Leijten-Nowak, Jef L. van Meerbergen
2003An automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs.
Alex K. Jones, Prithviraj Banerjee
2003An estimation and exploration methodology from system-level specifications: application to FPGAs.
Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe
2003Application-dependent testing of FPGAs for bridging faults.
Mehdi Baradaran Tahoori
2003Architecture evaluation for power-efficient FPGAs.
Fei Li, Deming Chen, Lei He, Jason Cong
2003Architectures and algorithms for synthesizable embedded programmable logic cores.
Noha Kafafi, Kimberly A. Bozman, Steven J. E. Wilton
2003Automatic transistor and physical design of FPGA tiles from an architectural specification.
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron Egier, Jonathan Rose
2003Customized regular channel design in FPGAs.
Elaheh Bozorgzadeh, Majid Sarrafzadeh
2003Design framework for the implementation of the 2-D orthogonal discrete wavelet transform on FPGA.
Abdsamad Benkrid, Danny Crookes, Khaled Benkrid
2003Design of FPGA interconnect for multilevel metalization.
Raphael Rubin, André DeHon
2003Design of a fingerprint system using a hardware/software environment.
Vanderlei Bonato, Rolf Fredi Molz, João Carlos Furtado, Marcos Flôres Ferrão, Fernando Gehm Moraes
2003Design strategies and modified descriptions to optimize cipher FPGA implementations: fast and compact results for DES and triple-DES.
Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat
2003Energy-efficient signal processing using FPGAs.
Seonil Choi, Ronald Scrofano, Viktor K. Prasanna, Ju-wook Jang
2003FPGA implementation of a fast Hadamard transformer for WCDMA.
Sanat Kamal Bahl, Jim Plusquellic
2003FPGA-based design of an evolutionary controller for collision-free robot navigation.
M. A. Hannan Bin Azhar, Keith R. Dimond
2003FPGAs in critical hardware/software systems.
Adrian J. Hilton, Gemma Townson, Jon G. Hall
2003Hardware-assisted simulated annealing with application for fast FPGA placement.
Michael G. Wrighton, André DeHon
2003High-level modeling and FPGA prototyping of microprocessors.
Joydeep Ray, James C. Hoe
2003I/O placement for FPGAs with multiple I/O standards.
Wai-Kei Mak
2003Implementation of BEE: a real-time large-scale hardware emulation engine.
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Robert W. Brodersen
2003Implementation of digital fixed-point approximations to continuous-time IIR filters.
Joan Carletta, Robert J. Veillette, Frederick W. Krach, Zhengwei Fang
2003Lattice adaptive filter implementation for FPGA.
Zdenek Pohl, Rudolf Matousek, Jiri Kadlec, Milan Tichý, Miroslav Lícko
2003Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs.
Prithviraj Banerjee, Vikram Saxena, Juan Ramon Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, Robert Anderson
2003On computation and resource management in an FPGA-based computation environment.
Soheil Ghiasi, Karlene Nguyen, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2003On hiding latency in reconfigurable systems: the case of merge-sort for an FPGA-based system.
Hossam A. ElGindy, George Ferizis
2003Parallel placement for field-programmable gate arrays.
Pak K. Chan, Martine D. F. Schlag
2003PipeRoute: a pipelining-aware router for FPGAs.
Akshay Sharma, Carl Ebeling, Scott Hauck
2003Post-placement C-slow retiming for the xilinx virtex FPGA.
Nicholas Weaver, Yury Markovsky, Yatish Patel, John Wawrzynek
2003Power-aware architectures and circuits for FPGA-based signal processing.
Frank Honoré, Benton H. Calhoun, Anantha P. Chandrakasan
2003Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2003, Monterey, CA, USA, February 23-25, 2003
Steve Trimberger, Russell Tessier
2003Reconfigurable randomized K-way graph partitioning.
Fatih Kocan
2003Recursive circuit clustering for minimum delay and area.
Mehrdad Eslami Dehkordi, Stephen Dean Brown
2003Reducing pin and area overhead in fault-tolerant FPGA-based designs.
Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis
2003Stochastic, spatial routing for hypergraphs, trees, and meshes.
Randy Huang, John Wawrzynek, André DeHon
2003Synthetic circuit generation using clustering and iteration.
Paul D. Kundarewich, Jonathan Rose
2003Testing for bit error rate in FPGA communication interfaces.
Yongquan Fan, Zeljko Zilic
2003The Stratix
David M. Lewis, Vaughn Betz, David Jefferson, Andy Lee, Christopher Lane, Paul Leventis, Sandy Marquardt, Cameron McClintock, Bruce Pedersen, Giles Powell, Srinivas Reddy, Chris Wysocki, Richard Cliff, Jonathan Rose
2003Track placement: orchestrating routing structures to maximize routability.
Katherine Compton, Scott Hauck
2003Using FPGAs for data and reorganization engines: preliminary results for spatial pointer-based data structures.
Pedro C. Diniz, JoonSeok Park
2003Wire type assignment for FPGA routing.
Seokjin Lee, Hua Xiang, D. F. Wong, Richard Y. Sun
2003Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding.
Federico Quaglio, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Molino, Gianluca Piccinini, Maurizio Zamboni