| 2000 | A C compiler for a processor with a reconfigurable functional unit. Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerjee |
| 2000 | A benchmark suite for evaluating configurable computing systems--status, reflections, and future directions. S. Kumar, Luiz Pires, Subburajan Ponnuswamy, C. Nanavati, J. Golusky, M. Vojta, S. Wadi, D. Pandalai, Henk A. E. Spaanenburg |
| 2000 | A novel high throughput reconfigurable FPGA architecture. Amit Singh, Luca Macchiarulo, Arindam Mukherjee, Malgorzata Marek-Sadowska |
| 2000 | A reconfigurable multi-function computing cache architecture. Huesung Kim, Arun K. Somani, Akhilesh Tyagi |
| 2000 | A representation for dynamic graphs in reconfigurable hardware and its application to fundamental graph algorithms. Lorenz Huelsbergen |
| 2000 | Algorithm analysis and mapping environment for adaptive computing systems (poster abstract). Eric K. Pauer, Paul D. Fiore, John M. Smith, Cory S. Myers |
| 2000 | An FPGA implementation and performance evaluation of the Serpent block cipher. Adam J. Elbirt, Christof Paar |
| 2000 | An FPGA-based genetic algorithm machine (poster abstract). Barry Shackleford, Etsuko Okushi, Mitsuhiro Yasuda, Hisao Koizumi, Katsuhiko Seo, Takashi Iwamoto, Hiroto Yasuura |
| 2000 | Automatic generation of FPGA routing architectures from high-level descriptions. Vaughn Betz, Jonathan Rose |
| 2000 | Coarse-grained carry architecture for FPGA (poster abstract). Hyuk-Jun Lee, Michael J. Flynn |
| 2000 | Cost minimization of partitioned circuits with complex resource constraints in FPGAs (poster abstract). Yu-Chung Lin, Su-Feng Tseng, Tsai-Ming Hsieh |
| 2000 | Design and implementation of an FPGA based processor for compressed images (poster abstract). V. S. Balakrishnan, Hardy J. Pottinger, Fikret Erçal, Mukesh Agarwal |
| 2000 | Determining the optimum extended instruction-set architecture for application specific reconfigurable VLIW CPUs (poster abstract). Cesare Alippi, William Fornaciari, Laura Pozzi, Mariagiovanna Sami |
| 2000 | FPGA clock management for low power applications (poster abstract). Ian Brynjolfson, Zeljko Zilic |
| 2000 | FPGA implementation and analysis of image restoration. F. S. Ogrenci, Aggelos K. Katsaggelos, Majid Sarrafzadeh |
| 2000 | Factoring large numbers with programmable hardware. Hea Joung Kim, William H. Mangione-Smith |
| 2000 | Field programmable port extender (FPX) for distributed routing and queuing. John W. Lockwood, Jonathan S. Turner, David E. Taylor |
| 2000 | Generating highly-routable sparse crossbars for PLDs. Guy G. Lemieux, Paul Leventis, David M. Lewis |
| 2000 | Heterogeneous technology mapping for FPGAs with dual-port embedded memory arrays. Steven J. E. Wilton |
| 2000 | Implementing a RAKE receiver for wireless communications on an FPGA-based computer system. Ali M. Shankiti, Miriam Leeser |
| 2000 | Improving the performance and efficiency of an adaptive amplification operation using configurable hardware (poster abstract). Michael J. Wirthlin, Paul S. Graham |
| 2000 | Low power digital design in FPGAs (poster abstract): a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. Andrés D. García, Jean-Luc Danger, Wayne P. Burleson |
| 2000 | New parallelization and convergence results for NC: a negotiation-based FPGA router. Pak K. Chan, Martine D. F. Schlag |
| 2000 | Novel hardware-software architecture for the recursive merge filtering algorithm (poster abstract). Piyush Jamkhandi, Amar Mukherjee, Kunal Mukherjee, Robert Franceschini |
| 2000 | Power estimation approach for SRAM-based FPGAs. Karlheinz Weiß, Carsten Oetker, Igor Katchan, Thorsten Steckstor, Wolfgang Rosenstiel |
| 2000 | Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2000, Monterey, CA, USA, February 10-11, 2000 Steve Trimberger, Scott Hauck |
| 2000 | Programmable memory blocks supporting content-addressable memory. Frank Heile, Andrew Leaver, Kerry Veenstra |
| 2000 | Real-time, frame-rate face detection on a configurable hardware system (poster abstract). Rob McCready, Jonathan Rose |
| 2000 | Reconfigurable target recognition system (poster abstract). Gábor Szedö, Sandeep Neema, Jason Scott, Ted Bapty |
| 2000 | Scalable interconnect and power distribution for island-style FPGAs (poster abstract). Herman Schmit, David Whelihan, Peter Kamarchik, Frank Gennari |
| 2000 | Synthesis and domain-specific optimization of KressArray-based reconfigurable computing engines (poster abstract). Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger |
| 2000 | Synthesis for FPGAs with embedded memory blocks. Jason Cong, Kenneth Yan |
| 2000 | Synthesizing full-systolic arrays for matrix product on Xilinx's XC4000(E, EX) FPGAs (poster abstract). Abdelkrim Kamel Oudjida, Sabrina Titri, Mustapha Hamerlain |
| 2000 | Technology mapping for k/m-macrocell based FPGAs. Jason Cong, Hui Huang, Xin Yuan |
| 2000 | Technology mapping issues for an FPGA with lookup tables and PLA-like blocks. Alireza Kaviani, Stephen Brown |
| 2000 | The John Henry Syndrome (panel session)(abstract only): humans vs. machines as FPGA designers. Herman Schmit, Ray Andraka, Philip Friedin, Satnam Singh, Tim Southgate |
| 2000 | The application of genetic algorithms to the design of reconfigurable reasoning VLSI chips. Moritoshi Yasunaga, Jung Hwan Kim, Ikuo Yoshihara |
| 2000 | The effect of LUT and cluster size on deep-submicron FPGA performance and density. Elias Ahmed, Jonathan Rose |
| 2000 | Timing-driven placement for FPGAs. Alexander Marquardt, Vaughn Betz, Jonathan Rose |
| 2000 | Tolerating operational faults in cluster-based FPGAs. Vijay Lakamraju, Russell Tessier |
| 2000 | Virtualization of FPGA via segmentation (poster abstract). William Fornaciari, Vincenzo Piuri, Luigi Ripamonti |