FMCAD B

40 papers

YearTitle / Authors
2010A framework for incremental modelling and verification of on-chip protocols.
Peter Böhm
2010A halting algorithm to determine the existence of decoder.
Shengyu Shen, Ying Qin, Jianmin Zhang, Sikun Li
2010A single-instance incremental SAT formulation of proof- and counterexample-based abstraction.
Niklas Eén, Alan Mishchenko, Nina Amla
2010Achieving earlier verification closure using advanced formal verification.
Michael Siegel
2010Applying SMT in symbolic execution of microcode.
Anders Franzén, Alessandro Cimatti, Alexander Nadel, Roberto Sebastiani, Jonathan Shalev
2010Automated formal verification of processors based on architectural models.
Ulrich Kühne, Sven Beyer, Jörg Bormann, John Barstow
2010Automatic inference of memory fences.
Michael Kuperstein, Martin T. Vechev, Eran Yahav
2010Automatic verification of estimate functions with polynomials of bounded functions.
Jun Sawada
2010Boosting minimal unsatisfiable core extraction.
Alexander Nadel
2010Boosting multi-core reachability performance with shared hash tables.
Alfons Laarman, Jaco van de Pol, Michael Weber
2010CalCS: SMT solving for non-linear convex constraints.
Pierluigi Nuzzo, Alberto Puggelli, Sanjit A. Seshia, Alberto L. Sangiovanni-Vincentelli
2010Combinational techniques for sequential equivalence checking.
Hamid Savoj, David Berthelot, Alan Mishchenko, Robert K. Brayton
2010Coping with Moore's Law (and more): Supporting arrays in state-of-the-art model checkers.
Jason Baumgartner, Michael L. Case, Hari Mony
2010DFT logic verification through property based formal methods - SOC to IP.
Lopamudra Sen, Amit Roy, Supriya Bhattacharjee, Bijitendra Mittra, Subir K. Roy
2010Dimensions in program synthesis.
Sumit Gulwani
2010Efficiently solving quantified bit-vector formulas.
Christoph M. Wintersteiger, Youssef Hamadi, Leonardo Mendonça de Moura
2010Embedded systems design - Scientific challenges and work directions.
Joseph Sifakis
2010Encoding industrial hardware verification problems into effectively propositional logic.
Moshe Emmer, Zurab Khasidashvili, Konstantin Korovin, Andrei Voronkov
2010Formal verification of an ASIC ethernet switch block.
B. A. Krishna, Anamaya Sullerey, Alok Jain
2010Formal verification of arbiters using property strengthening and underapproximations.
Gadiel Auerbach, Fady Copty, Viresh Paruthi
2010Impacting verification closure using formal analysis.
Massimo Roselli
2010Incremental component-based construction and verification using invariants.
Saddek Bensalem, Marius Bozga, Axel Legay, Thanh-Hung Nguyen, Joseph Sifakis, Rongjie Yan
2010Integrating ICP and LRA solvers for deciding nonlinear real arithmetic problems.
Sicun Gao, Malay K. Ganai, Franjo Ivancic, Aarti Gupta, Sriram Sankaranarayanan, Edmund M. Clarke
2010Large-scale application of formal verification: From fiction to fact.
Viresh Paruthi
2010Modular bug detection with inertial refinement.
Nishant Sinha
2010Modular specification and verification of interprocess communication.
Eyad Alkassar, Ernie Cohen, Mark A. Hillebrand, Hristo Pentchev
2010PINCETTE - Validating changes and upgrades in networked software.
Hana Chockler
2010Path predicate abstraction by complete interval property checking.
Joakim Urdahl, Dominik Stoffel, Jörg Bormann, Markus Wedler, Wolfgang Kunz
2010Precise static analysis of untrusted driver binaries.
Johannes Kinder, Helmut Veith
2010Predicate abstraction with adjustable-block encoding.
Dirk Beyer, M. Erkan Keremoglu, Philipp Wendler
2010Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, FMCAD 2010, Lugano, Switzerland, October 20-23
Roderick Bloem, Natasha Sharygina
2010Propelling SAT and SAT-based BMC using careset.
Malay K. Ganai
2010Relieving capacity limits on FPGA-based SAT-solvers.
Leopold Haller, Satnam Singh
2010SAT-based semiformal verification of hardware.
Sabih Agbaria, Dan Carmi, Orly Cohen, Dmitry Korchemny, Michael Lifshits, Alexander Nadel
2010SLAM2: Static driver verification with under 4% false alarms.
Thomas Ball, Ella Bounimova, Rahul Kumar, Vladimir Levin
2010Scalable and precise program analysis at NEC.
Gogul Balakrishnan, Malay K. Ganai, Aarti Gupta, Franjo Ivancic, Vineet Kahlon, Weihong Li, Naoto Maeda, Nadia Papakonstantinou, Sriram Sankaranarayanan, Nishant Sinha, Chao Wang
2010Synthesis for regular specifications over unbounded domains.
Jad Hamza, Barbara Jobstmann, Viktor Kuncak
2010Verifying SystemC: A software model checking approach.
Alessandro Cimatti, Andrea Micheli, Iman Narasamdya, Marco Roveri
2010Verifying VIA Nano microprocessor components.
Warren A. Hunt Jr.
2010Verifying shadow page table algorithms.
Eyad Alkassar, Ernie Cohen, Mark A. Hillebrand, Mikhail Kovalev, Wolfgang J. Paul