FMCAD B

30 papers

YearTitle / Authors
2008A Refinement Approach to Design and Verification of On-Chip Communication Protocols.
Peter Böhm, Tom Melham
2008A Temporal Language for SystemC.
Deian Tabakov, Gila Kamhi, Moshe Y. Vardi, Eli Singerman
2008A Theory of Mutations with Applications to Vacuity, Coverage, and Fault Tolerance.
Orna Kupferman, Wenchao Li, Sanjit A. Seshia
2008A Theory-Based Decision Heuristic for DPLL(T).
Dan Goldwasser, Ofer Strichman, Shai Fine
2008A Write-Based Solver for SAT Modulo the Theory of Arrays.
Miquel Bofill, Robert Nieuwenhuis, Albert Oliveras, Enric Rodríguez-Carbonell, Albert Rubio
2008Augmenting a Regular Expression-Based Temporal Logic with Local Variables.
Cindy Eisner, Dana Fisman
2008Automatic Formal Verification of Block Cipher Implementations.
Eric Whitman Smith, David L. Dill
2008Automatic Generation of Local Repairs for Boolean Programs.
Roopsha Samanta, Jyotirmoy V. Deshmukh, E. Allen Emerson
2008Automatic Non-Interference Lemmas for Parameterized Model Checking.
Jesse D. Bingham
2008BACH : Bounded ReAchability CHecker for Linear Hybrid Automata.
Lei Bu, You Li, Linzhang Wang, Xuandong Li
2008BackSpace: Formal Analysis for Post-Silicon Debug.
Flavio M. de Paula, Marcel Gort, Alan J. Hu, Steven J. E. Wilton, Jin Yang
2008Beyond Vacuity: Towards the Strongest Passing Formula.
Hana Chockler, Arie Gurfinkel, Ofer Strichman
2008Combining Predicate and Numeric Abstraction for Software Model Checking.
Arie Gurfinkel, Sagar Chaki
2008Consistency Checking of All Different Constraints over Bit-Vectors within a SAT Solver.
Armin Biere, Robert Brummayer
2008Formal Methods in Computer-Aided Design, FMCAD 2008, Portland, Oregon, USA, 17-20 November 2008
Alessandro Cimatti, Robert B. Jones
2008Formal Verification of Hardware Support for Advanced Encryption Standard.
Anna Slobodová
2008Going with the Flow: Parameterized Verification Using Message Flows.
Murali Talupur, Mark R. Tuttle
2008Invariant-Strengthened Elimination of Dependent State Elements.
Michael L. Case, Alan Mishchenko, Robert K. Brayton, Jason Baumgartner, Hari Mony
2008Invited Tutorial: Considerations in the Design and Verification of Microprocessors for Safety-Critical and Security-Critical Applications.
David S. Hardin
2008Machine-Code Verification for Multiple Architectures - An Application of Decompilation into Logic.
Magnus O. Myreen, Michael J. C. Gordon, Konrad Slind
2008Mechanized Information Flow Analysis through Inductive Assertions.
Warren A. Hunt Jr., Robert Bellarmine Krug, Sandip Ray, William D. Young
2008Model Checking Nash Equilibria in MAD Distributed Systems.
Federico Mari, Igor Melatti, Ivano Salvo, Enrico Tronci, Lorenzo Alvisi, Allen Clement, Harry C. Li
2008Optimal Constraint-Preserving Netlist Simplification.
Jason Baumgartner, Hari Mony, Adnan Aziz
2008Recording Synthesis History for Sequential Verification.
Alan Mishchenko, Robert K. Brayton
2008Scaling Up the Formal Verification of Lustre Programs with SMT-Based Techniques.
George Hagen, Cesare Tinelli
2008Scheduling Optimisations for SPIN to Minimise Buffer Requirements in Synchronous Data Flow.
Pieter H. Hartel, Theo C. Ruys, Marc C. W. Geilen
2008Symbolic Program Analysis Using Term Rewriting and Generalization.
Nishant Sinha
2008Trading-Off SAT Search and Variable Quantifications for Effective Unbounded Model Checking.
Gianpiero Cabodi, Paolo Camurati, Luz Amanda Garcia, Marco Murciano, Sergio Nocco, Stefano Quer
2008Verifying an Arbiter Circuit.
Chao Yan, Mark R. Greenstreet
2008Word-Level Sequential Memory Abstraction for Model Checking.
Per Bjesse