| 2007 | A Coverage Analysis for Safety Property Lists. Koen Claessen |
| 2007 | A Formal Model of Clock Domain Crossing and Automated Verification of Time-Triggered Hardware. Julien Schmaltz |
| 2007 | A Logic for GSTE. Edward Smith |
| 2007 | A Mechanized Refinement Framework for Analysis of Custom Memories. Sandip Ray, Jayanta Bhadra |
| 2007 | A Quantitative Completeness Analysis for Property-Sets. Martin Oberkönig, Martin Schickel, Hans Eveking |
| 2007 | Algorithmic Analysis of Piecewise FIFO Systems. Naghmeh Ghafari, Arie Gurfinkel, Nils Klarlund, Richard J. Trefler |
| 2007 | Analyzing Gene Relationships for Down Syndrome with Labeled Transition Graphs. Neha Rungta, Hyrum Carroll, Eric G. Mercer, Randall J. Roper, Mark J. Clement, Quinn Snell |
| 2007 | Automated Extraction of Inductive Invariants to Aid Model Checking. Michael L. Case, Alan Mishchenko, Robert K. Brayton |
| 2007 | Automatic Abstraction Refinement for Generalized Symbolic Trajectory Evaluation. Yan Chen, Yujing He, Fei Xie, Jin Yang |
| 2007 | Automatic Abstraction in Symbolic Trajectory Evaluation. Sara Adams, Magnus Björk, Thomas F. Melham, Carl-Johan H. Seger |
| 2007 | Automating Hazard Checking in Transaction-Level Microarchitecture Models. Yogesh S. Mahajan, Sharad Malik |
| 2007 | Boosting Verification by Automatic Tuning of Decision Procedures. Frank Hutter, Domagoj Babic, Holger H. Hoos, Alan J. Hu |
| 2007 | Case study: Integrating FV and DV in the Verification of the Intel Core Alon Flaisher, Alon Gluska, Eli Singerman |
| 2007 | Checking Safety by Inductive Generalization of Counterexamples to Induction. Aaron R. Bradley, Zohar Manna |
| 2007 | Circuit Level Verification of a High-Speed Toggle. Chao Yan, Mark R. Greenstreet |
| 2007 | Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs. Mohamed H. Zaki, Ghiath Al Sammane, Sofiène Tahar, Guy Bois |
| 2007 | Computing Predicate Abstractions by Integrating BDDs and SMT Solvers. Roberto Cavada, Alessandro Cimatti, Anders Franzén, Krishnamani Kalyanasundaram, Marco Roveri, R. K. Shyamasundar |
| 2007 | Cross-Entropy Based Testing. Hana Chockler, Eitan Farchi, Benny Godlin, Sergey Novikov |
| 2007 | Exploiting Resolution Proofs to Speed Up LTL Vacuity Detection for BMC. Jocelyn Simmonds, Jessica Davies, Arie Gurfinkel, Marsha Chechik |
| 2007 | Fast Minimum-Register Retiming via Binary Maximum-Flow. Aaron P. Hurst, Alan Mishchenko, Robert K. Brayton |
| 2007 | Formal Methods in Computer-Aided Design, 7th International Conference, FMCAD 2007, Austin, Texas, USA, November 11-14, 2007, Proceedings |
| 2007 | Formal Verification of Partial Good Self-Test Fencing Structures. Adrian E. Seigler, Gary A. Van Huben, Hari Mony |
| 2007 | Global Optimization of Compositional Systems. Fadi A. Zaraket, John Pape, Adnan Aziz, Margarida F. Jacome, Sarfraz Khurshid |
| 2007 | Improved Design Debugging Using Maximum Satisfiability. Sean Safarpour, Hratch Mangassarian, Andreas G. Veneris, Mark H. Liffiton, Karem A. Sakallah |
| 2007 | Induction in CEGAR for Detecting Counterexamples. Chao Wang, Aarti Gupta, Franjo Ivancic |
| 2007 | Industrial Strength SAT-based Alignability Algorithm for Hardware Equivalence Verification. Daher Kaiss, Marcelo Skaba, Ziyad Hanna, Zurab Khasidashvili |
| 2007 | Lifting Propositional Interpolants to the Word-Level. Daniel Kroening, Georg Weissenbacher |
| 2007 | Modeling Time-Triggered Protocols and Verifying Their Real-Time Schedules. Lee Pike |
| 2007 | Transaction Based Modeling and Verification of Hardware Protocols. Xiaofang Chen, Steven M. German, Ganesh Gopalakrishnan |
| 2007 | Two-Dimensional Regular Expressions for Compositional Bus Protocols. Kathi Fisler |
| 2007 | Verifying Correctness of Transactional Memories. Ariel Cohen, John W. O'Leary, Amir Pnueli, Mark R. Tuttle, Lenore D. Zuck |
| 2007 | What Triggers a Behavior? Orna Kupferman, Yoad Lustig |