FMCAD B

33 papers

YearTitle / Authors
2000A Case Study in Fomal Verification of Register-Transfer Logic with ACL2: The Floating Point Adder of the AMD Athlon
David M. Russinoff
2000A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles.
Kavita Ravi, Roderick Bloem, Fabio Somenzi
2000A Methodology for Large-Scale Hardware Verification.
Mark D. Aagaard, Robert B. Jones, Thomas F. Melham, John W. O'Leary, Carl-Johan H. Seger
2000A Methodology for the Formal Analysis of Asynchronous Micropipelines.
Antonio Cerone, George J. Milne
2000A Theory of Consistency for Modular Synchronous Systems.
Randal E. Bryant, Pankaj Chauhan, Edmund M. Clarke, Amit Goel
2000An Algorithm for Strongly Connected Component Analysis in
Roderick Bloem, Harold N. Gabow, Fabio Somenzi
2000Applications of Hierarchical Verification in Model Checking.
Robert Beers, Rajnish Ghughal, Mark D. Aagaard
2000Automated Refinement Checking for Asynchronous Processes.
Rajeev Alur, Radu Grosu, Bow-Yaw Wang
2000B2M: A Semantic Based Tool for BLIF Hardware Descriptions.
David A. Basin, Stefan Friedrich, Sebastian Mödersheim
2000Border-Block Triangular Form and Conjunction Schedule in Image Computation.
In-Ho Moon, Gary D. Hachtel, Fabio Somenzi
2000Checking Safety Properties Using Induction and a SAT-Solver.
Mary Sheeran, Satnam Singh, Gunnar Stålmarck
2000Combining Stream-Based and State-Based Verification Techniques.
Nancy A. Day, Mark D. Aagaard, Byron Cook
2000Correctness of Pipelined Machines.
Panagiotis Manolios
2000Do You Trust Your Model Checker?
Wolfgang Reif, Jürgen Ruf, Gerhard Schellhorn, Tobias Vollmer
2000Executable Protocol Specification in ESL.
Edmund M. Clarke, Steven M. German, Yuan Lu, Helmut Veith, Dong Wang
2000Formal Methods in Computer-Aided Design, Third International Conference, FMCAD 2000, Austin, Texas, USA, November 1-3, 2000, Proceedings
Warren A. Hunt Jr., Steven D. Johnson
2000Formal Verification of Floating Point Trigonometric Functions.
John Harrison
2000Hardware Modeling Using Function Encapsulation.
Jun Sawada, Warren A. Hunt Jr.
2000Model Checking Synchronous Timing Diagrams.
Nina Amla, E. Allen Emerson, Robert P. Kurshan, Kedar S. Namjoshi
2000Model Reductions and a Case Study.
Jin Hou, Eduard Cerny
2000Modeling and Parameters Synthesis for an Air Traffic Management System.
Adilson Luiz Bonifácio, Arnaldo Vieira Moura
2000Monitor-Based Formal Specification of PCI.
Kanna Shimizu, David L. Dill, Alan J. Hu
2000SAT-Based Image Computation with Application in Reachability Analysis.
Aarti Gupta, Zijiang Yang, Pranav Ashar, Anubhav Gupta
2000SAT-Based Verification without State Space Traversal.
Per Bjesse, Koen Claessen
2000Scalable Distributed On-the-Fly Symbolic Model Checking.
Shoham Ben-David, Tamir Heyman, Orna Grumberg, Assaf Schuster
2000Sequential Equivalence Checking by Symbolic Simulation.
Gerd Ritter
2000Speeding Up Image Computation by Using RTL Information.
Christoph Meinel, Christian Stangier
2000Symbolic Checking of Signal-Transition Consistency for Verifying High-Level Designs.
Kiyoharu Hamaguchi, Hidekazu Urushihara, Toshinobu Kashiwabara
2000Symbolic Simulation with Approximate Values.
Chris Wilson, David L. Dill, Randal E. Bryant
2000The Semantics of Verilog Using Transition System Combinators.
Gordon J. Pace
2000Trends in Computing.
Mark E. Dean
2000Verifying Transaction Ordering Properties in Unbounded Bus Networks through Combined Deductive/Algorithmic Methods.
Michael D. Jones, Ganesh Gopalakrishnan
2000Visualizing System Factorizations with Behavior Tables.
Alex Tsow, Steven D. Johnson