| 2017 | 2017 Forum on Specification and Design Languages, FDL 2017, Verona, Italy, September 18-20, 2017 Franco Fummi, Hiren D. Patel, Samarjit Chakraborty |
| 2017 | Actor fission transformations for executing dataflow programs on manycores. Essayas Gebrewahid, Zain Ul-Abdin |
| 2017 | Asil decomposition using SMT. Mona Safar |
| 2017 | Automatic generation of cycle-accurate Simulink blocks from hdl ips. Stefano Centomo, Michele Lora, Antonio Portaluri, Francesco Stefanni, Franco Fummi |
| 2017 | Compositional timing-aware semantics for synchronous programming. Joaquín Aguado, Michael Mendler, Jia Jie Wang, Bruno Bodin, Partha S. Roop |
| 2017 | Fault analysis in analog circuits through language manipulation and abstraction. Enrico Fraccaroli, Francesco Stefanni, Franco Fummi, Mark Zwolinski |
| 2017 | Identifying bottlenecks in manufacturing systems using stochastic criticality analysis. João Bastos, Bram van der Sanden, Olaf Donk, Jeroen Voeten, Sander Stuijk, Ramon R. H. Schiffelers, Henk Corporaal |
| 2017 | Language and hardware acceleration backend for graph processing. Andrey Mokhov, Alessandro de Gennaro, Ghaith Tarawneh, Jonny Wray, Georgy Lukyanov, Sergey Mileiko, Joe Scott, Alex Yakovlev, Andrew D. Brown |
| 2017 | Real-time ticks for synchronous programming. Reinhard von Hanxleden, Timothy Bourke, Alain Girault |
| 2017 | Rethinking of I/O-automata composition. Sarah Chabane, Rabéa Ameur-Boulifa, Mohamed Mezghiche |
| 2017 | Runtime task mapping for lifetime budgeting in many-core systems. Liang Wang, Xiaohang Wang, Ho-fung Leung, Terrence S. T. Mak |
| 2017 | Symbolic simulation of dataflow synchronous programs with timers. Guillaume Baudart, Timothy Bourke, Marc Pouzet |
| 2017 | Towards consistency checking between HDL and UPF descriptions. Arthur Kalsing, Laurent Fesquet, Chouki Aktouf |
| 2017 | Towards early validation of firmware-based power management using virtual prototypes: A constrained random approach. Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler |