FDL C

53 papers

YearTitle / Authors
2007A Case-Study in Property-Based Synthesis: Generating a Cache Controller from a Property-Set.
Martin Schickel, Martin Oberkönig, Martin Schweikert, Hans Eveking
2007A Configurable Transaction Level Model of a Generic Interconnection Part of Embedded Systems Used in an ESL Design Library.
Parisa Razaghi, Shahrzad Mirkhani, Zainalabedin Navabi
2007A Domain Specific Language for Cryptography.
Giovanni Agosta, Gerardo Pelosi
2007A Metamodeling based Framework for Architectural Modeling and Simulator Generation.
Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla
2007A complete SystemC UML profile with dynamic features for behavioral descriptions.
Sara Bocchio, Elvinia Riccobene, Alberto Rosti, Patrizia Scandurra
2007A general approach to the interoperability of HetSC and SystemC-AMS.
Fernando Herrera, Eugenio Villar, Christoph Grimm, Markus Damm, Jan Haase
2007APDL: A Processor Description Language For Design Space Exploration of Embedded Processors.
Nima Honarmand, Hasan Sohofi, Maghsoud Abbaspour, Zainalabedin Navabi
2007Algorithmic Test Generation - a New Approach to testbench Creation.
Staffan Berg
2007An Extension to VHDL-AMS for AMS Systems with Partial Differential Equations.
Leran Wang, Chenxu Zhao, Tom J. Kazmierski
2007An Integrated SystemC Debugging Environment.
Frank Rogin, Christian Genz, Rolf Drechsler, Steffen Rülke
2007Asynchronous online-monitoring of logical and temporal assertions.
Katell Morin-Allory, Laurent Fesquet, Benjamin Roustan, Dominique Borrione
2007Automatic High Level Assertion Generation and Synthesis for Embedded System Design.
Lun Li, Frank P. Coyle, Mitchell A. Thornton
2007Autometic Generation of SystemC Transactors from AsmL Specification.
Tareq Hasan Khan, Ali Habibi, Sofiène Tahar, Otmane Aït Mohamed
2007C-based System Development of Asynchronous Distributed Systems.
Mario Korte, Frank Slomka
2007CSP with Synthesisable SystemC(tm) and OSSS.
Claus Brunzema, Wolfgang Nebel
2007Combinatorial Dependencies in Transaction Level Models.
Robert Günzel, Wolfgang Klingauf, James Aldis
2007Common HDL-Matlab Simulation Environment.
Adam Milik, Andrzej Pulka
2007Compiling UML State Diagrams into VHDL: An Experiment in Using Model Driven Development.
David H. Akehurst, W. Gareth J. Howells, Klaus D. McDonald-Maier, Behzad Bordbar
2007Efficient Transient Simulation of Lossy Coupled Interconnects in Digital Communication Applications.
Thomas Uhle, Karsten Einwich, Joachim Haase
2007Forum on specification and Design Languages, FDL 2007, September 18-20, 2007, Barcelona, Spain, Proceedings
2007Granularity Issues in Transaction Level Modelling Digital Signal Processing Applications.
Sylvain Huet, Sébastien Le Nours, Olivier Pasquier, Emmanuel Casseau
2007Grid Based Fast Falsification For Bounded Property Checking.
Pradeep Kumar Nalla, Jörg Behrend, Prakash Mohan Peranandam, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel
2007How Different are Esterel and SystemC?.
Jens Brandt, Klaus Schneider
2007MARTE: UML-based Hardware Design from Modelling to Simulation.
Safouan Taha, Ansgar Radermacher, Sébastien Gérard, Jean-Luc Dekeyser
2007Mapping Actor-Oriented Models to TLM Architectures.
Jens Gladigau, Christian Haubelt, Bernhard Niemann, Jürgen Teich
2007Mapping SysML to SystemC.
Waseem Raslan, Ahmed Sameh
2007Measuring the Quality of a SystemC Testbench by using Code Coverage Techniques.
Daniel Große, Hernan Peraza, Wolfgang Klingauf, Rolf Drechsler
2007Mixed-Level Modeling Using Configurable MOS Transistor Models.
Juergen Weber, Andreas C. Lemke, Andreas Lehmler, Mario Anton, Sorin A. Huss
2007Model Transformations from a Data Parallel Formalism towards Synchronous Languages.
Huafeng Yu, Abdoulaye Gamatié, Éric Rutten, Jean-Luc Dekeyser
2007Model-driven development of embedded system on heterogeneous platforms.
Julio Cano, Natividad Martínez Madrid, Ralf Seepold, Fernando López Aguilar
2007Modeling Embedded Software Platforms with a UML Profile.
Tero Arpinen, Mikko Setälä, Petri Kukkala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen
2007Modeling Field Bus Communications for Automotive Applications.
Mohamad Alassir, Julien Denoulet, Gabriel Vasilescu, Olivier Romain, Romain Arnaud, Patrick Garda
2007Modeling of immediate vs. delayed data communications: from AADL to UML Marte.
Frédéric Mallet, Charles André, Robert de Simone
2007Modelling Alternatives for Cycle Approximate Bus TLMs.
Martin Radetzki, Rauf Salimi Khaligh
2007Non-Linear Circuit Simulation using MATLAB.
Steven P. Levitan, Jose A. Martinez, Donald M. Chiarulli
2007Proposal for a Bond Graph Based Model of Computation in SystemC-AMS.
Torsten Mähne, Alain Vachoux
2007Protocol Bus Modeling using inheritance with TLM2.0.
Hector Posadas, David Quijano, Eugenio Villar, Marcos Martínez
2007Range Arithmetics to Speed up Reachability Analysis of Analog Systems.
Darius Grabowski, Markus Olbrich, Christoph Grimm, Erich Barke
2007Repetitive Allocation Modelling with MARTE.
Pierre Boulet, Philippe Marquet, Éric Piel, Julien Taillard
2007SC2 StateCharts to SystemC: Automatic Executable Models Generation.
Marcello Mura, Marco Paolieri
2007Software Real-time Resource Modeling.
Frédéric Thomas, Sébastien Gérard, Jérôme Delatour, François Terrier
2007Statistical Modeling with VHDL-AMS.
Ernst Christen, David Bedrosian, Joachim Haase
2007SystemC workload model generation from UML for performance simulation.
Jari Kreku, Mika Hoppari, Kari Tiensyrjä, Per Andersson
2007SystemC-WMS modeling of control techniques for switching amplifiers targeting polar RF transmitters.
Tommasso Leonardi, Massimo Conti, Eva Vidal, Eduard Alarcón
2007SystemC-based Simulation of the MICAS Architecture.
Johan Lilius, Ivan Porres, Kim Sandström, Dragos Truscan
2007The Unified Models Methodology: Applications to Inkjet Printing.
Luis Baldez, Sascha de Pena, Joan Vidal
2007Time Modeling in MARTE.
Robert de Simone, Charles André
2007Timed Asynchronous Circuits Modeling using SystemC.
Cedric Koch-Hofer, Marc Renaudin
2007Towards Assertion Based Verification of Analog and Mixed Signal Designs Using PSL.
Ghiath Al Sammane, Mohamed H. Zaki, Zhi Jie Dong, Sofiène Tahar
2007Transaction Level Modelling: A reflection on what TLM is and how TLMs may be classified.
Mark Burton, James Aldis, Robert Günzel, Wolfgang Klingauf
2007Transactor-based Formal Verification of Real-time Embedded Systems.
Daniel Karlsson, Petru Eles, Zebo Peng
2007UML and SystemC - Comparison and Mapping Rules for Automatic Code Generation.
Per Andersson, Martin Höst
2007Verification of the Properties of Asynchronous Real-Time Distributed Systems using the B-Formalism.
Ayman M. Wahba, Islam A. M. El-Maddah