| 2019 | 24th IEEE European Test Symposium, ETS 2019, Baden-Baden, Germany, May 27-31, 2019 |
| 2019 | A 52 dB-SFDR 166 MHz sinusoidal signal generator for mixed-signal BIST applications in 28 nm FDSOI technology. Hani Malloug, Manuel J. Barragán, Salvador Mir |
| 2019 | A Dynamic Greedy Test Scheduler for Optimizing Probe Motion in In-Circuit Testers. Luciano Bonaria, Maurizio Raganato, Matteo Sonza Reorda, Giovanni Squillero |
| 2019 | A Functional Approach to Test and Debug of IEEE 1687 Reconfigurable Networks. Michele Portolan, Riccardo Cantoro, Ernesto Sánchez |
| 2019 | A Machine Learning-based Approach to Optimize Repair and Increase Yield of Embedded Flash Memories in Automotive Systems-on-Chip. A. Manzini, P. Inglese, L. Caldi, R. Cantero, G. Carnevale, M. Coppetta, M. Giltrelli, N. Mautone, F. Irrera, Rudolf Ullmann, Paolo Bernardi |
| 2019 | A supervised machine learning application in volume diagnosis. Yue Tian, Gaurav Veda, Wu-Tung Cheng, Manish Sharma, Huaxing Tang, Neerja Bawaskar, Sudhakar M. Reddy |
| 2019 | Alternatives to Fault Injections for Early Safety/Security Evaluations. Michele Portolan, Alessandro Savino, Régis Leveugle, Stefano Di Carlo, Alberto Bosio, Giorgio Di Natale |
| 2019 | Approximate computing design exploration through data lifetime metrics. Alessandro Savino, Michele Portolan, Régis Leveugle, Stefano Di Carlo |
| 2019 | B-open: A New Defect in Nanometer Technologies due to SADP Process. Freddy Forero, Michel Renovell, Víctor H. Champac |
| 2019 | Back-annotation of Interconnect Physical Properties for System-Level Crosstalk Modeling. Rezgar Sadeghi, Nooshin Nosrati, Katayoon Basharkhah, Zainalabedin Navabi |
| 2019 | Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs. Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty, Sung Kyu Lim |
| 2019 | Concurrent Estimation of a PLL Transfer Function by Cross-Correlation with pseudo-random Jitter. Jan Schat, Ulrich Möhlmann |
| 2019 | DFT Scheme for Hard-to-Detect Faults in FinFET SRAMs. Guilherme Cardoso Medeiros, Mottaqiallah Taouil, Moritz Fieback, Leticia Bolzani Poehls, Said Hamdioui |
| 2019 | Dependable Wireless Industrial IoT Networks: Recent Advances and Open Challenges. Fotis Foukalas, Paul Pop, Fabrice Theoleyre, Carlo Alberto Boano, Chiara Buratti |
| 2019 | Digital Built-in Self-Test for Phased Locked Loops to Enable Fault Detection. Mehmet Ince, Ender Yilmaz, Wei Fu, Joonsung Park, Krishnaswamy Nagaraj, LeRoy Winemberg, Sule Ozev |
| 2019 | Exploring Algebraic Interpolants for Rectification of Finite Field Arithmetic Circuits with Gröbner Bases. Utkarsh Gupta, Priyank Kalla, Irina Ilioaea, Florian Enescu |
| 2019 | Feature Engineering for Recycled FPGA Detection Based on WID Variation Modeling. Foisal Ahmed, Michihiro Shintani, Michiko Inoue |
| 2019 | Hardware-Based Aging Mitigation Scheme for Memory Address Decoder. Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor |
| 2019 | High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors. Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Gürsoy, Jaan Raik |
| 2019 | Hybrid Architecture for Embedded Test Compression to Process Rejected Test Patterns. Sebastian Huhn, Daniel Tille, Rolf Drechsler |
| 2019 | IJTAG Compatible Timing Monitor with Robust Self-Calibration for Environmental and Aging Variation. Ghazanfar Ali, Jerrin Pathrose, Hans G. Kerkhoff |
| 2019 | Impact of Reduced Precision in the Reliability of Deep Neural Networks for Object Detection. Fernando Fernandes dos Santos, Philippe O. A. Navaux, Luigi Carro, Paolo Rech |
| 2019 | Inter-Lock: Logic Encryption for Processor Cores Beyond Module Boundaries. Dominik Sisejkovic, Farhad Merchant, Rainer Leupers, Gerd Ascheid, Sascha Kegreiss |
| 2019 | K3 TAM Optimization for Testing 3D-SoCs using Non-Regular Time-Division-Multiplexing. Panagiotis Georgiou, Iakovos Theodosopoulos, Xrysovalantis Kavousianos |
| 2019 | LearnX: A Hybrid Deterministic-Statistical Defect Diagnosis Methodology. Soumya Mittal, R. D. Shawn Blanton |
| 2019 | Machine Learning-based Prediction of Test Power. Harshad Dhotre, Stephan Eggersglüß, Krishnendu Chakrabarty, Rolf Drechsler |
| 2019 | Model-driven AMS Test Setup Validation Tool prepared for IEEE P1687.2. Leon M. A. van de Logt, Vladimir A. Zivkovic, Ingrid H. A. van Baast |
| 2019 | Non-Adaptive Pattern Reordering to Improve Scan Chain Diagnostic Resolution. Yu Huang, Jakub Janicki, Szczepan Urban |
| 2019 | On Generating Fault Diagnosis Patterns for Designs with X Sources. Xijiang Lin, Sudhakar M. Reddy |
| 2019 | On Integrating Lightweight Encryption in Reconfigurable Scan Networks. Benjamin Thiemann, Linus Feiten, Pascal Raiola, Bernd Becker, Matthias Sauer |
| 2019 | On the Evaluation of the PIPB Effect within SRAM-based FPGAs. Corrado De Sio, Sarah Azimi, Luca Sterpone |
| 2019 | PaTran: Translation Platform for Test Pattern Program. Jung-Geun Park, Minsu Kim, Soo-Mook Moon, Sungyeol Kim, Insu Yang, Hyunsoo Jung |
| 2019 | Pinhole Defect Characterization and Fault Modeling for STT-MRAM Testing. Lizhou Wu, Siddharth Rao, Guilherme Cardoso Medeiros, Mottaqiallah Taouil, Erik Jan Marinissen, Farrukh Yasin, Sebastien Couet, Said Hamdioui, Gouri Sankar Kar |
| 2019 | Post-Silicon Validation of IEEE 1687 Reconfigurable Scan Networks. Aleksa Damljanovic, Artur Jutman, Giovanni Squillero, Anton Tsertov |
| 2019 | Power Measurement and Spectral Test of ZigBee Transmitters from 1-bit Under-sampled Acquisition. T. Vayssade, Florence Azaïs, Laurent Latorre, Francois Lefevre |
| 2019 | Revisiting Logic Locking for Reversible Computing. Nimisha Limaye, Muhammad Yasin, Ozgur Sinanoglu |
| 2019 | STAHL: A Novel Scan-Test-Aware Hardened Latch Design. Ruijun Ma, Stefan Holst, Xiaoqing Wen, Aibin Yan, Hui Xu |
| 2019 | Security in Autonomous Systems. Stefan Katzenbeisser, Ilia Polian, Francesco Regazzoni, Marc Stöttinger |
| 2019 | Symbolic Circuit Analysis under an Arc Based Timing Model. Görschwin Fey, Alberto García Ortiz |
| 2019 | Test Adapted Shielding by a Multipurpose Crosstalk Avoidance Scheme. Mahsa Akhsham, Atefesadat Seyedolhosseini, Zainalabedin Navabi |
| 2019 | Test Pattern Generator for Majority Voter based QCA Combinational Circuits targeting MMC Defect. Vaishali H. Dhare, Usha Mehta |
| 2019 | Test Solutions for High Density 3D-IC Interconnects - Focus on SRAM-on-Logic Partitioning. Imed Jani, Didier Lattard, Pascal Vivet, Jean Durupt, Sébastien Thuries, Edith Beigné |