ETS B

44 papers

YearTitle / Authors
201722nd IEEE European Test Symposium, ETS 2017, Limassol, Cyprus, May 22-26, 2017
2017A built-in self-test scheme for classifying refresh periods of DRAMs.
Chia-Ming Chang, Yong-Xiao Chen, Jin-Fu Li
2017A homogeneous framework for AMS languages instrumentation, abstraction and simulation.
Enrico Fraccaroli, Luca Piccolboni, Franco Fummi
2017A phase locking test solution for MEMS devices.
Tareq Muhammad Supon, Rashid Rashidzadeh
2017A very low cost and highly parallel DfT method for analog and mixed-signal circuits.
Baris Esen, Anthony Coyette, Nektar Xama, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen
2017Aging-aware coding scheme for memory arrays.
Mohammad Saber Golanbari, Nour Sayed, Mojtaba Ebrahimi, Mohammad Hadi Moshrefpour Esfahany, Saman Kiamehr, Mehdi Baradaran Tahoori
2017An efficient test technique to prevent scan-based side-channel attacks.
Satyadev Ahlawat, Darshit Vaghani, Virendra Singh
2017Application-aware lifetime estimation of power devices.
Ciprian V. Pop, Corneliu Burileanu, Andi Buzo, Georg Pelz
2017Automated area and coverage optimization of minimal latency checkers.
Siavoosh Payandeh Azad, Behrad Niazmand, Apneet Kaur Sandhu, Jaan Raik, Gert Jervan, Thomas Hollstein
2017Automatic testing of analog ICs for latent defects using topology modification.
Nektar Xama, Anthony Coyette, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen
2017Best paper.
Bernd Becker, Adit D. Singh
2017Bridge over troubled waters: Critical area based pattern generation.
Peter C. Maxwell, Friedrich Hapke, Maija Ryynaenen, Peter Weseloh
2017Contact-less near-field measurement of RF phased array antenna mismatches.
Maryam Shafiee, Sule Ozev
2017Counteracting malicious faults in cryptographic circuits.
Ilia Polian, Francesco Regazzoni
2017Coverage-driven mixed-signal verification of smart power ICs in a UVM environment.
Sebastian Simon, Deeksha Bhat, Alexander W. Rath, Jérôme Kirscher, Linus Maurer
2017Data-driven fault diagnosis with missing syndromes imputation for functional test through conditional specification.
Tong Guan, Zhaobo Zhang, Wen Dong, Chunming Qiao, Xinli Gu
2017Derivation of the reliability metric for digital circuits.
Mohamed A. Abufalgha, Alex Bystrov
2017Design of a sinusoidal signal generator with calibrated harmonic cancellation for mixed-signal BIST in a 28 nm FDSOI technology.
Hani Malloug, Manuel J. Barragan Asian, Salvador Mir, Laurent Basteres, Hervé Le Gall
2017Detecting hardware Trojans without a Golden IC through clock-tree defined circuit partitions.
Fakir Sharif Hossain, Tomokazu Yoneda, Michiko Inoue, Alex Orailoglu
2017Detection of resistive open and short defects in FDSOI under delay-based test: Optimal VDD and body biasing conditions.
Amit Karel, Florence Azaïs, Mariane Comte, Jean-Marc Gallière, Michel Renovell, Keshav Singh
2017Exploiting STT-MRAM for approximate computing.
Nour Sayed, Fabian Oboril, Azadeh Shirvanian, Rajendra Bishnoi, Mehdi Baradaran Tahoori
2017Extended binary nonlinear codes and their application in testing and compression.
Ondrej Novák
2017Extension of power supply impedance emulation method on ATE for multiple power domain.
Naoki Terao, Toru Nakura, Masahiro Ishida, Rimon Ikeno, Takashi Kusaka, Tetsuya Iizuka, Kunihiro Asada
2017Foreword.
Maria K. Michael, Rolf Drechsler, Stephan Eggersglüß, Haralampos-G. D. Stratigopoulos, Sybille Hellebrand, Rob Aitken
2017ISO26262-compliant soft-error mitigation in register banks.
Jan Schat
2017Impact of the switching activity on the aging of delay-PUFs.
Naghmeh Karimi, Jean-Luc Danger, Mariem Slimani, Sylvain Guilley
2017Improving the dependability of AMR sensors used in automotive applications.
Andreina Zambrano, Hans G. Kerkhoff
2017Integrated circuits' characterization for non-normal data in semiconductor quality analysis.
Ingrid Kovacs, Marina Dana Topa, Andi Buzo, Georg Pelz
2017Low power probabilistic online monitoring of systematic erroneous behaviour.
Mauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski, Daniele Rossi
2017Mitigating read & write errors in STT-MRAM memories under DVS.
Elena-Ioana Vatajelu, Rosa Rodríguez-Montañés, Michel Renovell, Joan Figueras
2017Mixed-signal BIST computation offloading using IEEE 1687.
Michele Portolan, Manuel J. Barragán, Rshdee Alhakim, Salvador Mir
2017Multiple-defect diagnosis for Logic Characterization Vehicles.
Ben Niewenhuis, Soumya Mittal, R. D. (Shawn) Blanton
2017Online Profiling for cluster-specific variable rate refreshing in high-density DRAM systems.
Rasool Sharifi, Zainalabedin Navabi
2017Periodic Bias-Temperature Instability monitoring in SRAM cells.
Yiorgos Tsiatouhas
2017Probabilistic sensitization analysis for variation-aware path delay fault test evaluation.
Marcus Wagner, Hans-Joachim Wunderlich
2017ROM fault diagnosis for O(n
Artur Pogiel, Janusz Rajski, Jerzy Tyszer
2017Real-time self-learning for control law adaptation in nonlinear systems using encoded check states.
Suvadeep Banerjee, Abhijit Chatterjee
2017Refresh frequency reduction of data stored in SSDs based on A-timer and timestamps.
Marcelino Seif, Emna Farjallah, Franck Badets, Emna Chabchoub, Christophe Layer, Jean-Marc Armani, Francis Joffre, Costin Anghel, Luigi Dilillo, Valentin Gherman
2017Rout3D: A lightweight adaptive routing algorithm for tolerating faulty vertical links in 3D-NoCs.
Amir Charif, Nacer-Eddine Zergainoh, Alexandre Coelho, Michael Nicolaidis
2017SIC pair generation in optimal time using rotatable counters.
Ioannis Voyiatzis
2017Scan chain encryption for the test, diagnosis and debug of secure circuits.
Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre, Paolo Prinetto, Marco Restifo
2017Security and trust in the analog/mixed-signal/RF domain: A survey and a perspective.
Angelos Antonopoulos, Christiana Kapatsori, Yiorgos Makris
2017Specification and verification of security in reconfigurable scan networks.
Michael A. Kochte, Matthias Sauer, Laura Rodríguez Gómez, Pascal Raiola, Bernd Becker, Hans-Joachim Wunderlich
2017Volume diagnosis data mining.
Wu-Tung Cheng, Yue Tian, Sudhakar M. Reddy