ETS B

46 papers

YearTitle / Authors
201318th IEEE European Test Symposium, ETS 2013, Avignon, France, May 27-30, 2013
2013A layout-aware x-filling approach for dynamic power supply noise reduction in at-speed scan testing.
Saman Kiamehr, Farshad Firouzi, Mehdi Baradaran Tahoori
2013A minimum MSE sensor fusion algorithm with tolerance to multiple faults.
Omid Sarbishei, Atena Roshan Fekr, Majid Janidarmian, Benjamin Nahill, Katarzyna Radecka
2013A mutual characterization based SAR ADC self-testing technique.
H.-J. Lin, Xuan-Lun Huang, Jiun-Lang Huang
2013A software-based self test of CUDA Fermi GPUs.
Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013Adaptive quality binning for analog circuits.
Ender Yilmaz, Sule Ozev, Kenneth M. Butler
2013Aggresive scan chain masking for improved diagnosis of multiple scan chain failures.
Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2013An error-detection and self-repairing method for dynamically and partially reconfigurable systems.
Matteo Sonza Reorda, Luca Sterpone, Anees Ullah
2013Analytical modeling for EVM in OFDM transmitters including the effects of IIP3, I/Q imbalance, noise, AM/AM and AM/PM distortion.
Afsaneh Nassery, Sule Ozev, Mustapha Slamani
2013Analyzing resistive-open defects in SRAM core-cell under the effect of process variability.
Elena I. Vatajelu, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2013Approximate computing: An emerging paradigm for energy-efficient design.
Jie Han, Michael Orshansky
2013Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers.
Christos Papameletis, Brion L. Keller, Vivek Chickermane, Erik Jan Marinissen, Said Hamdioui
2013BIST architecture to detect defects in tsvs during pre-bond testing.
Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras
2013Bias temperature instability analysis in SRAM decoder.
Seyab Khan, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor
2013Computing detection probability of delay defects in signal line tsvs.
Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Pascal Vivet, Marc Belleville
2013Current testing: Dead or alive?
Hans A. R. Manhaeve, Pete Harrod, Adit D. Singh, Chintan Patel, Ralf Arnolc, Davide Appello
2013Efficient fault simulation through dynamic binary translation for dependability analysis of embedded software.
Giuseppe Di Guglielmo, Davide Ferraretto, Franco Fummi, Graziano Pravadelli
2013Efficient minimization of test frequencies for linear analog circuits.
Mohand Bentobache, Ahcène Bounceur, Reinhardt Euler, Yann Kieffer, Salvador Mir
2013Efficient selection of signatures for analog/RF alternate test.
Manuel J. Barragan Asian, Gildas Léger
2013Efficient system-level testing and adaptive tuning of MIMO-OFDM wireless transmitters.
Shyam Kumar Devarakond, Debashis Banerjee, Aritra Banerjee, Shreyas Sen, Abhijit Chatterjee
2013Error-correction schemes with erasure information for fast memories.
Samuel Evain, Valentin Gherman
2013Experimental evaluation of thread distribution effects on multiple output errors in GPUs.
Paolo Rech, Caroline Aguiar, Christopher Frost, Luigi Carro
2013Extracting device-parameter variations using a single sensitivity-configurable ring oscillator.
Yuma Higuchi, Kenichi Shinkai, Masanori Hashimoto, Rahul M. Rao, Sani R. Nassif
2013Generation of compact multi-cycle diagnostic test sets.
Irith Pomeranz
2013Hybrid 3D pre-bonding test framework design.
Unni Chandran, Dan Zhao, Rathish Jayabharathi
2013Implementing model redundancy in predictive alternate test to improve test confidence.
Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Olivier Potin, Michel Renovell
2013Information-theoretic syndrome and root-cause analysis for guiding board-level fault diagnosis.
Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu
2013M-S test based on specification validation using octrees in the measure space.
Álvaro Gómez-Pau, Luz Balado, Joan Figueras
2013Magical thinking applied to test engineering reality (and vice versa).
Jeff Rearick
2013New test compression scheme based on low power BIST.
Jerzy Tyszer, Michal Filipek, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski
2013Novel approach to reduce power droop during scan-based logic BIST.
Martin Omaña, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, R. Galivache
2013On combining alternate test with spatial correlation modeling in analog/RF ICs.
Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris
2013Optimization for timing-speculated circuits by redundancy addition and removal.
Yuxi Liu, Rong Ye, Feng Yuan, Qiang Xu
2013Outlook for many-core systems: Cloudy with a chance of virtualization.
Nikil D. Dutt
2013Panel session what is the electronics industry doing to win the battle against the expected scary failure rates in future technology nodes?
Said Hamdioui, Davide Appello, Arnaud Grasset, Xinli Gu, Bram Kruseman, Riccardo Mariani, Hermann Obermeir, Srikanth Venkataraman
2013PinPoint: An algorithm for enhancing diagnostic resolution using capture cycle power information.
Seetal Potluri, Satya Trinadh, Roopashree Baskaran, Nitin Chandrachoodan, V. Kamakoti
2013RF BIST and test strategy for the receive part of an RF transceiver in CMOS technology.
Christophe Kelma, Sébastien Darfeuille, Andreas Neuburger, Andreas Lobnig
2013Reconciling the IC test and security dichotomy.
Ozgur Sinanoglu, Naghmeh Karimi, Jeyavijayan Rajendran, Ramesh Karri, Yier Jin, Ke Huang, Yiorgos Makris
2013Reducing power dissipation in memory repair for high defect densities.
Panagiota Papavramidou, Michael Nicolaidis
2013Robust optimization of test-architecture designs for core-based SoCs.
Sergej Deutsch, Krishnendu Chakrabarty
2013Run-time detection of hardware Trojans: The processor protection unit.
Jeremy Dubeuf, David Hély, Ramesh Karri
2013Scan pattern retargeting and merging with reduced access time.
Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
2013Semiconductor failure modes and mitigation for critical systems embedded tutorial.
Hans A. R. Manhaeve, Esko Mikkola
2013Test generation for circuits with embedded memories using SMT.
Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram
2013Utilizing circuit structure for scan chain diagnosis.
Wei-Hen Lo, Ang-Chih Hsieh, Chien-Ming Lan, Min-Hsien Lin, TingTing Hwang
2013Variability-aware and fault-tolerant self-adaptive applications for many-core chips.
Gilles Bizot, Fabien Chaix, Nacer-Eddine Zergainoh, Michael Nicolaidis