| 2011 | 16th European Test Symposium, ETS 2011, Trondheim, Norway, May 23-27, 2011 |
| 2011 | A Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing. Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Ernesto Sánchez, Mauricio de Carvalho, Matteo Sonza Reorda |
| 2011 | A Hardware-Based Approach for Fault Detection in RTOS-Based Embedded Systems. Dhiego Silva, Kleber Stangherlin, Letícia Maria Veiras Bolzani, Fabian Vargas |
| 2011 | A Low-Cost Emulation System for Fast Co-verification and Debug. Jorge Luis Lagos-Benites, Michelangelo Grosso, Luca Sterpone, Matteo Sonza Reorda, G. Audisio, M. Pipponzi, Marco Sabatini |
| 2011 | A Mixed-Signal Test Bus and Analog BIST with 'Unlimited' Time and Voltage Resolution. Stephen K. Sunter, Aubin Roy |
| 2011 | A Novel SRAM-Cell Based Input Vector Monitoring Concurrent BIST Architecture. Ioannis Voyiatzis, Costas Efstathiou, Hera Antonopoulou |
| 2011 | A Pre- and Post-bond Self-Testing and Calibration Methodology for SAR ADC Array in 3-D CMOS Imager. Xuan-Lun Huang, Ping-Ying Kang, Jiun-Lang Huang, Yung-Fa Chou, Yung-Pin Lee, Ding-Ming Kwai |
| 2011 | A Robust Metric for Screening Outliers from Analogue Product Manufacturing Tests Responses. Shaji Krishnan, Hans G. Kerkhoff |
| 2011 | AVF Analysis Acceleration via Hierarchical Fault Pruning. Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
| 2011 | Accelerating RTL Fault Simulation through RTL-to-TLM Abstraction. Nicola Bombieri, Franco Fummi, Valerio Guarnieri |
| 2011 | An Approach for Quantifying Path Correlation in Digital Circuits without any Path or Segment Enumeration. Stelios Neophytou, Kyriakos Christou, Maria K. Michael |
| 2011 | Analysis and Mitigation of Electromigration in RF Circuits: An LNA Case Study. Ramachandran Venkatasubramanian, Doohwang Chang, Sule Ozev |
| 2011 | Constraint-Based Hierarchical Untestability Identification for Synchronous Sequential Circuits. Jaan Raik, Anna Rannaste, Maksim Jenihhin, Taavi Viilukas, Raimund Ubar, Hideo Fujiwara |
| 2011 | Critical Fault-Based Pattern Generation for Screening SDDs. Fang Bao, Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, LeRoy Winemberg, Mohammad Tehranipoor |
| 2011 | DfT Architecture for 3D-SICs with Multiple Towers. Chun-Chuan Chi, Erik Jan Marinissen, Sandeep Kumar Goel, Cheng-Wen Wu |
| 2011 | Diagnosis of Failing Scan Cells through Orthogonal Response Compaction. Brady Benware, Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer |
| 2011 | Dual Edge Triggered Flip-Flops for Noise Aware Design. Yukiya Miura |
| 2011 | Dynamic Test Set Selection Using Implication-Based On-Chip Diagnosis. Nuno Alves, Yiwen Shi, Nicholas Imbriglia, Jennifer Dworak, Kundan Nepal, R. Iris Bahar |
| 2011 | Efficient Fault Detection Architecture Design of Latch-Based Low Power DSP/MCU Processor. Hai Yu, Michael Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh |
| 2011 | Enhancement of Clock Delay Faults Testing. Yoshinobu Higami, Hiroshi Takahashi, Shin-ya Kobayashi, Kewal K. Saluja |
| 2011 | Extraction of EVM from Transmitter System Parameters. Afsaneh Nassery, Sule Ozev, Marian Verhelst, Mustapha Slamani |
| 2011 | F-Scan Test Generation Model for Delay Fault Testing at RTL Using Standard Full Scan ATPG. Marie Engelene J. Obien, Satoshi Ohtake, Hideo Fujiwara |
| 2011 | FPGA Soft Error Recovery Mechanism with Small Hardware Overhead. Uros Legat, Anton Biasizzo, Franc Novak |
| 2011 | Fast and Accurate DPPM Computation Using Model Based Filtering. Ender Yilmaz, Sule Ozev |
| 2011 | Fault Masking and Diagnosis in Reversible Circuits. Masoud Zamani, Navid Farazmand, Mehdi Baradaran Tahoori |
| 2011 | High-Performance Diagnostic Fault Simulation on GPUs. Min Li, Michael S. Hsiao |
| 2011 | I-BIRAS: Interconnect Built-In Self-Repair and Adaptive Serialization in 3D Integrated Systems. Michael Nicolaidis, Vladimir Pasca, Lorena Anghel |
| 2011 | Improved DFT for Testing Power Switches. S. Saqib Khursheed, Sheng Yang, Bashir M. Al-Hashimi, Xiaoyu Huang, David Flynn |
| 2011 | Improving Reliability in NoCs by Application-Specific Mapping Combined with Adaptive Fault-Tolerant Method in the Links. Anelise Kologeski, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt |
| 2011 | Input/Output Pad for Direct Contact and Contactless Testing. Mauro Scandiuzzo, Salvatore Cani, Luca Perugini, Simone Spolzino, Roberto Canegallo, Luca Perilli, Roberto Cardu, Eleonora Franchi, C. Gozzi, F. Maggioni |
| 2011 | Latency Analysis for Sequential Circuits. Alexander Finder, André Sülflow, Görschwin Fey |
| 2011 | Layer Redundancy Based Yield Improvement for 3D Wafer-to-Wafer Stacked Memories. Mottaqiallah Taouil, Said Hamdioui |
| 2011 | Memory Optimized Two-Stimuli INL Test Method for DAC-ADC Pairs. Esa Korhonen, Juha Kostamovaara |
| 2011 | Memory Test Optimization for Parasitic Bit Line Coupling in SRAMs. Sandra Irobi, Zaid Al-Ars, Said Hamdioui |
| 2011 | On High-Quality Test Pattern Selection and Manipulation. Feng Yuan, Xiao Liu, Qiang Xu |
| 2011 | On Transition Fault Diagnosis Using Multicycle At-Speed Broadside Tests. Irith Pomeranz |
| 2011 | Online Univariate Outlier Detection in Final Test: A Robust Rolling Horizon Approach. Harm C. M. Bossers, Johann L. Hurink, Gerard J. M. Smit |
| 2011 | Optimization of Assertion Placement in Time-Constrained Embedded Systems. Viacheslav Izosimov, Michele Lora, Graziano Pravadelli, Franco Fummi, Zebo Peng, Giuseppe Di Guglielmo, Masahiro Fujita |
| 2011 | Power Aware Post-manufacture Tuning of Analog Nanocircuits. Aritra Banerjee, Subho Chatterjee, Azad Naeemi, Abhijit Chatterjee |
| 2011 | Ranking of Suspect Faulty Blocks Using Dataflow Analysis and Dempster-Shafer Theory for the Diagnosis of Board-Level Functional Failures. Hongxia Fang, Zhiyuan Wang, Xinli Gu, Krishnendu Chakrabarty |
| 2011 | Reduced ATE Interface for High Test Data Compression. Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer |
| 2011 | Revisiting Application-Dependent Test for FPGA Devices. Alessandro Cilardo, Carmelo Lofiego, Antonino Mazzeo, Nicola Mazzocca |
| 2011 | Scan Attacks and Countermeasures in Presence of Scan Response Compactors. Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre |
| 2011 | Signature Analysis for Testing, Diagnosis, and Repair of Multi-mode Power Switches. Zhaobo Zhang, Xrysovalantis Kavousianos, Yan Luo, Yiorgos Tsiatouhas, Krishnendu Chakrabarty |
| 2011 | Signature Testing and Diagnosis of High Precision S? ADC Dynamic Specifications Using Model Parameter Estimation. Sehun Kook, Aritra Banerjee, Abhijit Chatterjee |
| 2011 | Structural In-Field Diagnosis for Random Logic Circuits. Alejandro Cook, Melanie Elm, Hans-Joachim Wunderlich, Ulrich Abelein |
| 2011 | Structural Test for Graceful Degradation of NoC Switches. Atefe Dalirsani, Stefan Holst, Melanie Elm, Hans-Joachim Wunderlich |
| 2011 | Temperature-Variation-Aware Test Pattern Optimization. Tomokazu Yoneda, Makoto Nakao, Michiko Inoue, Yasuo Sato, Hideo Fujiwara |
| 2011 | Timing Vulnerability Factors of Ultra Deep-sub-micron CMOS. Massoud Mokhtarpour Ghahroodi, Mark Zwolinski, Rick Wong, Shi-Jie Wen |
| 2011 | Toggle-Based Masking Scheme for Clustered Unknown Response Bits. Ozgur Sinanoglu |
| 2011 | Tomographic Testing and Validation of Probabilistic Circuits. Alexandru Paler, Armin Alaghi, Ilia Polian, John P. Hayes |
| 2011 | Towards Variation-Aware Test Methods. Ilia Polian, Bernd Becker, Sybille Hellebrand, Hans-Joachim Wunderlich, Peter C. Maxwell |
| 2011 | Viterbi-Based Efficient Test Data Compression. Dongsoo Lee, Kaushik Roy |