| 2010 | 15th European Test Symposium, ETS 2010, Prague, Czech Republic, May 24-28, 2010 |
| 2010 | A Built-In Self-Test scheme for high speed I/O using cycle-by-cycle edge control. HyunJin Kim, Jaeyong Chung, Jacob A. Abraham, Eonjo Byun, Cheol-Jong Woo |
| 2010 | A diagnostic test generation system and a coverage metric. Yu Zhang, Vishwani D. Agrawal |
| 2010 | A distributed architecture to check global properties for post-silicon debug. Erik Larsson, Bart Vermeulen, Kees Goossens |
| 2010 | A low-cost and scalable test architecture for multi-core chips. Chun-Chuan Chi, Cheng-Wen Wu, Jin-Fu Li |
| 2010 | A low-cost built-in self-test scheme for an array of memories. Yu-Jen Huang, Che-Wei Chou, Jin-Fu Li |
| 2010 | A multi-mode MEMS sensor design to support system test and health & usage monitoring applications. Zhou Xu, Andrew Richardson, Lijie Li, Mark L. Begbie, D. Koltsov, Changhai Wang |
| 2010 | A new built-in IDDQ testing method using programmable BICS. Samed Maltabas, Osman Kubilay Ekekon, Martin Margala |
| 2010 | A reconfigurable online BIST for combinational hardware using digital neural networks. S. Behdad Hosseini, Ali Shahabi, Hasan Sohofi, Zainalabedin Navabi |
| 2010 | A shared BIST optimization methodology for memory test. Lilia Zaourar, Jihane Alami Chentoufi, Yann Kieffer, Arnaud Wenzel, Frederic Grandvaux |
| 2010 | A software-based self-test methodology for system peripherals. Michelangelo Grosso, Wilson J. Pérez H., Danilo Ravotto, Edgar E. Sánchez, Matteo Sonza Reorda, Jaime Velasco-Medina |
| 2010 | A transient error tolerant self-timed asynchronous architecture. Masoud Zamani, Mehdi Baradaran Tahoori |
| 2010 | A two-layer SPICE model of the ATMEL TSTAC Pierre-Didier Mauroux, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Benoît Godard, Gilles Festes, Laurent Vachez |
| 2010 | Adaptive test directions. Peter C. Maxwell |
| 2010 | Add-on blocks and algorithms for improving stimulus compression. Nader Alawadhi, Ozgur Sinanoglu, Mohammed Al-Mulla |
| 2010 | Algorithm-based fault tolerance for many-core architectures. Claus Braun, Hans-Joachim Wunderlich |
| 2010 | An adaptive tester architecture for volume diagnosis. Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda |
| 2010 | An integrated flow for the design of hardened circuits on SRAM-based FPGAs. Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Niccolò Battezzati, Luca Sterpone, Massimo Violante |
| 2010 | Analysis of resistive-bridging defects in SRAM core-cells: A comparative study from 90nm down to 40nm technology nodes. Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
| 2010 | Automated conformance evaluation of SystemC designs using timed automata. Paula Herber, Marcel Pockrandt, Sabine Glesner |
| 2010 | Calibration-enabled scalable built-in current sensor compatible with very low cost ATE. Sachin Dileep Dasnurkar, Jacob A. Abraham |
| 2010 | Combining scan and trace buffers for enhancing real-time observability in post-silicon debugging. Ho Fai Ko, Nicola Nicolici |
| 2010 | Computing the detection of Small Delay Defects caused by resistive opens of nanometer ICs. Jose Luis Garcia-Gervacio, Víctor H. Champac |
| 2010 | Configurable fault-tolerant link for inter-die communication in 3D on-chip networks. Vladimir Pasca, Lorena Anghel, Claudia Rusu, Mounir Benabdenbi |
| 2010 | Constructing augmented time compactors. Emil Gizdarski |
| 2010 | Current-based testable design of level shifters in liquid crystal display drivers. Masaki Hashizume, Kazuya Nakaminami, Hiroyuki Yotsuyanagi, Yukinori Nakajima, Kozo Kinoshita |
| 2010 | Defect filter for alternate RF test. Haralampos-G. D. Stratigopoulos, Salvador Mir, Erkan Acar, Sule Ozev |
| 2010 | Defect-aware nanocrossbar logic mapping using Bipartite Subgraph Isomorphism & canonization. Sezer Gören, H. Fatih Ugurdag, Okan Palaz |
| 2010 | Design and implementation of Automatic Test Equipment IP module. S. Fransi, G. L. Farre, L. Garcia-Deiros, Salvador Manich |
| 2010 | Diagnosis of failing scan cells through orthogonal response compaction. Brady Benware, Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer |
| 2010 | Diagnosis of full open defects in interconnect lines with fan-out. Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman |
| 2010 | Evaluation of concurrent error detection techniques on the Advanced Encryption Standard. Kaouthar Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre |
| 2010 | Fast simulation based testing of anti-tearing mechanisms for small embedded systems. Johannes Loinig, Christian Steger, Reinhold Weiss, Ernst Haselsteiner |
| 2010 | Full-circuit SPICE simulation based validation of dynamic delay estimation. Ke Peng, Yu Huang, Pinki Mallick, Wu-Tung Cheng, Mohammad Tehranipoor |
| 2010 | Hybrid test application in hybrid delay scan design. Yuki Yoshikawa, Tomomi Nuwa, Hideyuki Ichihara, Tomoo Inoue |
| 2010 | Improving CNF representations in SAT-based ATPG for industrial circuits using BDDs. Daniel Tille, Stephan Eggersglüß, Rene Krenz-Baath, Jürgen Schlöffel, Rolf Drechsler |
| 2010 | Increasing reliability of programmable mixed-signal systems by applying design diversity redundancy. Gabriel de M. Borges, Luiz Fernando Gonçalves, Tiago R. Balen, Marcelo Lubaszewski |
| 2010 | Input test data volume reduction based on test vector chains. Irith Pomeranz, Sudhakar M. Reddy |
| 2010 | Invited talk: Self-aware wireless communication and signal processing systems: Real-time adaptation for error resilience, low power and performance. Abhijit Chatterjee |
| 2010 | Low-cost signature test of RF blocks based on envelope response analysis. Manuel J. Barragan Asian, Rafaella Fiorelli, Diego Vázquez, Adoración Rueda, José Luis Huertas |
| 2010 | Microprocessor fault-tolerance via on-the-fly partial reconfiguration. Stefano Di Carlo, Andrea Miele, Paolo Prinetto, Antonio Trapanese |
| 2010 | Modified T-Flip-Flop based scan cell for RAS. Raghavendra Adiga, Gandhi Arpit, Virendra Singh, Kewal K. Saluja, Adit D. Singh |
| 2010 | Multiple fault diagnosis in crossbar nano-architectures. Navid Farazmand, Mehdi Baradaran Tahoori |
| 2010 | Multivariate model for test response analysis. Shaji Krishnan, Hans G. Kerkhoff |
| 2010 | New scan-based test strategy for a dependable many-core processor using a NoC as a Test Access Mechanism. Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen |
| 2010 | Novel built-in methodology for defect testing of capacitor oxide in SAR analog to digital converters for critical automotive applications. Vezio Malandruccolo, Mauro Ciappa, Wolfgang Fichtner, Hubert Rothleitner |
| 2010 | On estimation of NBTI-Induced delay degradation. Mitsumasa Noda, Seiji Kajihara, Yasuo Sato, Kohei Miyase, Xiaoqing Wen, Yukiya Miura |
| 2010 | On measurement uncertainty of ADC nonlinearities in oscillation-based test. Peter Mrak, Anton Biasizzo, Franc Novak |
| 2010 | On the cost-effectiveness of matching repositories of pre-tested wafers for wafer-to-wafer 3D chip stacking. Jouke Verbree, Erik Jan Marinissen, Philippe Roussel, Dimitrios Velenis |
| 2010 | On the use of standard digital ATE for the analysis of RF signals. Nicolas Pous, Florence Azaïs, Laurent Latorre, Jochen Rivoir |
| 2010 | Parametric failure analysis of embedded SRAMs using fast & accurate dynamic analysis. Elena I. Vatajelu, Georgios Panagopoulos, Kaushik Roy, Joan Figueras |
| 2010 | Pipelined parallel test structure for mixed-signal SoCs. Yang Jin, Hong Wang, Zhengliang Lv, Shiyuan Yang |
| 2010 | Plenary presentations: Keynote: The product complexity and test - How product complexity impacts test industry. Michael Campbell |
| 2010 | Predicting dynamic specifications of ADCs with a low-quality digital input signal. Xiaoqin Sheng, Vincent Kerzerho, Hans G. Kerkhoff |
| 2010 | Production test challenges for highly integrated mobile phone SOCs - A case study. Frank Poehl, Frank Demmerle, Juergen Alt, Hermann Obermeir |
| 2010 | Reconfigurable Concurrent Error Detection adaptive to dynamicity of power constraints. Sobeeh Almukhaizim, Sara Bunian, Ozgur Sinanoglu |
| 2010 | Robustness evaluation and improvements under laser-based fault attacks of an AES crypto-processor implemented on a SRAM-based FPGA. Gaetan Canivet, P. Maistn, Régis Leveugle, Frédéric Valette, Jessy Clédière, Marc Renaudin |
| 2010 | Scan based speed-path debug for a microprocessor. Jing Zeng, Ruifeng Guo, Wu-Tung Cheng, Michael Mateja, Jing Wang, Kun-Han Tsai, Ken Amstutz |
| 2010 | Scan cell reordering to minimize peak power during test cycle: A graph theoretic approach. Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara |
| 2010 | Sensors for built-in alternate RF test. Louay Abdallah, Haralampos-G. D. Stratigopoulos, Christophe Kelma, Salvador Mir |
| 2010 | Setting test conditions for improving SRAM reliability. Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
| 2010 | Test of embedded analog circuits based on a built-in current sensor. Román Mozuelos, Yolanda Lechuga, Mar Martínez, Salvador Bracho |
| 2010 | Test pattern selection to optimize delay test quality with a limited size of test set. Michiko Inoue, Akira Taketani, Tomokazu Yoneda, Hiroshi Iwata, Hideo Fujiwara |
| 2010 | Test power reduction in compression-based reconfigurable scan architectures. Sobeeh Almukhaizim, Mohammad Gh. Mohammad, Mohammad Khajah |
| 2010 | Test-architecture optimization for TSV-based 3D stacked ICs. Brandon Noia, Sandeep Kumar Goel, Krishnendu Chakrabarty, Erik Jan Marinissen, Jouke Verbree |