| 2011 | 10-Gigabit Throughput and Low Area for a Hardware Implementation of the Advanced Encryption Standard. Paolo Maistri, Régis Leveugle |
| 2011 | 14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland |
| 2011 | A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs. Xin Xin, Jens-Peter Kaps, Kris Gaj |
| 2011 | A Cost Effective Centralized Adaptive Routing for Networks-on-Chip. Ran Manevich, Israel Cidon, Avinoam Kolodny, Isask'har Walter, Shmuel Wimer |
| 2011 | A Design Method for Programmable Two-Variable Discrete Function Generators Using Spline and Bilinear Interpolations. Satoru Nakano, Yoichi Wakaba, Shinobu Nagayama, Shin'ichi Wakabayashi |
| 2011 | A Fast Congestion-Aware Flow Control Mechanism for ID-Based Networks-on-Chip with Best-Effort Communication. Haoyuan Ying, Ashok Jaiswal, Thomas Hollstein, Klaus Hofmann |
| 2011 | A Module for Packet Hijacking in NetFPGA Platform. Alfio Lombardo, Carla Panarello, Diego Reforgiato Recupero, Enrico Santagati, Giovanni Schembra |
| 2011 | A Non-Intrusive Online FPGA Test Scheme Using a Hardwired Network on Chip. Muhammad Aqeel Wahlah, Kees Goossens |
| 2011 | A Novel Architecture for Scalable, High Throughput, Multi-standard LDPC Decoder. Muhammad Awais, Ashwani Singh, Emmanuel Boutillon, Guido Masera |
| 2011 | A Novel Architecture of Implementing Error Detecting AES Using PRNS. Junfeng Chu, Mohammed Benaissa |
| 2011 | A Parallel Ray Tracing Architecture Suitable for Application-Specific Hardware and GPGPU Implementations. Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França, Lech Józwiak |
| 2011 | A Process-Variation-Adaptive Network-on-Chip with Variable-Cycle Routers. Yohei Nakata, Yukihiro Takeuchi, Hiroshi Kawaguchi, Masahiko Yoshimoto |
| 2011 | A Scalable Distributed Asynchronous Control Network for High Level Synthesis of Digital Circuits. Tom Van Leeuwen, Rene van Leuken |
| 2011 | A Technique for Accelerating Injection of Transient Faults in Complex SoCs. Alireza Rohani, Hans G. Kerkhoff |
| 2011 | A Unified Architecture for BCD and Binary Adder/Subtractor. Chetan Kumar V., P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas |
| 2011 | A Unified Execution Model for Data-Driven Applications on a Composable MPSoC. Ashkan Beyranvand Nejad, Anca Mariana Molnos, Kees Goossens |
| 2011 | A Unified Multiply/Accumulate Unit for Pairing-Based Cryptography over Prime, Binary and Ternary Fields. Tobias Vejda, Johann Großschädl, Dan Page |
| 2011 | A Wearable Intelligent System for the Health of Expectant Mom's and of Their Children. Giovanni Danese, Francesco Leporati, Alessandra Majani, Giulia Matrone, Enrico Merlino |
| 2011 | Adaptive Temperature-Aware SoC Test Scheduling Considering Process Variation. Nima Aghaee, Zebo Peng, Petru Eles |
| 2011 | An Embedded Video Sensor for a Smart Traffic Light. Guido Matrella, Davide Marani |
| 2011 | An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating. Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui, Praveen Raghavan, Francky Catthoor |
| 2011 | An Enhanced Path Delay Fault Simulator for Combinational Circuits. Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas |
| 2011 | An Environment for (re)configuration and Execution Managenment of Flexible Radio Platforms. Pierre-Henri Horrein, Christine Hennebert, Frédéric Pétrot |
| 2011 | An FPGA Implementation of the ZUC Stream Cipher. Paris Kitsos, Nicolas Sklavos, Athanassios N. Skodras |
| 2011 | An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion. Tevfik Zafer Ozcan, Cagla Cakir, Mert Cetin, Ilker Hamzaoglu |
| 2011 | Analyzing Area Penalty of 32-Bit Fault Tolerant ALU Using BCH Code. Vahid Khorasani, Bijan Vosoughi Vahdat, Mohammad Mortazavi |
| 2011 | Architectures for Fast Modular Multiplication. Ahmet Aris, Siddika Berna Örs, Gökay Saldamli |
| 2011 | Automated Design Debugging in a Testbench-Based Verification Environment. Mehdi Dehbashi, André Sülflow, Görschwin Fey |
| 2011 | Automatic Interface Generation for Component Reuse in HW-SW Partitioning. Nicola Bombieri, Franco Fummi, Sara Vinco, Davide Quaglia |
| 2011 | Binary-to-RNS Conversion Units for moduli {2^n ± 3}. Pedro Miguens Matutino, Ricardo Chaves, Leonel Sousa |
| 2011 | Breaking Hitag2 with Reconfigurable Hardware. Petr Stembera, Martin Novotný |
| 2011 | Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles. Richard Ruzicka, Václav Simek |
| 2011 | Comparison of Different Thread Scheduling Strategies for Asymmetric Chip MultiThreading Architectures in Embedded Systems. Charly Bechara, Nicolas Ventroux, Daniel Etiemble |
| 2011 | Compatibility Study of Compile-Time Optimizations for Power and Reliability. Ghazaleh Nazarian, Christos Strydis, Georgi Gaydadjiev |
| 2011 | Compiling Esterel for Multi-core Execution. Simon Yuan, Li Hsien Yoong, Partha S. Roop |
| 2011 | Control-Flow-Driven Source Level Timing Annotation for Embedded Software Models on Transaction Level. Daniel Mueller-Gritschneder, Kun Lu, Ulf Schlichtmann |
| 2011 | Cost of Sparse Mesh Layouts Supporting Throughput Computing. Martti Forsell, Ville Leppänen, Martti Penttonen |
| 2011 | Cryptographic Contests: Toward Fair and Comprehensive Benchmarking of Cryptographic Algorithms in Hardware (Abstract). Kris Gaj |
| 2011 | Design of Asynchronous Circuits on FPGAs for Soft Error Tolerance. Yu Bai, Weidong Kuang |
| 2011 | Design of Fault Tolerant Network Interfaces for NoCs. Leandro Fiorin, Laura Micconi, Mariagiovanna Sami |
| 2011 | Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder. Jiaoyan Chen, Dilip P. Vasudevan, Emanuel M. Popovici, Michel P. Schellekens |
| 2011 | Designing Robust Asynchronous Circuits Based on FinFET Technology. Fataneh Jafari, Mahdi Mosaffa, Siamak Mohammadi |
| 2011 | Dynamic Flow Reconfiguration Strategy to Avoid Communication Hot-Spots. Romain Prolonge, Fabien Clermidy, Leonel Tedesco, Fernando Moraes |
| 2011 | Dynamic Power Estimation for Motion Estimation Hardware. Caglar Kalaycioglu, Ilker Hamzaoglu |
| 2011 | Dynamic Soft Error Hardening via Joint Body Biasing and Dynamic Voltage Scaling. Farshad Firouzi, Amir Yazdanbakhsh, Hamed Dorosti, Sied Mehdi Fakhraie |
| 2011 | Efficient CRT RSA with SCA Countermeasures. Apostolos P. Fournaris, Odysseas G. Koufopavlou |
| 2011 | Efficient Fault Simulation of SystemC Designs. Weiyun Lu, Martin Radetzki |
| 2011 | Embedded System for Camera-Based TV Power Reduction. Choong Geun Lee, Vasily G. Moshnyaga, Koji Hashimoto |
| 2011 | Energy Behaviour of NUCA Caches in CMPs. Alessandro Bardine, Pierfrancesco Foglia, Francesco Panicucci, Marco Solinas, Julio Sahuquillo |
| 2011 | Enhancing Performance Sustainability of Fault Tolerant Routing Algorithms in NoC-Based Architectures. Khalid Latif, Amir-Mohammad Rahmani, Kameswar Rao Vaddina, Tiberiu Seceleanu, Pasi Liljeberg, Hannu Tenhunen |
| 2011 | Evaluation of Fault-Tolerant Routing Methods for NoC Architectures. Mojtaba Valinataj |
| 2011 | Exploiting Inter and Intra Application Dynamism to Save Energy. Martijn Koedam, Sander Stuijk, Henk Corporaal |
| 2011 | FBMC and GFDM Interference Cancellation Schemes for Flexible Digital Radio PHY Design. Rohit Datta, Gerhard P. Fettweis, Zsolt Kollár, Péter Horváth |
| 2011 | Faster Processor Allocation Algorithms for Mesh-Connected CMPs. Luka B. Daoud, Mohamed El-Sayed Ragab, Victor Goulart |
| 2011 | Fault Models Usability Study for On-line Tested FPGA. Jaroslav Borecký, Martin Kohlík, Pavel Kubalík, Hana Kubátová |
| 2011 | Fault Tolerance of Multiple Logic Faults in SRAM-Based FPGA Systems. Farid Lahrach, Abderrahim Doumar, Eric Châtelet |
| 2011 | Formal Modeling of Multicast Communication in 3D NoCs. Maryam Kamali, Luigia Petre, Kaisa Sere, Masoud Daneshtalab |
| 2011 | Generalized If-Then-Else Operator for Compact Polynomial Representation of Multi Output Functions. Ilya Levin, Osnat Keren |
| 2011 | HDL-Mutation Based Simulation Data Generation by Propagation Guided Search. Tao Xie, Wolfgang Müller, Florian Letombe |
| 2011 | HMMER Performance Model for Multicore Architectures. Sebastián Isaza, Ernst Houtgast, Georgi Gaydadjiev |
| 2011 | Hardware Implementation of a Flexible Tag Platform for Passive RFID Devices. Thomas Plos, Martin Feldhofer |
| 2011 | Hardware Reuse in Modern Application-Specific Processors and Accelerators. Alexandre Solon Nery, Lech Józwiak, Menno Lindwer, Mauro Cocco, Nadia Nedjah, Felipe M. G. França |
| 2011 | Higher-Order Abstraction in Hardware Descriptions with C?aSH. Marco Gerards, Christiaan Baaij, Jan Kuper, Matthijs Kooijman |
| 2011 | How a Symmetry Metric Assists Side-Channel Evaluation - A Novel Model Verification Method for Power Analysis. Annelie Heuser, Michael Kasper, Werner Schindler, Marc Stöttinger |
| 2011 | Human++: Key Challenges and Trade-offs in Embedded System Design for Personal Health Care (Abstract). Harmke de Groot |
| 2011 | Human++: Key Challenges and Trade-offs in Embedded System Design for Personal Health Care. Harmke de Groot, Maryam Ashouei, Julien Penders, Valer Pop, Maja Vidojkovic, Bert Gyselinckx, Refet Firat Yazicioglu |
| 2011 | Hybrid Code-Data Prefetch-Aware Multiprocessor Task Graph Scheduling. Morteza Damavandpeyma, Sander Stuijk, Twan Basten, Marc Geilen, Henk Corporaal |
| 2011 | Improved Power Modeling of DDR SDRAMs. Karthik Chandrasekar, Benny Akesson, Kees Goossens |
| 2011 | Iteration-Based Trade-Off Analysis of Resource-Aware SDF. Yang Yang, Marc Geilen, Twan Basten, Sander Stuijk, Henk Corporaal |
| 2011 | Kactus2: Environment for Embedded Product Development Using IP-XACT and MCAPI. Antti Kamppi, Lauri Matilainen, Joni-Matti Määttä, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen |
| 2011 | LastZ: An Ultra Optimized 3D Networks-on-Chip Architecture. Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen |
| 2011 | Low Power FPGA Implementations of JH and Fugue Hash Functions. George Provelengios, Nikolaos S. Voros, Paris Kitsos |
| 2011 | Low-Latency and Low-Overhead Mesochronous and Plesiochronous Synchronizers. Jean-Michel Chabloz, Ahmed Hemani |
| 2011 | Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors. Jaroslav Sykora, Leos Kafka, Martin Danek, Lukas Kohout |
| 2011 | Model Driven Cache-Aware Scheduling of Object Oriented Software for Chip Multiprocessors. Tolga Ovatman, Feza Buzluca |
| 2011 | Modular Fault Injector for Multiple Fault Dependability and Security Evaluations. Johannes Grinschgl, Armin Krieg, Christian Steger, Reinhold Weiss, Holger Bock, Josef Haid |
| 2011 | Modulo 2^n+1 Arithmetic Units with Embedded Diminished-to-Normal Conversion. Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos |
| 2011 | Multicore Cache Simulations Using Heterogeneous Computing on General Purpose and Graphics Processors. Georgios Keramidas, Nikolaos Strikos, Stefanos Kaxiras |
| 2011 | Mutant Fault Injection in Functional Properties of a Model to Improve Coverage Metrics. Ali Abbasinasab, Mehdi Mohammadi, Siamak Mohammadi, Svetlana N. Yanushkevich, Michael Smith |
| 2011 | Nexus: Hardware Support for Task-Based Programming. Cor Meenderinck, Ben H. H. Juurlink |
| 2011 | Novel Hardware Architecture for Implementing the Inner Loop of the SHA-2 Algorithms. Ignacio Algredo-Badillo, Claudia Feregrino-Uribe, René Cumplido, Miguel Morales-Sandoval |
| 2011 | Numeral-Based Crosstalk Avoidance Coding to Reliable NoC Design. Mansour Shafaei, Ahmad Patooghy, Seyed Ghassem Miremadi |
| 2011 | On Failure Rate Assessment Using an Executable Model of the System. Mohammad Hossein Neishaburi, Zeljko Zilic |
| 2011 | On RTL Testability and Gate-Level Stuck-At-Fault Coverage Correlation for Scan Circuits. Michal Rumplík, Josef Strnadel |
| 2011 | On the Cascade Implementation of Multiple-Output Sparse Logic Functions. Václav Dvorák, Petr Mikusek |
| 2011 | On the Design of Modulo 2^n+1 Multipliers. Constantinos Efstathiou, Kiamal Z. Pekmestzi, Nicholas Axelos |
| 2011 | On the Efficiency of Design Time Evaluation of the Resistance to Power Attacks. Alessandro Barenghi, Guido Bertoni, Fabrizio De Santis, Filippo Melzani |
| 2011 | On-chip Monitoring: A Light-Weight Interconnection Network Approach. Pablo Ituero, Marisa López-Vallejo, Miguel A. Sánchez Marcos, Carlos Gómez Osuna |
| 2011 | Optimal Selection of Function Implementation in a Hierarchical Configware Synthesis Method for a Coarse Grain Reconfigurable Architecture. Fahimeh Jafari, Shuo Li, Ahmed Hemani |
| 2011 | PUMA: Placement Unification with Mapping and Guaranteed Throughput Allocation on an FPGA Using a Hardwired NoC. Muhammad Aqeel Wahlah, Kees Goossens |
| 2011 | Path-Based Dynamic Voltage and Frequency Scaling Algorithms for Multiprocessor Embedded Applications with Soft Delay Deadlines. Alice M. Tokarnia, Pedro C. F. Pepe, Leandro D. Pagotto |
| 2011 | Phase-Guided Scheduling on Single-ISA Heterogeneous Multicore Processors. Lina Sawalha, Sonya R. Wolff, Monte P. Tull, Ronald D. Barnes |
| 2011 | Power Minimisation for Real-Time Dataflow Applications. Andrew Nelson, Orlando Moreira, Anca Mariana Molnos, Sander Stuijk, Ba Thang Nguyen, Kees Goossens |
| 2011 | Power Spectral Density Side Channel Attack Overlapping Window Method. Philip Hodgers, Keanhong Boey, Máire O'Neill |
| 2011 | Pre-silicon Characterization of NIST SHA-3 Final Round Candidates. Xu Guo, Meeta Srivastav, Sinan Huang, Dinesh Ganta, Michael B. Henry, Leyla Nazhandali, Patrick Schaumont |
| 2011 | Process Variation Reduction for CMOS Logic Operating at Sub-threshold Supply Voltage. Bo Liu, Hamid Reza Pourshaghaghi, Sebastian M. Londono, José Pineda de Gyvez |
| 2011 | Quaternary High Performance Arithmetic Logic Unit Design. A. N. Nagamani, S. Nishchai |
| 2011 | Rapid and Accurate Leakage Power Estimation for Nano-CMOS Circuits. Michal Bryk, Lech Józwiak, Wieslaw Kuzmicz |
| 2011 | Realization and Scalability of Release and Protected Release Consistency Models in NoC Based Systems. Abdul Naeem, Axel Jantsch, Xiaowen Chen, Zhonghai Lu |
| 2011 | Reliability-Aware Design Optimization for Multiprocessor Embedded Systems. Jia Huang, Jan Olaf Blech, Andreas Raabe, Christian Buckl, Alois C. Knoll |
| 2011 | SAT-Based Generation of Compressed Skewed-Load Tests for Transition Delay Faults. Roland Dobai, Marcel Baláz |
| 2011 | SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems. Martin Straka, Jan Kastil, Zdenek Kotásek |
| 2011 | SoC and Board Modeling for Processor-Centric Board Testing. Anton Tsertov, Raimund Ubar, Artur Jutman, Sergei Devadze |
| 2011 | Soft Error Detection Technique in Multi-threaded Architectures Using Control-Flow Monitoring. Mohammad Maghsoudloo, Hamid R. Zarandi, Saadat Pour-Mozafari, Navid Khoshavi |
| 2011 | Synthesizing Concurrent Synchronous Computing Machines from Interrupt-Driven Binaries. Michael D. Wilder, Robert Rinker |
| 2011 | Techniques for SAT-Based Constrained Test Pattern Generation. Jiri Balcarek, Petr Fiser, Jan Schmidt |
| 2011 | The Future of Data-Parallel Embedded Systems (Abstract). Menno Lindwer |
| 2011 | Thermal Analysis of Job Allocation and Scheduling Schemes for 3D Stacked NoC's. Kameswar Rao Vaddina, Amir-Mohammad Rahmani, Khalid Latif, Pasi Liljeberg, Juha Plosila |
| 2011 | Thermal Effect of TSVs in 3D Die-Stacked Integrated Circuits. Hadrien A. Clarke, Kazuaki J. Murakami |
| 2011 | Towards an Efficient NoC Topology through Multiple Injection Ports. Jesús Camacho Villanueva, José Flich, José Duato, Hans Eberle, Wladek Olesinski |
| 2011 | Transaction Level Modeling of a Networked Embedded System Based on a Power Line Communication Protocol. Takieddine Majdoub, Sébastien Le Nours, Olivier Pasquier, Fabienne Nouvel |
| 2011 | VHDL Code Generation from Formal Event-B Models. Sergey Ostroumov, Leonidas Tsiopoulos |
| 2011 | VMAP: A Variation Map-Aware Placement Algorithm for Leakage Power Reduction in FPGAs. Behzad Salami, Morteza Saheb Zamani, Ali Jahanian |