| 2010 | 13th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2010, 1-3 September 2010, Lille, France Sebastián López |
| 2010 | A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems. Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Kunal P. Ghosh, Kavi Arya, Madhav P. Desai |
| 2010 | A Case for Hardware Task Management Support for the StarSS Programming Model. Cor Meenderinck, Ben H. H. Juurlink |
| 2010 | A Class of Recursive Networks on a Chip for Enhancing Intercluster Parallelism. Masaru Takesue |
| 2010 | A Common Operator for FFT and Viterbi Algorithms. Malek Naoues, Laurent Alaus, Dominique Noguet |
| 2010 | A Computation and Power Reduction Technique for H.264 Intra Prediction. Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu |
| 2010 | A Design Process for Hardware/Software System Co-design and its Application to Designing a Reconfigurable FPGA. Félix Moreno, Ignacio López, Ricardo Sanz |
| 2010 | A Fast Analytical Approach to Multi-cycle Soft Error Rate Estimation of Sequential Circuits. Mahdi Fazeli, Seyed Ghassem Miremadi, Hossein Asadi, Mehdi Baradaran Tahoori |
| 2010 | A Formal Condition to Stop an Incremental Automatic Functional Diagnosis. Luca Amati, Cristiana Bolchini, Fabio Salice, Federico Franzoso |
| 2010 | A Latency-Efficient Router Architecture for CMP Systems. Antoni Roca, José Flich, Federico Silla, José Duato |
| 2010 | A Load-Forwarding Mechanism for the Vector Architecture in Multimedia Applications. Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi |
| 2010 | A Low Cost Single-Cycle Router Based on Virtual Output Queuing for On-chip Networks. Son Truong Nguyen, Shigeru Oyanagi |
| 2010 | A Markov Model for Low-Power High-Fidelity Design-Space Exploration. Jing Cao, Albert Nymeyer |
| 2010 | A Memetic Approach for Nanoscale Hybrid Circuit Cell Mapping. Zhufei Chu, Yinshui Xia, William N. N. Hung, Lun-Yao Wang, Xiaoyu Song |
| 2010 | A Modular Peripheral to Support Self-Reconfiguration in SoCs. Andrés Otero, Angel Morales-Cas, Jorge Portilla, Eduardo de la Torre, Teresa Riesgo |
| 2010 | A Multicore Embedded Processor for Fingerprint Recognition. Giovanni Danese, Mauro Giachero, Francesco Leporati, Nelson Nazzicari |
| 2010 | A Multicore SDR Architecture for Reconfigurable WiMAX Downlink. Pedro Suárez-Casal, Angel Carro-Lagoa, José Antonio García-Naya, Luis Castedo |
| 2010 | A New High-Level Methodology for Programming FPGA-Based Smart Camera. Nicolas Roudel, François Berry, Jocelyn Sérot, Laurent Eck |
| 2010 | A Novel VLSI Architecture of Fixed-Complexity Sphere Decoder. Bin Wu, Guido Masera |
| 2010 | A Packet Classifier Using a Parallel Branching Program Machine. Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura |
| 2010 | A Parallel for Loop Memory Template for a High Level Synthesis Compiler. Craig Moore, Wim Meeus, Harald Devos, Dirk Stroobandt |
| 2010 | A Predictable Multiprocessor Design Flow for Streaming Applications with Dynamic Behaviour. Sander Stuijk, Marc Geilen, Twan Basten |
| 2010 | A Programming Model and a NoC-Based Architecture for Streaming Applications. Yun Jie Wu, Dominique Houzet, Sylvain Huet |
| 2010 | A Test Bench for Distortion-Energy Optimization of a DSP-Based H.264/SVC Decoder. Fernando Pescador, Eduardo Juárez Martínez, David Samper Martínez, César Sanz, Mickaël Raulet |
| 2010 | A Traffic Differentiation Add-On to the IEEE 802.15.4 Protocol: Implementation and Experimental Validation over a Real-Time Operating system. Ricardo Severino, Manish Batsa, Mário Alves, Anis Koubaa |
| 2010 | ALOE-Based Flexible LDPC Decoder. Ismael Gómez, Massimo Camatel, Jordi Bracke, Vuk Marojevic, Antoni Gelonch, Fabrizio Vacca, Guido Masera |
| 2010 | Adaptive Beamforming Using the Reconfigurable MONTIUM TP. Marcel D. van de Burgwal, Kenneth C. Rovers, Koen C. H. Blom, André B. J. Kokkeler, Gerard J. M. Smit |
| 2010 | Adaptive Cache Memories for SMT Processors. Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo |
| 2010 | An Approximate Maximum Common Subgraph Algorithm for Large Digital Circuits. Jochem H. Rutgers, Pascal T. Wolkotte, Philip K. F. Hölzenspies, Jan Kuper, Gerard J. M. Smit |
| 2010 | An Efficient Method to Reliable Data Transmission in Network-on-Chips. Ahmad Patooghy, Hamed Tabkhi, Seyed Ghassem Miremadi |
| 2010 | An Efficient Technique for In-order Packet Delivery with Adaptive Routing Algorithms in Networks on Chip. Maurizio Palesi, Rickard Holsmark, Xiaohang Wang, Shashi Kumar, Mei Yang, Yingtao Jiang, Vincenzo Catania |
| 2010 | An FPGA-Based Accelerator for Analog VLSI Artificial Neural Network Emulation. Barend van Liempd, Daniel Herrera, Miguel E. Figueroa |
| 2010 | An Improved Automotive Multiple Target Tracking System Design. Tobias Lange, Naim Harb, Haisheng Liu, Smaïl Niar, Rabie Ben Atitallah |
| 2010 | An Improved Hardware Implementation of the Grain Stream Cipher. Shohreh Sharif Mansouri, Elena Dubrova |
| 2010 | Application Dependent FPGA Testing Method. Martin Rozkovec, Jiri Jenícek, Ondrej Novák |
| 2010 | Architectural Vulnerability Factor Estimation with Backwards Analysis. Robert Hartl, Andreas J. Rohatschek, Walter Stechele, Andreas Herkersdorf |
| 2010 | Architecture-Level Design Space Exploration of Super Scalar Microarchitecture for Network Applications. Mostafa E. Salehi, Hamed Dorosti, Sied Mehdi Fakhraie |
| 2010 | Area and Speed Oriented Implementations of Asynchronous Logic Operating under Strong Constraints. Igor Lemberski, Petr Fiser |
| 2010 | Area-Efficient Multi-moduli Squarers for RNS. Dimitris Bakalis, Haridimos T. Vergos |
| 2010 | Arithmetic Units for RNS Moduli {2n-3} and {2n+3} Operations. Pedro Miguens Matutino, Ricardo Chaves, Leonel Sousa |
| 2010 | Automated Power Characterization for Run-Time Power Emulation of SoC Designs. Christian Bachmann, Andreas Genser, Christian Steger, Reinhold Weiss, Josef Haid |
| 2010 | Behavioural Modelling of DLLs for Fast Simulation and Optimisation of Jitter and Power Consumption. Enrique Barajas, Diego Mateo, José Luis González |
| 2010 | C?aSH: Structural Descriptions of Synchronous Hardware Using Haskell. Christiaan Baaij, Matthijs Kooijman, Jan Kuper, Arjan Boeijink, Marco Gerards |
| 2010 | Composable Dynamic Voltage and Frequency Scaling and Power Management for Dataflow Applications. Kees Goossens, Dongrui She, Aleksandar Milutinovic, Anca Mariana Molnos |
| 2010 | Computation Reduction Techniques for Vector Median Filtering and their Hardware Implementation. Ozgur Tasdizen, Ilker Hamzaoglu |
| 2010 | Creation of Partial FPGA Configurations at Run-Time. Miguel Lino Silva, João Canas Ferreira |
| 2010 | Customizable Composition and Parameterization of Hardware Design Transformations. Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides |
| 2010 | Cyclic Redundancy Checking (CRC) Accelerator for the FlexCore Processor. Muhammad Waqar Azhar, Tung Thanh Hoang, Per Larsson-Edefors |
| 2010 | Description-Level Optimisation of Synthesisable Asynchronous Circuits. Luis A. Tarazona, Doug A. Edwards, Andrew Bardsley, Luis A. Plana |
| 2010 | Design Methodology for a High Performance Robust DVB-S2 Decoder Implementation. Florent Berthelot, François Charot, Charles Wagner, Christophe Wolinski |
| 2010 | Design of Testable Universal Logic Gate Targeting Minimum Wire-Crossings in QCA Logic Circuit. Bibhash Sen, Anik Sengupta, Mamata Dalui, Biplab K. Sikdar |
| 2010 | Design of Trace-Based Split Array Caches for Embedded Applications. Alice M. Tokarnia, Marina Tachibana |
| 2010 | Designing Efficient Source Routing for Mesh Topology Network on Chip Platforms. Saad Mubeen, Shashi Kumar |
| 2010 | Dynamic Control Flow Checking Technique for Reliable Microprocessors. Makoto Sugihara |
| 2010 | Evaluating OpenMP Support Costs on MPSoCs. Andrea Marongiu, Paolo Burgio, Luca Benini |
| 2010 | Evaluating a Transmission Power Self-Optimization Technique for WSN in EMI Environments. Felipe Lavratti, Alex R. Pinto, Letícia Maria Veiras Bolzani, Fabian Vargas, Carlos Barros Montez, Fernando Hernandez, Edmundo Gatti, C. Silva |
| 2010 | Evaluation of RTD-CMOS Logic Gates. Juan Núñez, Maria J. Avedillo, José M. Quintana |
| 2010 | Exploration of Network Alternatives for Middleware-centric Embedded System Design. Franco Fummi, Giovanni Perbellini, Davide Quaglia, R. Trenti |
| 2010 | Fault Tolerant Structure for SRAM-Based FPGA via Partial Dynamic Reconfiguration. Martin Straka, Jan Kastil, Zdenek Kotásek |
| 2010 | Faults Coverage Improvement Based on Fault Simulation and Partial Duplication. Jaroslav Borecký, Martin Kohlík, Hana Kubátová, Pavel Kubalík |
| 2010 | Filtering Directory Lookups in CMPs. Ana Bosque, Víctor Viñals, Pablo Ibáñez, José M. Llabería |
| 2010 | Generated Cycle-Accurate Profiler for C Language. Zdenek Prikryl, Karel Masarík, Tomás Hruska, Adam Husár |
| 2010 | Gracefully Degrading Circuit Controllers Based on Polytronics. Richard Ruzicka |
| 2010 | H.264 Color Components Video Decoding Parallelization on Multi-core Processors. Elias Baaklini, Hassan Sbeity, Smaïl Niar, Nouhad Amaneddine |
| 2010 | Hardware-Based Speed Up of Face Recognition Towards Real-Time Performance. Imtiaz Sajid, Sotirios G. Ziavras, Muhammad Mansoor Ahmed |
| 2010 | High Level Validation of an Optimization Algorithm for the Implementation of Adaptive Wavelet Transforms in FPGAs. Rubén Salvador, Félix Moreno, Teresa Riesgo, Lukás Sekanina |
| 2010 | In-channel Flow Control Scheme for Network-on-Chip. Vrishali Vijay Nimbalkar, Kuruvilla Varghese |
| 2010 | Instantiating GENESYS Application Architecture Modeling via UML 2.0 Constructs and MARTE Profile. Subayal Khan, Kari Tiensyrjä, Jari Nurmi |
| 2010 | LEON3 ViP: A Virtual Platform with Fault Injection Capabilities. Antonio da Silva, Sebastián Sánchez |
| 2010 | Low Latency Recovery from Transient Faults for Pipelined Processor Architectures. Marcus Jeitler, Jakob Lechner |
| 2010 | Low Power FPGA Implementations of 256-bit Luffa Hash Function. Paris Kitsos, Nicolas Sklavos, Athanassios N. Skodras |
| 2010 | Medical Diagnosis Improvement Through Image Quality Enhancement Based on Super-Resolution. Lara G. Villanueva, Gustavo M. Callicó, Félix Tobajas, Sebastián López, Valentin de Armas, José Francisco López, Roberto Sarmiento |
| 2010 | Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis. Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jean-Luc Dekeyser |
| 2010 | Multi-core Technology -- Next Evolution Step in Safety Critical Systems for Industrial Applications? Frank Reichenbach, Alexander Wold |
| 2010 | Multiple Bit Error Detection and Correction in Memory. J. F. Tarillo, Nikolaos Mavrogiannakis, Carlos Arthur Lang Lisbôa, Costas Argyrides, Luigi Carro |
| 2010 | Network-on-Multi-Chip (NoMC) for Multi-FPGA Multimedia Systems. Marta Stepniewska, Adam Luczak, Jakub Siast |
| 2010 | New Digital Control Technique for Improving Transient Response in DC - DC Converters. Majd Ghazi Batarseh, Ehab Shobaki, Xiang Fang, Haibing Hu, Issa Batarseh |
| 2010 | NoC Switch with Credit Based Guaranteed Service Support Qualified for GALS Systems. Tim Kranich, Mladen Berekovic |
| 2010 | On CMOS Memory Design in Low Supply Voltage for Integrated Biosensor Applications. Allen Chen, Ryan Hoppal, Tom Chen |
| 2010 | On Reducing Error Rate of Data Protected Using Systematic Unordered Codes in Asymmetric Channels. Stanislaw J. Piestrak |
| 2010 | On Scaling Speedup with Coarse-Grain Coprocessor Accelerators on Reconfigurable Platforms. George Kornaros, Antonios Motakis |
| 2010 | On the Numbers of Variables to Represent Multi-valued Incompletely Specified Functions. Tsutomu Sasao |
| 2010 | On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism. Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen |
| 2010 | Optimising Self-Timed FPGA Circuits. Phillip David Ferguson, Aristides Efthymiou, Tughrul Arslan, Danny Hume |
| 2010 | Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications. Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro |
| 2010 | Path-Delay Fault Testing in Embedded Content Addressable Memories. Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas |
| 2010 | Performance Analysis of 90nm Look Up Table (LUT) for Low Power Application. Deepak Kumar, Pankaj Kumar, Manisha Pattanaik |
| 2010 | Persistence Management Model for Dynamically Reconfigurable Hardware. Julio Dondo, Fernando Rincón, Jesús Barba, Francisco Moya, Francisco Sánchez, Juan Carlos López |
| 2010 | Physical Layer for Spectrum-Aware Reconfigurable OFDM on an FPGA. Adolfo Recio, Peter M. Athanas |
| 2010 | Power Consumption Modeling for DVFS Exploitation. Andrea Castagnetti, Cécile Belleudy, Sébastien Bilavarn, Michel Auguin |
| 2010 | Power Distribution in NoCs Through a Fuzzy Based Selection Strategy for Adaptive Routing. Nastaran Salehi, Ahmad Khadem Zadeh, Arash Dana |
| 2010 | QoR Analysis of Automated Clock-Mesh Implementation under OCV Consideration. Dennis Bode, Mladen Berekovic, Axel Borkowski, Ludger Buker |
| 2010 | Re-NUCA: Boosting CMP Performance Through Block Replication. Pierfrancesco Foglia, Cosimo Antonio Prete, Marco Solinas, Giovanna Monni |
| 2010 | Real-Time Testing of True Random Number Generators Through Dynamic Reconfiguration. Dan Hotoleanu, Octavian Cret, Alin Suciu, Tamas Györfi, Lucia Vacariu |
| 2010 | Reconfigurable Fault-Tolerant System Sychronization. Jan Balach, Ondrej Novák |
| 2010 | Reconfigurable Grid Alu Processor: Optimization and Design Space Exploration. Basher Shehan, Ralf Jahr, Sascha Uhrig, Theo Ungerer |
| 2010 | RobuCheck: A Robustness Checker for Digital Circuits. Stefan Frehse, Görschwin Fey, André Sülflow, Rolf Drechsler |
| 2010 | Scalable Architecture for Wavelength-Switched Optical NoC with Multicasting Capability. Somayyeh Koohi, Alireza Shafaei, Shaahin Hessabi |
| 2010 | Simulation of High-Performance Memory Allocators. José Luis Risco-Martín, José Manuel Colmenar, David Atienza, José Ignacio Hidalgo |
| 2010 | Software Managed Instruction Scratchpad Memory Optimization in Stream Architecture Based on Hot Code Analysis of Kernels. Yi He, Ju Ren, Mei Wen, Qianming Yang, Nan Wu, Chunyuan Zhang |
| 2010 | Software Programmable Data Allocation in Multi-bank Memory of SIMD Processors. Jian Wang, Joar Sohl, Olof Kraigher, Dake Liu |
| 2010 | Static Average Case Power Estimation Technique for Block Ciphers. Tingcong Ye, Dilip P. Vasudevan, Jiaoyan Chen, Emanuel M. Popovici, Michel P. Schellekens |
| 2010 | Storage-Aware Value Prediction. Mohammad Salehi, Amirali Baniasadi |
| 2010 | Structurally Synthesized Multiple Input BDDs for Speeding Up Logic-Level Simulation of Digital Circuits. Dmitri Mironov, Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman |
| 2010 | System Level Hardening by Computing with Matrices. Ronaldo Rodrigues Ferreira, Álvaro Freitas Moreira, Luigi Carro |
| 2010 | System Level Synthesis for Ultra Low-Power Wireless Sensor Nodes. Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys |
| 2010 | Test Data and Power Reductions for Transition Delay Tests for Massive-Parallel Scan Structures. René Kothe, Heinrich Theodor Vierhaus |
| 2010 | Test Patterns Compression Technique Based on a Dedicated SAT-Based ATPG. Jiri Balcarek, Petr Fiser, Jan Schmidt |
| 2010 | The Use of Genetic Algorithm to Derive Correlation Between Test Vector and Scan Register Sequences and Reduce Power Consumption. Zdenek Kotásek, Jaroslav Skarvada, Josef Strnadel |
| 2010 | Trading Hardware Overhead for Communication Performance in Mesh-Type Topologies. Claas Cornelius, Philipp Gorski, Stephan Kubisch, Dirk Timmermann |
| 2010 | Unified Digit Serial Systolic Montgomery Multiplication Architecture for Special Classes of Polynomials over GF(2m). Somsubhra Talapatra, Hafizur Rahaman, Samir K. Saha |
| 2010 | Visualization of Multi-objective Design Space Exploration for Embedded Systems. Toktam Taghavi, Andy D. Pimentel |