DSD C

116 papers

YearTitle / Authors
200912th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece
Antonio Núñez, Pedro P. Carballo
2009A Comparative Study of Parallel Prefix Adders in FPGA Implementation of EAC.
Feng Liu, Fariborz Fereydouni-Forouzandeh, Otmane Aït Mohamed, Gang Chen, Xiaoyu Song, Qingping Tan
2009A Concept for Logic Self Repair.
Tobias Koal, Heinrich Theodor Vierhaus, Daniel Scheit
2009A Dynamic Hybrid Cache Coherency Protocol for Shared-Memory MPSoC.
Hajer Chtioui, Rabie Ben Atitallah, Smaïl Niar, Jean-Luc Dekeyser, Mohamed Abid
2009A Fast SOP Minimizer for Logic Funcions Described by Many Product Terms.
Petr Fiser, David Toman
2009A Fault Tolerant NoC Architecture for Reliability Improvement and Latency Reduction.
Amir Ehsani Zonouz, Mehrdad Seyrafi, Arghavan Asad, Mohsen Soryani, Mahmood Fathy, Reza Berangi
2009A Framework for Compile-time and Run-time Management of Non-functional Aspects in WSNs Nodes.
Carlo Brandolese, William Fornaciari
2009A Hardware-Scheduler for Fault Detection in RTOS-Based Embedded Systems.
Jimmy Tarrillo, Letícia Maria Veiras Bolzani Poehls, Fabian Vargas
2009A Hazard-Free Delay-Insensitive 4-phase On-Chip Link Using MVCM Signaling.
Mohammad Fattah, Soodeh Aghli Moghaddam, Siamak Mohammadi
2009A High Performance Hardware Architecture for One Bit Transform Based Motion Estimation.
Abdulkadir Akin, Yigit Dogan, Ilker Hamzaoglu
2009A MPSoC Prototyping Platform for Flexible Radio Applications.
Damien Hedde, Pierre-Henri Horrein, Frédéric Pétrot, Robin Rolland, Franck Rousseau
2009A Priority-Based Budget Scheduler with Conservative Dataflow Model.
Marcel Steine, Marco Bekooij, Maarten Wiggers
2009A Reconfigurable Frame Interpolation Hardware Architecture for High Definition Video.
Ozgur Tasdizen, Ilker Hamzaoglu
2009A Standardized Knobs and Monitors RTL2RTL Insertion Methodology for Fine Grain SoC Tuning.
Ahmed Mohamed AbdelHamid, Ankur Anchlia, Stylianos Mamagkakis, Miguel Corbalan Miranda, Bart Dierickx, Maarten Kuijk
2009A Synthesisable Quasi-Delay Insensitive Result Forwarding Unit for an Asynchronous Processor.
Luis A. Tarazona, Doug A. Edwards, Luis A. Plana
2009ARROW - A Generic Hardware Fault Injection Tool for NoCs.
Michael Birner, Thomas Handl
2009Abstract Description of System Application and Hardware Architecture for Hardware/Software Code Generation.
Amin El Mrabti, Hamed Sheibanyrad, Frédéric Rousseau, Frédéric Pétrot, Romain Lemaire, Jérôme Martin
2009Acceleration of MELP Algorithm Using DSP Coprocessor with Extended Registers.
Lu Gao, Li Guo, Canxing Lu
2009Ad-hoc WSN in Biological Research.
Perfecto Mariño Espiñeira, Fernando Pérez-Fontán, Miguel Angel Domínguez, Santiago Otero
2009Adaptive Dynamic Voltage and Frequency Scaling Algorithm for Symmetric Multiprocessor Architecture.
Marius Gligor, Nicolas Fournel, Frédéric Pétrot
2009An Adaptive Unicast/Multicast Routing Algorithm for MPSoCs.
Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Hannu Tenhunen
2009An Effective Methodology to Multi-objective Design of Application Domain-specific Embedded Architectures.
Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti, Gianmarco De Francisci Morales
2009An Effective Replacement Strategy of Cache Memory for an SMT Processor.
Yoshiyasu Ogasawara, Hironori Nakajo
2009An Efficient Hardware Architecture for Packet Re-sequencing in Network Processors MPSoCs.
Shadi Traboulsi, Michael Meitinger, Rainer Ohlendorf, Andreas Herkersdorf
2009An Efficient Low-Complexity Alternative to the ROB for Out-of-Order Retirement of Instructions.
Salvador Petit, Rafael Ubal, Julio Sahuquillo, Pedro López, José Duato
2009An Evaluation of Behaviors of S-NUCA CMPs Running Scientific Workload.
Pierfrancesco Foglia, Francesco Panicucci, Cosimo Antonio Prete, Marco Solinas
2009An FPGA-Based Embedded System for Fingerprint Matching Using Phase-Only Correlation Algorithm.
Giovanni Danese, Mauro Giachero, Francesco Leporati, Giulia Matrone, Nelson Nazzicari
2009An FPGA-Based Embedded System for a Sailing Robot.
José Carlos Alves, Nuno Alexandre Cruz
2009An Open and Reconfigurable Platform for 4G Telecommunication: Concepts and Application.
Fabien Clermidy, Romain Lemaire, Xavier Popon, Dimitri Ktenas, Yvain Thonnart
2009An on Chip Network inside a FPGA for Run-Time Reconfigurable Low Latency Grid Communication.
Jochen Strunk, Toni Volkmer, Wolfgang Rehm, Heiko Schick
2009Approximate-Timed Transactional Level Modeling for MPSoC Exploration: A Network-on-Chip Case Study.
Alexandre Guerre, Nicolas Ventroux, Raphaël David, Alain Mérigot
2009Architectural Exploration of Per-Core DVFS for Energy-Constrained On-Chip Networks.
Alexander Wei Yin, Liang Guang, Ethiopia Nigussie, Pasi Liljeberg, Jouni Isoaho, Hannu Tenhunen
2009Architecture and DSP Implementation of a DVB-S2 Baseband Demodulator.
Panayiotis Savvopoulos, Nikolaos Papandreou, Theodore Antonakopoulos
2009Architecture-Driven Synthesis of Reconfigurable Cells.
Christophe Wolinski, Krzysztof Kuchcinski, Erwan Raffin, François Charot
2009Block-Level Fault Model-Free Debug and Diagnosis in Digital Systems.
Raimund Ubar, Sergei Kostin, Jaan Raik
2009Bootstrapped Adiabatic Complementary Pass-Transistor Logic Driver Circuit for Large Capacitive Load and Low-energy Applications.
Jose Carlos Garcia-Montesdeoca, Juan A. Montiel-Nelson, Saeid Nooshabadi, Javier Sosa, Héctor Navarro
2009CPLD-oriented Synthesis of Finite State Machines.
Robert Czerwinski, Dariusz Kania
2009Calibration Method for a CMOS 0.06mm
Nikos Petrellis, Michael K. Birbas, John C. Kikidis, Alexios N. Birbas
2009Combined SD-RNS Constant Multiplication.
Evangelos Vassalos, Dimitris Bakalis
2009Compilation Technique for Loop Overhead Minimization.
Nikolas Kroupis, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Dimitrios Soudris
2009Composable Resource Sharing Based on Latency-Rate Servers.
Benny Akesson, Andreas Hansson, Kees Goossens
2009Conservative Dynamic Energy Management for Real-Time Dataflow Applications Mapped on Multiple Processors.
Anca Mariana Molnos, Kees Goossens
2009Data Encoding for Low-Power in Wormhole-Switched Networks-on-Chip.
Maurizio Palesi, Fabrizio Fazzino, Giuseppe Ascia, Vincenzo Catania
2009Deductive Fault Simulation for Asynchronous Sequential Circuits.
Roland Dobai, Elena Gramatová
2009Dependable Controller Design Using Polymorphic Counters.
Richard Ruzicka
2009Design of a Highly Dependable Beamforming Chip.
Xiao Zhang, Hans G. Kerkhoff
2009Design, Simulation and Performance Evaluation of a NAND Based Single-electron 2-4 Decoder.
Thomas Tsiolakis, Nikos Konofaos, George Alexiou
2009Distributed Collaborative Design of a Mixed-Signal IP Component.
Adam Pawlak, Piotr Penkala, Pawel Fras, Wojciech Sakowski, Günter Grau, Szymon Grzybek, Alexander Stanitzki
2009Double-precision Gauss-Jordan Algorithm with Partial Pivoting on FPGAs.
Rui Policarpo Duarte, Horácio C. Neto, Mário P. Véstias
2009Energy and Performance Model of a SPARC Leon3 Processor.
Sandro Penolazzi, Luca Bolognino, Ahmed Hemani
2009Exploration of Slot Allocation for On-Chip TDM Virtual Circuits.
Li Tong, Zhonghai Lu, Hua Zhang
2009FPGA Accelerator for RNA Secondary Structure Prediction.
Arturo Díaz-Pérez, Mario Alberto García-Martínez
2009FPGA Implementations of SHA-3 Candidates: CubeHash, Grostl, LANE, Shabal and Spectral Hash.
Brian Baldwin, Andrew Byrne, Mark Hamilton, Neil Hanley, Robert P. McEvoy, Weibo Pan, William P. Marnane
2009Flexible Architectures for LDPC Decoders Based on Network on Chip Paradigm.
Fabrizio Vacca, Guido Masera, Hazem Moussa, Amer Baghdadi, Michel Jézéquel
2009GPU Accelerated Solver of Time-Dependent Air Pollutant Transport Equations.
Václav Simek, Radim Dvorak, Frantisek Zboril, Vladimír Drábek
2009GridRT: A Massively Parallel Architecture for Ray-Tracing Using Uniform Grids.
Alexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvão França
2009Heterogeneous Multiprocessor Synthesis under Performance and Reliability Constraints.
Makoto Sugihara
2009Heuristic Synthesis of Multi-Terminal BDDs Based on Local Width/Cost Minimization.
Petr Mikusek, Václav Dvorák
2009Hierarchical NoCs for Optimized Access to Shared Memory and IO Resources.
Andreas Lankes, Thomas Wild, Andreas Herkersdorf
2009High Availability Fault Tolerant Architectures Implemented into FPGAs.
Martin Straka, Zdenek Kotásek
2009High Performance Bootstrapped CMOS Dual Supply Level Shifter for 0.5V Input and 1V Output.
Jose Carlos Garcia-Montesdeoca, Juan A. Montiel-Nelson, Saeid Nooshabadi
2009High Performance CMOS 2-input NAND Based on Low-race Split-level Charge-recycling Pass-transistor Logic.
Jose Carlos Garcia-Montesdeoca, Juan A. Montiel-Nelson, Saeid Nooshabadi
2009High Performance Image Processing on a Massively Parallel Processor Array.
Roberto R. Osorio, Cesar Diaz-Resco, Javier D. Bruguera
2009High Reliable Remote Terminal Unit for Space Applications.
David Guzmán, Manuel Prieto, Daniel Garcia, Victor Ruiz, Javier Almena, Sebastián Sánchez-Prieto, Daniel Meziat
2009Improving Latency of Quantum Circuits by Gate Exchanging.
Naser MohammadZadeh, Morteza Saheb Zamani, Mehdi Sedighi
2009Improving the Performance of the Divide-Add Fused Operation Using Variable Latency Quotient Generation.
Alexandru Amaricai, Oana Boncalo
2009Instruction Precomputation for Fault Detection.
Demid Borodin, Ben H. H. Juurlink, Stefanos Kaxiras
2009Internet-Router Buffered Crossbars Based on Networks on Chip.
Kees Goossens, Lotfi Mhamdi, Iria Varela Senin
2009Iterative Algorithm for Compound Instruction Selection with Register Coalescing.
Minwook Ahn, Jonghee M. Youn, Youngkyu Choi, Doosan Cho, Yunheung Paek
2009Logic Minimization and Testability of 2SPP-P-Circuits.
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
2009Low Power Encoding in NoCs Based on Coupling Transition Avoidance.
Meysam Taassori, Shaahin Hessabi
2009Low Power Free Space Optical Communication in Wireless Sensor Networks.
James Mathews, Matthew Barnes, D. K. Arvind
2009Low-Power Low-Energy Prime-Field ECC Processor Based on Montgomery Modular Inverse Algorithm.
Hamid Reza Ahmadi, Ali Afzali-Kusha
2009Mapping Algorithms for NoC-Based Heterogeneous MPSoC Platforms.
Amit Kumar Singh, Wu Jigang, Alok Prakash, Thambipillai Srikanthan
2009Memory Conflict Analysis and Interleaver Design for Parallel Turbo Decoding Supporting HSPA Evolution.
Rizwan Asghar, Di Wu, Johan Eilert, Dake Liu
2009Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip.
Giovanni Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria
2009Methodology for Fast Pattern Matching by Deterministic Finite Automaton with Perfect Hashing.
Jan Kastil, Jan Korenek, Ondrej Lengál
2009Model-Driven Design of Embedded Multimedia Applications on SoCs.
Adolf Samir Abdallah, Abdoulaye Gamatié, Jean-Luc Dekeyser
2009Network-on-Chip Architecture Exploration Framework.
Timo Schönwald, Jochen Zimmermann, Oliver Bringmann, Wolfgang Rosenstiel
2009On the Risk of Fault Coupling over the Chip Substrate.
Peter Tummeltshammer, Andreas Steininger
2009One Dimensional Systolic Inversion Architecture Based on Modified GF(2^k) Extended Euclidean Algorithm.
Apostolos P. Fournaris, Odysseas G. Koufopavlou
2009Open Platform for Prototyping of Advanced Software Defined Radio and Cognitive Radio Techniques.
Dominique Nussbaum, Karim Khalfallah, Christophe Moy, Amor Nafkha, Pierre Leray, Julien Delorme, Jacques Palicot, Jérôme Martin, Fabien Clermidy, Bertrand Mercier, Renaud Pacalet
2009Optimized Reconfigurable RTL Components for Performance Improvements During High-Level Synthesis.
George Economakos, Sotirios Xydis
2009Performance-Effective Compaction of Standard-Cell Libraries for Digital Design.
Andrea Ricci, Ilaria De Munari, Paolo Ciampolini
2009Pipelining-Based High Throughput Low Energy Mapping on Network-on-Chip.
Ming-Yan Yu, Ming Li, Jun-Jie Song, Fang-Fa Fu, Yu-Xin Bai
2009Power Aware Fulfilment of Latency Requirements by Exploiting Heterogeneity in Wireless Sensor and Actuator Networks.
Joris Borms, Kris Steenhaut, Bart Lemmens, Ann Nowé
2009Power Management Aware Low Leakage Behavioural Synthesis.
Sven Rosinger, Kiril Schröder, Wolfgang Nebel
2009Pulse Generation for On-chip Data Transmission.
Simon Hollis
2009Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems.
Maroun Ojail, Raphaël David, Stéphane Chevobbe, Didier Demigny
2009Recursive Systematic Convolutional Code Simulation for Ofdm - 802.11p System and FPGA Implementation Using an ESL Methodology.
George Kiokes, George Economakos, Angelos Amditis, Nikolaos K. Uzunoglu
2009Reliability Analysis of Qubit Data Movement for Distributed Quantum Computation.
Oana Boncalo, Alexandru Amaricai
2009Reliability Estimation Process.
Tobias Koal, Daniel Scheit, Heinrich Theodor Vierhaus
2009Reliable Railway Station System Based on Regular Structure Implemented in FPGA.
Jaroslav Borecký, Pavel Kubalík, Hana Kubátová
2009Remote Monitoring of Thermal Performance of Salinity Gradient Solar Ponds.
Milan Nenad Simic, Randeep Singh, Louis Doukas, Aliakbar Akbarzadeh
2009Representation of Incompletely Specified Index Generation Functions Using Minimal Number of Compound Variables.
Tsutomu Sasao, Takaaki Nakamura, Munehiro Matsuura
2009Robustness Check for Multiple Faults Using Formal Techniques.
Stefan Frehse, Görschwin Fey, André Sülflow, Rolf Drechsler
2009Run-Time Reconfigurable Array Using Magnetic RAM.
Victor Silva, Luís Bica Oliveira, Jorge R. Fernandes, Mário P. Véstias, Horácio C. Neto
2009SIMD Architectural Enhancements to Improve the Performance of the 2D Discrete Wavelet Transform.
Asadollah Shahbahrami, Ben H. H. Juurlink
2009Signal Integrity and Power Integrity Methodology for Robust Analysis of On-the-Board System for High Speed Serial Links.
Raj Kumar Nagpal, Rakesh Malik, Jai Narayan Tripathi
2009Simultaneous Multithreading VLIW DSP Architecture with Dynamic Dispatch Mechanism.
Zheng Shen, Hu He, Yihe Sun
2009Soft Error Tolerant Asynchronous Circuits Based on Dual Redundant Four State Logic.
Werner Friesenbichler, Andreas Steininger
2009Stereo Vision Algorithm Implementation in FPGA Using Census Transform for Effective Resource Optimization.
Mario Alberto Ibarra-Manzano, Dora Luz Almanza-Ojeda, Michel Devy, Jean-Louis Boizard, Jean-Yves Fourniols
2009Storage Architecture for an On-chip Multi-core Processor.
Mengxiao Liu, Weixing Ji, Jiaxin Li, Xing Pu
2009Streaming Reduction Circuit.
Marco Gerards, Jan Kuper, André B. J. Kokkeler, Bert Molenkamp
2009Survey of Test Data Compression Technique Emphasizing Code Based Schemes.
Usha Sandeep Mehta, Kankar S. Dasgupta, Nirnjan M. Devashrayee
2009Synthesizing Reversible Circuits for Irreversible Functions.
D. Michael Miller, Robert Wille, Gerhard W. Dueck
2009Temperature- and Cost-Aware Design of 3D Multiprocessor Architectures.
Ayse K. Coskun, Andrew B. Kahng, Tajana Simunic Rosing
2009The Case for a Balanced Decomposition Process.
Jan Schmidt, Petr Fiser
2009The Parallel Sieve Method for a Virus Scanning Engine.
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura, Yoshifumi Kawamura
2009Thermal-Aware Test Scheduling for Core-Based SoC in an Abort-on-First-Fail Test Environment.
Zhiyuan He, Zebo Peng, Petru Eles
2009Time-Varying Network Fault Model for the Design of Dependable Networked Embedded Systems.
Franco Fummi, Davide Quaglia, Francesco Stefanni
2009Transactions Sequence Tracking by means of Dynamic Binary Instrumentation of TLM Models.
Antonio da Silva, Sebastián Sánchez
2009Using Integer Linear Programming in Test-bench Generation for Evaluating Communication Processors.
Eric Senn, David Monnereau, André Rossi, Nathalie Julien
2009Variable Latency Rounding for Golschmidt Algorithm with Parallel Remainder Estimation.
Daniel Piso Fernandez, Javier D. Bruguera
2009Variation-tolerant Design Using Residue Number System.
Ioannis Kouretas, Vassilis Paliouras
2009xMAML: A Modeling Language for Dynamically Reconfigurable Architectures.
Julien Lallet, Sébastien Pillement, Olivier Sentieys