DSD C

124 papers

YearTitle / Authors
200811th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008
Luca Fanucci
2008A Fast Transformation-Based Synthesis Algorithm for Reversible Circuits.
Ehsan K. Ardestani, Morteza Saheb Zamani, Mehdi Sedighi
2008A Hardware Design for Camera-Based Power Management of Computer Monitor.
Vasily G. Moshnyaga, Koji Hashimoto, Tadashi Suetsugu
2008A Hardware Implementation of CURUPIRA Block Cipher for Wireless Sensors.
Paris Kitsos, George N. Selimis, Odysseas G. Koufopavlou, Athanassios N. Skodras
2008A Lightweight Operating Environment for Next Generation Cognitive Radios.
Ismael Gómez, Vuk Marojevic, José Salazar, Antoni Gelonch
2008A Long-term Wearable Vital Signs Monitoring System using BSN.
Ding G. Guo, Francis Eng Hock Tay, Lin Xu, L. M. Yu, Myo Naing Nyan, F. W. Chong, K. L. Yap, B. Xu
2008A Look-Ahead Task Management Unit for Embedded Multi-Core Architectures.
Magnus Själander, Andrei Sergeevich Terechko, Marc Duranton
2008A Low-Cost Cache Coherence Verification Method for Snooping Systems.
Demid Borodin, Ben H. H. Juurlink
2008A Modular Approach to Model Heterogeneous MPSoC at Cycle Level.
Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa
2008A Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching.
Simone Secchi, Francesca Palumbo, Danilo Pani, Luigi Raffo
2008A Network-on-Chip Channel Allocator for Run-Time Task Scheduling in Multi-Processor System-on-Chips.
Markus Winter, Gerhard P. Fettweis
2008A New Array Fabric for Coarse-Grained Reconfigurable Architecture.
Yoonjin Kim, Rabi N. Mahapatra
2008A New Rounding Algorithm for Variable Latency Division and Square Root Implementations.
Daniel Piso Fernandez, Javier D. Bruguera
2008A Novel Digital Ultrasound System for Experimental Research Activities.
Luca Bassi, Enrico Boni, Andrea Cellai, Alessandro Dallai, Francesco Guidi, Stefano Ricci, Piero Tortoli
2008A Novel Technique for Low Latency Data Gathering in Wireless Sensor Networks.
Itziar Marín, Aitzol Zuloaga, Iker Losada
2008A Parallel and Modular Architecture for 802.16e LDPC Codes.
François Charot, Christophe Wolinski, Nicolas Fau, François Hamon
2008A Reconfigurable LFSR for Tri-standard SDR Transceiver, Architecture and Complexity Analysis.
Laurent Alaus, Dominique Noguet, Jacques Palicot
2008A Scheduling Postprocessor to Exploit Morphable RTL Components During High-Level Synthesis.
George Economakos, Sotirios Xydis
2008A Solar-powered Video Sensor Node for Energy Efficient Multimodal Surveillance.
Michele Magno, Davide Brunelli, Piero Zappi, Luca Benini
2008A Variable Length Vector Pipeline Architecture Design Methodology.
Takashi Kambe, Makoto Saituji
2008A Wireless Sensor Platform for Assistive Technology Applications.
Valentina Bianchi, Ferdinando Grossi, Guido Matrella, Ilaria De Munari, Paolo Ciampolini
2008Acceleration of Smith-Waterman using Recursive Variable Expansion.
Zubair Nawaz, Zaid Al-Ars, Koen Bertels, Mudassir Shabbir
2008An Analysis of Connectivity and Yield for 2D Mesh Based NoC with Interconnect Router Failures.
Thomas Sødring, Åshild Grønstad Solheim, Tor Skeie, Sven-Arne Reinemo
2008An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA.
Petr Fiser, Pavel Kubalík, Hana Kubátová
2008An Efficient Non-Tree Clock Routing Algorithm for Reducing Delay Uncertainty.
Morteza Saheb Zamani, Maryam Taajobian, Mehdi Saeedi
2008An Embedded Acquisition System for Remote Monitoring of Tire Status in F1 Race Cars through Thermal Images.
Giovanni Danese, Mauro Giachero, Francesco Leporati, Nelson Nazzicari, M. Nobis
2008An FPGA Implementation of a Quadruple-Based Multiplier for 4D Clifford Algebra.
Silvia Franchini, Antonio Gentile, Filippo Sorbello, Giorgio Vassallo, Salvatore Vitabile
2008An RNS based Specific Processor for Computing the Minimum Sum-of-Absolute-Differences.
Pedro Miguens Matutino, Leonel Sousa
2008Analysis of Power Management Strategies for a Large-Scale SoC Platform in 65nm Technology.
Andrea Marongiu, Luca Benini, Andrea Acquaviva, Andrea Bartolini
2008Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture.
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, Arnaldo Azevedo, Ben H. H. Juurlink
2008Application Analysis for Parallel Processing.
Muhammad Rashid, Damien Picard, Bernard Pottier
2008Application Specific Programmable IP Core for Motion Estimation: Technology Comparison Targeting Efficient Embedded Co-Processing Units.
Nuno Sebastião, Tiago Dias, Nuno Roma, Paulo F. Flores, Leonel Sousa
2008Architectural Synthesis with Control Data Flow Extraction toward an Asynchronous CAD Tool.
Morteza Damavandpeyma, Siamak Mohammadi
2008Architecture of a Power-Gated Wireless Sensor Node.
Goran Panic, Daniel Dietterle, Zoran Stamenkovic
2008Automatic Identification of Parallelism in Handel-C.
Joseph C. Libby, Farnaz Gharibian, Kenneth B. Kent
2008CART: Communication-Aware Routing Technique for Application-Specific NoCs.
Rafael Tornero, Juan Manuel Orduña, Andres Mejia, José Flich, José Duato
2008Cellflow: A Parallel Application Development Environment with Run-Time Support for the Cell BE Processor.
Martino Ruggiero, Michele Lombardi, Michela Milano, Luca Benini
2008Co-design and Implementation of the H.264/AVC Motion Estimation Algorithm Using Co-simulation.
Roderick R. Colenbrander, Arjen S. Damstra, C. Wim Korevaar, C. A. Verhaar, Albert Molderink
2008Code Generation from Statecharts: Simulation of Wireless Sensor Networks.
Marcello Mura, Mariagiovanna Sami
2008Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures.
Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig
2008Concurrent Error Detection for a Network of Combinational Logic Blocks Implemented with Memory Embedded in FPGAs.
Andrzej Krasniewski
2008Dependability Evaluation of Real Railway Interlocking Device.
Radek Dobias, Jan Konarski, Hana Kubátová
2008Design Flow of Dynamically-Allocated Data Types in Embedded Applications Based on Elitist Evolutionary Computation Optimization.
José Luis Risco-Martín, David Atienza, José Ignacio Hidalgo, Juan Lanchares
2008Design of a Distributed Embedded System for Domotic Applications.
Francesco Sechi, Luca Fanucci, Stefano Luschi, Simone Perini, Matteo Madesani
2008Design of a High Performance Traffic Generator on Network Processor.
Gianni Antichi, Andrea Di Pietro, Domenico Ficara, Stefano Giordano, Gregorio Procissi, Fabio Vitucci
2008Design of a Two Dimensional PRSI Image Processor.
Theja Tulabandhula, Amit Patra, Nirmal B. Chakrabarti
2008Design of an Ultra Low-Power RFID Baseband Processor Featuring an AES Cryptography Engine.
Andrea Ricci, Matteo Grisanti, Ilaria De Munari, Paolo Ciampolini
2008Development of Functional Delay Tests.
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2008Digital Implementation of a BIST Method based on Binary Observations.
Christophe Le Blanc, Éric Colinet, Jérôme Juillard, Lorena Anghel
2008Digital Nuclear Magnetic Resonance Acquisition Channel.
Paola Baldrighi, Marco Castellano, Carla Vacchi, Davide Canina, Paolo Golzi, Gianni Ferrante
2008Digital Systems Architectures Based on On-line Checkers.
Martin Straka, Zdenek Kotásek, Jan Winter
2008Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration.
Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria
2008Efficient Application Specific Routing Algorithms for NoC Systems utilizing Partially Faulty Links.
Dario Frazzetta, Giuseppe Dimartino, Maurizio Palesi, Shashi Kumar, Vincenzo Catania
2008Efficient Test Pattern Compression Method Using Hard Fault Preferring.
Jiri Jenícek
2008Embedded Diagnostic Logic Test Exploiting Regularity.
Heinrich Theodor Vierhaus, René Kothe
2008Embedded Multicore Implementation of a H.264 Decoder with Power Management Considerations.
Sébastien Bilavarn, Cécile Belleudy, Michel Auguin, T. Dupont, Anne-Marie Fouilliart
2008Evaluation and Improvement of Quantum Synthesis Algorithms based on a Thorough Set of Metrics.
Mehdi Saeedi, Naser MohammadZadeh, Mehdi Sedighi, Morteza Saheb Zamani
2008Experimental SEU Impact on Digital Design Implemented in FPGAs.
Jirí Kvasnicka, Pavel Kubalík, Hana Kubátová
2008Exploiting Internal Operation Patterns during the High-Level Synthesis of Time-Constrained Circuits.
Pedro Garcia-Repetto, María C. Molina, Rafael Ruiz-Sautua, Guillermo Botella Juan
2008Exploiting WSN for Audio Surveillance Applications: The VoWSN Approach.
Roberto Alesii, Fabio Graziosi, Luigi Pomante, Claudia Rinaldi
2008Exploring ISS Abstractions for Embedded Software Design.
Sebastien Fontaine, Luc Filion, Guy Bois
2008Fast FPGA-based Trigger and Data Acquisition System for the CERN Experiment NA62: Architecture and Algorithms.
Gianmaria Collazuol, S. Galeotti, E. Imbergamo, G. Lamanna, Guido Magazzù, M. Sozzi
2008Fault Models and Injection Strategies in SystemC Specifications.
Cristiana Bolchini, Antonio Miele, Donatella Sciuto
2008Flexible Baseband Architectures for Future Wireless Systems.
Muhammad Najam-ul-Islam, Rizwan Rasheed, Renaud Pacalet, Raymond Knopp, Karim Khalfallah
2008Formulating MITF for a Multicore Processor with SEU Tolerance.
Toshimasa Funaki, Toshinori Sato
2008Functional Verification of a USB Host Controller.
Primoz Puhar, Andrej Zemva
2008Generating RTL Synthesizable Code from Behavioral Testbenches for Hardware-Accelerated Verification.
Mohammad Reza Kakoee, Mohammad Riazati, Siamak Mohammadi
2008Hardware-oriented Adaptation of a Particle Swarm Optimization Algorithm for Object Detection.
Shahid Mehmood, Stefano Cagnoni, Monica Mordonini, Guido Matrella
2008Hardware/Software FPGA-based Network Emulator for High-speed On-board Communications.
Sergio Saponara, Nicola E. L'Insalata, Tony Bacchillone, Esa Petri, Iacopo Del Corona, Luca Fanucci
2008Hierarchical Analysis of Short Defects between Metal Lines in CMOS IC.
Witold A. Pleskacz, Maksim Jenihhin, Jaan Raik, Michal Rakowski, Raimund Ubar, Wieslaw Kuzmicz
2008High Performance Computing for Embedded System Design: A Case Study.
Vincenzo Catania, Gianmarco De Francisci Morales, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti
2008How to Live with Uncertainties: Exploiting the Performance Benefits of Self-Timed Logic In Synchronous Design.
Giacomo Paci, Axel Nackaerts, Francky Catthoor, Luca Benini, Paul Marchal
2008IRIS: A Firmware Design Methodology for SIMD Architectures.
Jan W. M. Jacobs, Leroy van Engelen, Jan Kuper, Gerard J. M. Smit, Rui Dai
2008Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking.
Robert Wille, Görschwin Fey, Marc Messing, Gerhard Angst, Lothar Linhard, Rolf Drechsler
2008Implementation of Microprogrammed Hard Disk Drive Servo Sequencer.
Paola Baldrighi, Marco Maurizio Maggi, Marco Castellano, Carla Vacchi, Davide Crespi, Piero Bonifacino
2008Implementation of Self-Timed Circuits onto FPGAs Using Commercial Tools.
Maurizio Tranchero, Leonardo Maria Reyneri
2008Improving SER Immunity of Combinational Logic Using Combinations of Spatial and Temporal Checking.
Tsau-Shuan Wu, Alkan Cengiz, Tom W. Chen
2008Integrating Clock Gating and Power Gating for Combined Dynamic and Leakage Power Optimization in Digital CMOS Circuits.
Enrico Macii, Letícia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Massimo Poncino
2008LIME: A Low-latency and Low-complexity On-chip Mesochronous Link with Integrated Flow Control.
Sergio Saponara, Francesco Vitullo, Riccardo Locatelli, Philippe Teninge, Marcello Coppola, Luca Fanucci
2008Large Scale On-Chip Networks : An Accurate Multi-FPGA Emulation Platform.
Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur Senouci, Frédéric Pétrot
2008Leveraging Data Promotion for Low Power D-NUCA Caches.
Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete, Per Stenström
2008Logic Transformations by Multiple Wire Network Addition.
Enrique San Millán, Luis Entrena, José Alberto Espejo
2008Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip.
Gottfried Fuchs, Matthias Függer, Ulrich Schmid, Andreas Steininger
2008Maximizing Resource Utilization by Slicing of Superscalar Architecture.
Shruti Patil, Venkatesan Muthukumar
2008Measurement, Analysis and Modeling of RTOS System Calls Timing.
Carlo Brandolese, William Fornaciari
2008Models and Tradeoffs in WSN System-Level Design.
Simone Campanoni, William Fornaciari
2008Multi-Objective Statistical Yield Enhancement using Evolutionary Algorithm.
Minoo Mirsaeedi, Morteza Saheb Zamani, Mehdi Saeedi
2008Network Interface Sharing Techniques for Area Optimized NoC Architectures.
Alberto Ferrante, Simone Medardoni, Davide Bertozzi
2008On Design a High Speed Sigma Delta DAC Modulator for a Digital Communication Transceiver on Chip.
Ruimin Huang, Niklas Lotze, Yiannos Manoli
2008On Lookup Table Cascade-Based Realizations of Arbiters.
Petr Mikusek, Vaclav Dvorak
2008On Projecting Sums of Products.
Anna Bernasconi, Valentina Ciriani, Roberto Cordone
2008On the Complexity of Error Detection Functions for Redundant Residue Number Systems.
Tsutomu Sasao, Yukihiro Iguchi
2008On the Need for Passive Monitoring in Sensor Networks.
Abdalkarim Awad, Rodrigo Nebel, Reinhard German, Falko Dressler
2008On the Use of Diminished-1 Adders for Weighted Modulo 2n + 1 Arithmetic Components.
Haridimos T. Vergos, Dimitris Bakalis
2008PUFFIN: A Novel Compact Block Cipher Targeted to Embedded Digital Systems.
Huiju Cheng, Howard M. Heys, Cheng Wang
2008Pearson - based Analysis of Positioning Error Distribution in Wireless Sensor Networks.
Stefano Tennina, Marco Di Renzo, Fabio Graziosi, Fortunato Santucci
2008Performance and Timing Yield Enhancement using Highway-on-Chip Planning.
Ali Jahanian, Morteza Saheb Zamani
2008Pin-limited Frequency Downscaler AHB Bridge for ASIC to FPGA Communication.
Tommaso Cecchini, Francesco Sechi, Luca Bacciarelli, Luca Mostardini, Francesco Battini, Luca Fanucci, Marco De Marinis
2008Power Conscious RTL Test Scheduling.
Jaroslav Skarvada, Zdenek Kotásek, Tomas Herrman
2008Power Optimization of Asynchronous Circuits through Simultaneous Vdd and Vth Assignment and Template Sizing.
Behnam Ghavami, Mehrshad Khosraviani, Hossein Pedram
2008Power/Area Analysis of a FPGA-Based Open-Source Processor using Partial Dynamic Reconfiguration.
Izhar Zaidi, Atukem Nabina, Cedric Nishan Canagarajah, José L. Núñez-Yáñez
2008Programmable Numerical Function Generators for Two-Variable Functions.
Shinobu Nagayama, Jon T. Butler, Tsutomu Sasao
2008Quantum-Dot Cellular Automata Serial Comparator.
Blaz Lampreht, Luka Stepancic, Igor Vizec, Bostjan Zankar, Miha Mraz, Iztok Lebar Bajec, Primoz Pecar
2008Reducing Leakage through Filter Cache.
Roberto Giorgi, Paolo Bennati
2008Reimbursing the Handshake Overhead of Asynchronous Circuits using Compiler Pre-Synthesis Optimizations.
Sharareh Zamanzadeh, Mohammad Mirza-Aghatabar, Mehrdad Najibi, Hossein Pedram, Abolghasem Sadeghi
2008Reliable Data Transmission over Simple Wireless Channels: A Case Study.
Pawel Gburzynski, Bozena Kaminska, Ashikur Rahman
2008Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis.
Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Esther Andres Perez, Román Hermida
2008Revisiting the Cache Effect on Multicore Multithreaded Network Processors.
Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, Laxmi N. Bhuyan
2008SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation.
A. Neslin Ismailoglu, Murat Askar
2008SIMD Enhancements for a Hough Transform Implementation.
Francisco J. Jaime, Javier Hormigo, Julio Villalba, Emilio L. Zapata
2008Source-Level Estimation of Energy Consumption and Execution Time of Embedded Software.
Carlo Brandolese
2008Synthesis of Flexible Fault-Tolerant Schedules with Preemption for Mixed Soft and Hard Real-Time Systems.
Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
2008System-on-an-FPGA Design for Real-time Particle Track Recognition and Reconstruction in Physics Experiments.
Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch
2008TASTE: Testability Analysis Engine and Opened Libraries for Digital Data Path.
Josef Strnadel
2008Technology Library Modelling for Information-driven Circuit Synthesis.
Lech Józwiak, Szymon Bieganski
2008Temperature and Leakage Aware Power Control for Embedded Streaming Applications.
Andrea Alimonda, Andrea Acquaviva, Salvatore Carta
2008Transaction Level Modeling and Performance Analysis in SystemC of IEEE 802.15.4 Wireless Standard.
Alessandro Mignogna, Massimo Conti, M. D'Angelo, Massimo Baleani, Alberto Ferrari
2008Ultra-Low Power Passive UHF RFID for Wireless Sensor Networks.
R. Morales-Ramos, Alexander Vaz, Daniel Pardo, Roc Berenguer
2008Using Empirical Science to Engineer Systems: Optimizing Cache for Power and Performance.
Ahmed Abdallah, Wayne H. Wolf, Graham R. Hellestrand
2008Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism.
Rainer Schaffer, Renate Merker, Frank Hannig, Jürgen Teich
2008VLSI Implementation of a Cryptography-Oriented Reconfigurable Array.
Scott Miller, Ambrose Chu, Mihai Sima, Michael McGuire
2008Virtual Scan Chains for Online Testing of FPGA-based Embedded Systems.
Alessandro Cilardo, Nicola Mazzocca, Luigi Coppolino
2008Why to Use Dual-Vt, If Single-Vt Serves the Purpose Better under Process Parameter Variations?
Sudip Roy, Ajit Pal
2008WirelessUSB - Performance Analysis of an Embedded System in a Peer-to-Peer Application.
Stefano Recchi, Maurizio Persichitti, Massimo Conti