DSD C

80 papers

YearTitle / Authors
2005A Constraints Programming Approach for Fabric Cell Synthesis.
Christophe Wolinski, Krzysztof Kuchcinski
2005A FPGA Based Design of a Multiplierless and Fully Pipelined JPEG Compressor.
Luciano Volcan Agostini, Roger Endrigo Carvalho Porto, Sergio Bampi, Ivan Saraiva Silva
2005A Low-Power FIR Filter Using Combined Residue and Radix-2 Signed-Digit Representation.
Andreas Lindahl, Lars Bengtsson
2005A New Architecture for fast Arithmetic Coding in H.264 Advanced Video Coder.
Roberto R. Osorio, Javier D. Bruguera
2005A Novel Method of Two-Stage Decomposition Dedicated for PAL-based CPLDs.
Dariusz Kania, Józef Kulisz, Adam Milik
2005A high-level tool for the design of custom image processing systems.
Sérgio Martins, José Carlos Alves
2005A processor for testing mixed-signal cores in System-on-Chip.
Francisco Duarte, José Machado da Silva, José Carlos Alves, G. A. Pinho, José Silva Matos
2005ARPA - A Technology Independent and Synthetizable System-on-Chip Model for Real-Time Applications.
Arnaldo S. R. Oliveira, Valery Sklyarov, António de Brito Ferrari
2005An Adaptive On-Line HW/SW Partitioning for Soft Real Time Reconfigurable Systems.
Fakhreddine Ghaffari, Michel Auguin, Mohamed Abid, Maher Benjemaa
2005An Advanced Minimization Technique for Multiple Valued Multiple Output Logic Expressions Using LUT and Realization Using Current Mode CMOS.
Md. Sumon Shahriar, A. R. Mustafa, Chowdhury Farhan Ahmed, Abu Ahmed Ferdaus, A. N. M. Zaheduzzaman, Shahed Anwar, Hafiz Md. Hasan Babu
2005An Approach to Execute Conditional Branches onto SIMD Multi-Context Reconfigurable Architectures.
Fredy Rivera, Milagros Fernández, Nader Bagherzadeh
2005An Educational Environment for Digital Testing: Hardware, Tools, and Web-Based Runtime Platform.
Artur Jutman, Jaan Raik, Raimund Ubar, V. Vislogubov
2005An Effective Framework for Enabling the Reuse of External Soft IP.
Soujanna Sarkar, Subash Chandar G.
2005An Efficient MAC Protocol for Sensor Network Considering Energy Consumption and Information Retrieval Pattern.
Y. Ghiassi, Mohammad M. M. Rad, Mohammad S. Nikjoo, Ali Hesam Mohseni, Babak Hossein Khalaj
2005Approximating Trigonometric Functions with the Laws of Sines and Cosines using the Logarithmic Number System.
Mark G. Arnold
2005Automatic Design of Binary and Multiple-Valued Logic Gates on RTD Series.
Krzysztof S. Berezowski, Sarma B. K. Vrudhula
2005BIST Technique for GALS Systems.
Milos Krstic, Eckhard Grass
2005Capturing Processor Architectures from Protocol Processing Applications: a Case Study.
Seppo Virtanen, Jani Paakkulainen, Tero Nurmi
2005Characterization of Wavelet-Based Image Coding Systems for Algorithmic Fault Detection.
Lucía Costas, Juan J. Rodríguez-Andina
2005Co-simulation of Wireless Local Area Network Terminals with Protocol Software Implemented in SDL.
Petri Kukkala, Marko Hännikäinen, Timo D. Hämäläinen
2005Coefficient Bit Reordering Method for Configurable FIR Filtering on Folded Bit-plane Array.
Vladimir M. Ciric, Ivan Z. Milentijevic
2005Conference Committees.
2005Copyright.
2005Cost-effective VLSI Design of Non Linear Image Processing Filters.
Sergio Saponara, Michele Cassiano, Stefano Marsi, Riccardo Coen, Luca Fanucci
2005Decomposition of Multi-Output Functions for CPLDs.
Dariusz Kania, Adam Milik, Józef Kulisz
2005Defect-Oriented Test- and Layout-Generation for Standard-Cell ASIC Designs.
Joachim Sudbrock, Jaan Raik, Raimund Ubar, Wieslaw Kuzmicz, Witold A. Pleskacz
2005Delay Testability Properties of Circuits Implementing Threshold and Symmetric Functions.
Piotr Patronik
2005Design of A Development Platform for HW/SW Codesign ofWireless Integrated Sensor Nodes.
Kashif Virk, Jan Madsen, Andreas Vad Lorentzen, Martin Leopold, Philippe Bonnet
2005Design of Transport Triggered Architecture Processors for Wireless Encryption.
Panu Hämäläinen, Jari Heikkinen, Marko Hännikäinen, Timo D. Hämäläinen
2005Designing a Binary Neural Network Co-processor.
Michael Freeman, Jim Austin
2005Dynamic Split: Flexible Border Between Instruction and Data Cache.
Pedro Trancoso
2005Educational Tool for the Demonstration of DfT Principles Based on Scan Methodologies.
Josef Strnadel, Zdenek Kotásek
2005Efficient Host-Independent Coprocessor Architecture for Speech Coding Algorithms.
Hamid Safizadeh, Hamid Noori, Mehdi Sedighi, Ali Jahanian, Neda Zolfaghari
2005Efficient Implementation of Digital Filters with Use of Advanced Synthesis Methods Targeted FPGA Architectures.
Mariusz Rawski, Pawel Tomaszewicz, Henry Selvaraj, Tadeusz Luba
2005Efficient MLP Digital Implementation on FPGA.
Salvatore Vitabile, Vincenzo Conti, Fulvio Gennaro, Filippo Sorbello
2005Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August - 3 September 2005, Porto, Portugal
2005Embedded Object Architecture.
Tero Vallius, Juha Röning
2005Exploring Graphics Processor Performance for General Purpose Applications.
Pedro Trancoso, Maria Charalambous
2005Formal Communication Semantics of SystemC
Ka L. Man
2005Functional Test Generation Remote Tool.
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas
2005Functional Vectors Generation for RT-Level Verilog Descriptions Based on Path Enumeration and Constraint Logic Programming.
Tun Li, Yang Guo, Gongjie Liu, Sikun Li
2005Hardware Virtual Components Compliant with Communication System Standards.
Nabil Abdelli, Pierre Bomel, Emmanuel Casseau, Anne-Marie Fouilliart, Christophe Jégo, Philippe Kajfasz, Bertrand Le Gal, Nathalie Le Heno
2005Hardware-Based Implementation of the Common Approximate Substring Algorithm.
Kenneth B. Kent, Sharon Van Schaick, Jacqueline E. Rice, Patricia A. Evans
2005High-Level Modelling and Detection of the Faulty Behaviour of VOQ Switches under Balanced Traffic.
Miguel Pereira, Enrique Soto, Juan J. Rodríguez-Andina, Francisco J. González-Castaño
2005High-Level Synthesis in Latency Insensitive System Methodology.
Pierre Bomel, Nabil Abdelli, Eric Martin, Anne-Marie Fouilliart, Emmanuel Boutillon, Philippe Kajfasz
2005High-quality Sub-function Construction in the Information-driven Circuit Synthesis with Gates.
Lech Józwiak, Szymon Bieganski
2005Implementation of a block based neural branch predictor.
Oswaldo Cadenas, Graham M. Megson, Daniel Jones
2005Improved Fault Emulation for Synchronous Sequential Circuits.
Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, Raimund Ubar
2005Improvement of the Fault Coverage of the Pseudo-Random Phase in Column-Matching BIST.
Peter Filter, Hana Kubátová
2005Internet-Based IC Technology Design and Simulation.
Vladislav Nelayev, Viktor Stempitsky, Kirill A. Kudin
2005Java to Hardware Compilation for non Data Flow Applications.
Per Andersson, Krzysztof Kuchcinski
2005MA2TG: A Functional Test Program Generator for Microprocessor Verification.
Tun Li, Dan Zhu, Yang Guo, Gongjie Liu, Sikun Li
2005Massively Parallel Hardware Architecture for Genetic Algorithms.
Nadia Nedjah, Luiza de Macedo Mourelle
2005MemBIST Applet for Learning Principles of Memory Testing and Generating Memory BIST.
Mária Fischerová, Martin Simlastík
2005Message from the Program Chair.
2005Multi-media Applications and Imprecise Computation.
Melvin A. Breuer
2005On LUT Cascade Realizations of FIR Filters.
Tsutomu Sasao, Yukihiro Iguchi, Takahiro Suzuki
2005Optimization of Electronic Power Consumption in Wireless Sensor Nodes.
Senthil Jayapal, S. Ramachandran, R. Bhutada, Yiannos Manoli
2005Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip.
Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng
2005P2I: An Innovative MDA Methodology for Embedded Real-Time System.
Arnaud Cuccuru, Robert de Simone, Thierry Saunier, Günther Siegel, Yves Sorel
2005PRUS - Processor Network for Digital Circuit Implementation.
Stanley Hyduke, Vladimir Hahanov, Volodymyr Obrizan, Olesya Guz
2005Power-Composition Profile Driven Co-Synthesis with Power Management Selection for Dynamic and Leakage Energy Reduction.
Dong Wu, Bashir M. Al-Hashimi, Marcus T. Schmitz, Petru Eles
2005Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment.
Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles
2005Predictable embedding of large data structures in multiprocessor networks-on-chip.
Sander Stuijk, Twan Basten, Bart Mesman, Marc Geilen
2005RF CMOS Circuits for Ad-Hoc Networks and Wearable Computing.
Chris Siu, Soraya Kasnavi, Kris Iniewski, Frederic Nabki
2005Reconfigurable Parallel Approximate String Matching on FPGAs.
Jin Hwan Park
2005Reducing Inter-Configuration Memory Usage and Performance Improvement in Reconfigurable Computing Systems.
Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi
2005Remote Path Delay Fault Simulation.
Øystein Gjermundnes, Einar J. Aas
2005Run-time Adaptive Resources Allocation and Balancing on Nanoprocessors Arrays.
Danilo Pani, Giuseppe Passino, Luigi Raffo
2005State Assignment for PAL-based CPLDs.
Robert Czerwinski, Dariusz Kania
2005SystemC-based Design Methodology for Reconfigurable System-on-Chip.
Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen
2005Throughput of Streaming Applications Running on a Multiprocessor Architecture.
Nikolay Kavaldjiev, Gerard J. M. Smit, Pierre G. Jansen
2005Title Page.
2005Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs.
Miguel Lino Silva, João Canas Ferreira
2005VLSI Design of a High-Throughput Multi-Rate Decoder for Structured LDPC Codes.
Massimo Rovini, Nicola E. L'Insalata, Francesco Rossi, Luca Fanucci
2005Validation of Embedded Systems Using Formal Method Aided Simulation.
Daniel Karlsson, Petru Eles, Zebo Peng
2005Vital Signs Remote Management System for PDAs.
Danielly Cruz, Edna Barros
2005Wireless Sensor Network Implementation for Industrial Linear Position Metering.
Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen
2005Wireless Sensor Systems - Constraints and Opportunities.
Dirk Timmermann
2005Yield-aware Floorplanning.
Zhaojun Wo, Israel Koren, Maciej J. Ciesielski